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cd872e40 | 1 | //\r |
2 | // Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
3 | //\r | |
4 | // This program and the accompanying materials\r | |
5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
6 | // which accompanies this distribution. The full text of the license may be found at\r | |
7 | // http://opensource.org/licenses/bsd-license.php\r | |
8 | //\r | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | //\r | |
12 | //\r | |
13 | \r | |
14 | #include <AsmMacroIoLib.h>\r | |
15 | #include <Base.h>\r | |
16 | #include <Library/PcdLib.h>\r | |
17 | #include <AutoGen.h>\r | |
18 | \r | |
cd872e40 | 19 | .text\r |
20 | .align 3\r | |
21 | \r | |
cd872e40 | 22 | GCC_ASM_IMPORT(CEntryPoint)\r |
0787bc61 | 23 | GCC_ASM_IMPORT(ArmReadMpidr)\r |
886f97c8 | 24 | GCC_ASM_IMPORT(ArmIsMpCore)\r |
d269095b | 25 | GCC_ASM_EXPORT(_ModuleEntryPoint)\r |
cd872e40 | 26 | \r |
27 | StartupAddr: .word CEntryPoint\r | |
28 | \r | |
cd872e40 | 29 | \r |
30 | ASM_PFX(_ModuleEntryPoint):\r | |
0787bc61 | 31 | // Get ID of this CPU in Multicore system\r |
32 | bl ASM_PFX(ArmReadMpidr)\r | |
33 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r | |
2dbcb8f0 | 34 | and r5, r0, r1\r |
cd872e40 | 35 | \r |
d269095b | 36 | _SetSVCMode:\r |
99565b88 | 37 | // Enter SVC mode, Disable FIQ and IRQ\r |
d269095b | 38 | mov r1, #0x13|0x80|0x40\r |
39 | msr CPSR_c, r1\r | |
40 | \r | |
2dbcb8f0 | 41 | // Check if we can install the stack at the top of the System Memory or if we need\r |
d269095b | 42 | // to install the stacks at the bottom of the Firmware Device (case the FD is located\r |
43 | // at the top of the DRAM)\r | |
44 | _SetupStackPosition:\r | |
cd872e40 | 45 | // Compute Top of System Memory\r |
46 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r | |
47 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r | |
48 | add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r | |
cd872e40 | 49 | \r |
d269095b | 50 | // Calculate Top of the Firmware Device\r |
f92b93c9 | 51 | LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r |
52 | LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r | |
53 | add r3, r3, r2 // r4 = FdTop = PcdFdBaseAddress + PcdFdSize\r | |
d269095b | 54 | \r |
55 | // UEFI Memory Size (stacks are allocated in this region)\r | |
56 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r | |
57 | \r | |
58 | //\r | |
59 | // Reserve the memory for the UEFI region (contain stacks on its top)\r | |
60 | //\r | |
61 | \r | |
62 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r | |
2dbcb8f0 | 63 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r |
64 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r | |
65 | cmp r0, r4\r | |
d269095b | 66 | bge _SetupStack\r |
67 | \r | |
68 | // Case the top of stacks is the FdBaseAddress\r | |
69 | mov r1, r2\r | |
cd872e40 | 70 | \r |
71 | _SetupStack:\r | |
2dbcb8f0 | 72 | // r1 contains the top of the stack (and the UEFI Memory)\r |
d269095b | 73 | \r |
74 | // Calculate the Base of the UEFI Memory\r | |
2dbcb8f0 | 75 | sub r6, r1, r4\r |
cd872e40 | 76 | \r |
2dbcb8f0 | 77 | _GetStackBase:\r |
78 | // Compute Base of Normal stacks for CPU Cores\r | |
79 | // Is it MpCore system\r | |
89bbce11 | 80 | bl ASM_PFX(ArmIsMpCore)\r |
cd872e40 | 81 | cmp r0, #0\r |
2dbcb8f0 | 82 | // Case it is not an MP Core system. Just setup the primary core\r |
83 | beq _SetupUnicoreStack\r | |
84 | \r | |
85 | _GetStackBaseMpCore:\r | |
86 | // Stack for the primary core = PrimaryCoreStack\r | |
87 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
88 | sub r7, r1, r2\r | |
89 | // Stack for the secondary core = Number of Cluster * (4 Core per cluster) * SecondaryStackSize\r | |
90 | LoadConstantToReg (FixedPcdGet32(PcdClusterCount), r2)\r | |
91 | lsl r2, r2, #2\r | |
92 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r | |
93 | mul r2, r2, r3\r | |
94 | sub r7, r7, r2\r | |
95 | \r | |
96 | // The top of the Mpcore Stacks is in r1\r | |
97 | // The base of the MpCore Stacks is in r7\r | |
98 | \r | |
99 | // Is it the Primary Core ?\r | |
100 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r | |
99565b88 | 101 | cmp r5, r4\r |
2dbcb8f0 | 102 | beq _SetupPrimaryCoreStack\r |
103 | \r | |
104 | _SetupSecondaryCoreStack:\r | |
105 | // Base of the stack for the secondary cores is in r7\r | |
106 | \r | |
107 | // Get the position of the cores (ClusterId * 4) + CoreId\r | |
108 | GetCorePositionInStack(r0, r5, r4)\r | |
109 | // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r | |
110 | add r0, r0, #1\r | |
111 | // Get the offset for the Secondary Stack\r | |
112 | mul r0, r0, r3\r | |
113 | add sp, r7, r0\r | |
114 | \r | |
cd872e40 | 115 | bne _PrepareArguments\r |
116 | \r | |
2dbcb8f0 | 117 | _SetupPrimaryCoreStack:\r |
118 | // The top of the Mpcore Stacks is in r1\r | |
119 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r | |
120 | \r | |
121 | // The reserved space for global variable must be 8-bytes aligned for pushing\r | |
122 | // 64-bit variable on the stack\r | |
123 | SetPrimaryStack (r1, r2, r3)\r | |
124 | \r | |
125 | _SetGlobals:\r | |
126 | // Set all the PrePi global variables to 0\r | |
127 | mov r3, sp\r | |
128 | mov r2, #0x0\r | |
129 | _InitGlobals:\r | |
130 | str r2, [r3], #4\r | |
131 | cmp r3, r1\r | |
031f52ce | 132 | bne _InitGlobals\r |
2dbcb8f0 | 133 | \r |
cd872e40 | 134 | \r |
135 | _PrepareArguments:\r | |
c524ffbb | 136 | mov r0, r5\r |
137 | mov r1, r6\r | |
138 | mov r2, r7\r | |
139 | mov r3, sp\r | |
140 | \r | |
cd872e40 | 141 | // Move sec startup address into a data register\r |
142 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r | |
c524ffbb | 143 | ldr r4, StartupAddr\r |
cd872e40 | 144 | \r |
d269095b | 145 | // Jump to PrePiCore C code\r |
0787bc61 | 146 | // r0 = MpId\r |
cd872e40 | 147 | // r1 = UefiMemoryBase\r |
c524ffbb | 148 | // r2 = StacksBase\r |
149 | // r3 = GlobalVariableBase\r | |
150 | blx r4\r | |
cd872e40 | 151 | \r |
2dbcb8f0 | 152 | _NeverReturn:\r |
153 | b _NeverReturn\r | |
154 | \r | |
155 | _SetupUnicoreStack:\r | |
156 | // The top of the Unicore Stack is in r1\r | |
157 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r | |
158 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r3)\r | |
159 | \r | |
160 | // Calculate the bottom of the primary stack (StackBase)\r | |
161 | sub r7, r1, r3\r | |
162 | \r | |
163 | // The reserved space for global variable must be 8-bytes aligned for pushing\r | |
164 | // 64-bit variable on the stack\r | |
165 | SetPrimaryStack (r1, r2, r3)\r | |
166 | \r | |
167 | b _SetGlobals\r | |
168 | \r |