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1d5d0ae9 | 1 | //\r |
2 | // Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
3 | // \r | |
4 | // This program and the accompanying materials \r | |
5 | // are licensed and made available under the terms and conditions of the BSD License \r | |
6 | // which accompanies this distribution. The full text of the license may be found at \r | |
7 | // http://opensource.org/licenses/bsd-license.php \r | |
8 | //\r | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | //\r | |
12 | //\r | |
13 | \r | |
14 | #include <AsmMacroIoLib.h>\r | |
15 | #include <Base.h>\r | |
16 | #include <AutoGen.h>\r | |
17 | \r | |
18 | IMPORT SecCommonExceptionEntry\r | |
19 | EXPORT SecVectorTable\r | |
20 | \r | |
21 | PRESERVE8\r | |
22 | AREA SecException, CODE, READONLY, CODEALIGN, ALIGN=5\r | |
23 | \r | |
a6caee65 | 24 | //============================================================\r |
25 | //Default Exception Handlers\r | |
26 | //============================================================\r | |
27 | \r | |
28 | \r | |
29 | SecVectorTable\r | |
30 | b _DefaultResetHandler\r | |
31 | b _DefaultUndefined\r | |
32 | b _DefaultSWI\r | |
33 | b _DefaultPrefetchAbort\r | |
34 | b _DefaultDataAbort\r | |
35 | b _DefaultReserved\r | |
36 | b _DefaultIrq\r | |
37 | b _DefaultFiq\r | |
1d5d0ae9 | 38 | \r |
a6caee65 | 39 | //\r |
1d5d0ae9 | 40 | // Default Exception handlers: There is no plan to return from any of these exceptions.\r |
41 | // No context saving at all.\r | |
a6caee65 | 42 | //\r |
43 | _DefaultResetHandler\r | |
1d5d0ae9 | 44 | mov r1, lr\r |
a6caee65 | 45 | cps #0x13 ; Switch to SVC for common stack\r |
46 | mov r0, #0\r | |
47 | blx SecCommonExceptionEntry\r | |
48 | \r | |
49 | _DefaultUndefined\r | |
1d5d0ae9 | 50 | sub r1, LR\r |
a6caee65 | 51 | cps #0x13 ; Switch to SVC for common stack\r |
52 | mov r0, #1\r | |
53 | blx SecCommonExceptionEntry\r | |
54 | \r | |
55 | _DefaultSWI\r | |
1d5d0ae9 | 56 | sub r1, LR, #4\r |
a6caee65 | 57 | cps #0x13 ; Switch to SVC for common stack\r |
58 | mov r0, #2\r | |
59 | blx SecCommonExceptionEntry\r | |
60 | \r | |
61 | _DefaultPrefetchAbort\r | |
1d5d0ae9 | 62 | sub r1, LR, #4\r |
a6caee65 | 63 | cps #0x13 ; Switch to SVC for common stack\r |
64 | mov r0, #3\r | |
65 | blx SecCommonExceptionEntry\r | |
66 | \r | |
67 | _DefaultDataAbort\r | |
1d5d0ae9 | 68 | sub r1, LR, #8\r |
a6caee65 | 69 | cps #0x13 ; Switch to SVC for common stack\r |
70 | mov r0, #4\r | |
71 | blx SecCommonExceptionEntry\r | |
72 | \r | |
73 | _DefaultReserved\r | |
1d5d0ae9 | 74 | mov r1, lr\r |
a6caee65 | 75 | cps #0x13 ; Switch to SVC for common stack\r |
76 | mov r0, #5\r | |
77 | blx SecCommonExceptionEntry\r | |
78 | \r | |
79 | _DefaultIrq\r | |
1d5d0ae9 | 80 | sub r1, LR, #4\r |
a6caee65 | 81 | cps #0x13 ; Switch to SVC for common stack\r |
82 | mov r0, #6\r | |
83 | blx SecCommonExceptionEntry\r | |
84 | \r | |
85 | _DefaultFiq\r | |
1d5d0ae9 | 86 | sub r1, LR, #4\r |
a6caee65 | 87 | cps #0x13 ; Switch to SVC for common stack\r |
88 | mov r0, #7\r | |
89 | blx SecCommonExceptionEntry\r | |
1d5d0ae9 | 90 | \r |
91 | END\r |