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1d5d0ae9 | 1 | #========================================================================================\r |
8cc852f7 | 2 | # Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r |
1d5d0ae9 | 3 | # \r |
4 | # This program and the accompanying materials \r | |
5 | # are licensed and made available under the terms and conditions of the BSD License \r | |
6 | # which accompanies this distribution. The full text of the license may be found at \r | |
7 | # http:#opensource.org/licenses/bsd-license.php \r | |
8 | #\r | |
9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | #\r | |
12 | #=======================================================================================\r | |
13 | \r | |
14 | #start of the code section\r | |
15 | .text \r | |
16 | .align 3\r | |
17 | \r | |
1d5d0ae9 | 18 | GCC_ASM_EXPORT(return_from_exception)\r |
19 | GCC_ASM_EXPORT(enter_monitor_mode)\r | |
20 | GCC_ASM_EXPORT(copy_cpsr_into_spsr)\r | |
513aa349 | 21 | GCC_ASM_EXPORT(set_non_secure_mode)\r |
1d5d0ae9 | 22 | \r |
a8530889 | 23 | # r0: Monitor World EntryPoint\r |
24 | # r1: MpId\r | |
a75568e9 | 25 | # r2: SecBootMode\r |
26 | # r3: Secure Monitor mode stack\r | |
1d5d0ae9 | 27 | ASM_PFX(enter_monitor_mode):\r |
a75568e9 | 28 | cmp r3, #0 @ If a Secure Monitor stack base has not been defined then use the Secure stack\r |
29 | moveq r3, sp\r | |
59a2b365 | 30 | \r |
31 | mrs r4, cpsr @ Save current mode (SVC) in r4\r | |
a75568e9 | 32 | bic r5, r4, #0x1f @ Clear all mode bits\r |
33 | orr r5, r5, #0x16 @ Set bits for Monitor mode\r | |
34 | msr cpsr_cxsf, r5 @ We are now in Monitor Mode\r | |
1d5d0ae9 | 35 | \r |
a75568e9 | 36 | mov sp, r3 @ Set the stack of the Monitor Mode\r |
a8530889 | 37 | \r |
38 | mov lr, r0 @ Use the pass entrypoint as lr\r | |
1d5d0ae9 | 39 | \r |
a8530889 | 40 | msr spsr_cxsf, r4 @ Use saved mode for the MOVS jump to the kernel\r |
41 | \r | |
42 | mov r4, r0 @ Swap EntryPoint and MpId registers\r | |
43 | mov r0, r1\r | |
a75568e9 | 44 | mov r1, r2\r |
45 | mov r2, r3\r | |
a8530889 | 46 | \r |
47 | bx r4\r | |
1d5d0ae9 | 48 | \r |
49 | # We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.\r | |
50 | # When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into\r | |
51 | # 'pc'; we will not change the CPSR flag and it will crash.\r | |
52 | # The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.\r | |
53 | ASM_PFX(return_from_exception):\r | |
54 | ldr lr, returned_exception\r | |
55 | \r | |
56 | #The following instruction breaks the code.\r | |
57 | #movs pc, lr\r | |
58 | mrs r2, cpsr\r | |
59 | bic r2, r2, #0x1f\r | |
60 | orr r2, r2, #0x13\r | |
61 | msr cpsr_c, r2\r | |
62 | \r | |
63 | returned_exception: @ We are now in non-secure state\r | |
64 | bx r0\r | |
65 | \r | |
66 | # Save the current Program Status Register (PSR) into the Saved PSR\r | |
67 | ASM_PFX(copy_cpsr_into_spsr):\r | |
68 | mrs r0, cpsr\r | |
69 | msr spsr_cxsf, r0\r | |
70 | bx lr\r | |
71 | \r | |
513aa349 | 72 | # Set the Non Secure Mode\r |
73 | ASM_PFX(set_non_secure_mode):\r | |
74 | push { r1 }\r | |
75 | and r0, r0, #0x1f @ Keep only the mode bits\r | |
76 | mrs r1, spsr @ Read the spsr\r | |
77 | bic r1, r1, #0x1f @ Clear all mode bits\r | |
78 | orr r1, r1, r0\r | |
79 | msr spsr_cxsf, r1 @ write back spsr (may have caused a mode switch)\r | |
80 | isb\r | |
81 | pop { r1 }\r | |
82 | bx lr @ return (hopefully thumb-safe!)\r | |
83 | \r | |
1d5d0ae9 | 84 | dead:\r |
6377d2f1 | 85 | b dead\r |
1d5d0ae9 | 86 | \r |
6377d2f1 | 87 | ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r |