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1fde2f61 | 1 | /** @file\r |
2 | C Entry point for the SEC. First C code after the reset vector.\r | |
3 | \r | |
cf748a1a | 4 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
1fde2f61 | 5 | \r |
cf748a1a | 6 | This program and the accompanying materials\r |
1fde2f61 | 7 | are licensed and made available under the terms and conditions of the BSD License\r |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #include <PiPei.h>\r | |
17 | \r | |
18 | #include <Library/DebugLib.h>\r | |
19 | #include <Library/PrePiLib.h>\r | |
20 | #include <Library/PcdLib.h>\r | |
21 | #include <Library/IoLib.h>\r | |
22 | #include <Library/ArmLib.h>\r | |
23 | #include <Library/PeCoffGetEntryPointLib.h>\r | |
ebeffc42 | 24 | #include <Library/DebugAgentLib.h>\r |
1fde2f61 | 25 | \r |
26 | #include <Ppi/GuidedSectionExtraction.h>\r | |
27 | #include <Guid/LzmaDecompress.h>\r | |
28 | \r | |
ebeffc42 | 29 | #include <ArmEb/ArmEb.h>\r |
30 | \r | |
1fde2f61 | 31 | #include "LzmaDecompress.h"\r |
32 | \r | |
33 | VOID\r | |
34 | EFIAPI \r | |
35 | _ModuleEntryPoint(\r | |
36 | VOID\r | |
37 | );\r | |
38 | \r | |
39 | CHAR8 *\r | |
40 | DeCygwinPathIfNeeded (\r | |
41 | IN CHAR8 *Name\r | |
42 | );\r | |
43 | \r | |
44 | RETURN_STATUS\r | |
45 | EFIAPI\r | |
46 | SerialPortInitialize (\r | |
47 | VOID\r | |
48 | );\r | |
49 | \r | |
50 | \r | |
51 | VOID\r | |
52 | UartInit (\r | |
53 | VOID\r | |
54 | )\r | |
55 | {\r | |
56 | // SEC phase needs to run library constructors by hand.\r | |
57 | // This assumes we are linked agains the SerialLib\r | |
58 | // In non SEC modules the init call is in autogenerated code.\r | |
59 | SerialPortInitialize ();\r | |
60 | }\r | |
61 | \r | |
ebeffc42 | 62 | VOID\r |
63 | TimerInit (\r | |
64 | VOID\r | |
65 | )\r | |
66 | {\r | |
67 | // configure SP810 to use 1MHz clock and disable\r | |
68 | MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);\r | |
69 | // Enable\r | |
70 | MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);\r | |
71 | \r | |
72 | // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled\r | |
73 | MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r | |
74 | \r | |
75 | // preload the timer count register\r | |
76 | MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);\r | |
77 | \r | |
78 | // enable the timer\r | |
79 | MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);\r | |
80 | }\r | |
81 | \r | |
82 | \r | |
1fde2f61 | 83 | VOID\r |
84 | InitCache (\r | |
85 | IN UINT32 MemoryBase,\r | |
86 | IN UINT32 MemoryLength\r | |
87 | );\r | |
88 | \r | |
89 | EFI_STATUS\r | |
90 | EFIAPI\r | |
91 | ExtractGuidedSectionLibConstructor (\r | |
92 | VOID\r | |
93 | );\r | |
94 | \r | |
95 | EFI_STATUS\r | |
96 | EFIAPI\r | |
97 | LzmaDecompressLibConstructor (\r | |
98 | VOID\r | |
99 | );\r | |
100 | \r | |
1fde2f61 | 101 | \r |
102 | VOID\r | |
103 | CEntryPoint (\r | |
104 | IN VOID *MemoryBase,\r | |
105 | IN UINTN MemorySize,\r | |
106 | IN VOID *StackBase,\r | |
107 | IN UINTN StackSize\r | |
108 | )\r | |
109 | {\r | |
110 | VOID *HobBase;\r | |
111 | \r | |
afdfe8f0 | 112 | // HOB list is at bottom of stack area\r |
113 | // Stack grows from top-to-bottom towards HOB list\r | |
114 | HobBase = (VOID *)StackBase;\r | |
1fde2f61 | 115 | CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);\r |
116 | \r | |
afdfe8f0 | 117 | // Turn off remapping NOR to 0. We can will now see DRAM in low memory\r |
118 | MmioOr32 (0x10001000 ,BIT8); //EB_SP810_CTRL_BASE\r | |
1fde2f61 | 119 | \r |
120 | // Enable program flow prediction, if supported.\r | |
121 | ArmEnableBranchPrediction ();\r | |
122 | \r | |
123 | // Initialize CPU cache\r | |
124 | InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);\r | |
125 | \r | |
126 | // Add memory allocation hob for relocated FD\r | |
127 | BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);\r | |
128 | \r | |
129 | // Add the FVs to the hob list\r | |
130 | BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));\r | |
131 | \r | |
132 | // Start talking\r | |
133 | UartInit ();\r | |
1fde2f61 | 134 | \r |
7c137cae | 135 | InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);\r |
ebeffc42 | 136 | SaveAndSetDebugTimerInterrupt (TRUE);\r |
137 | \r | |
138 | DEBUG ((EFI_D_ERROR, "UART Enabled\n"));\r | |
1fde2f61 | 139 | \r |
ebeffc42 | 140 | // Start up a free running timer so that the timer lib will work\r |
141 | TimerInit ();\r | |
1fde2f61 | 142 | \r |
143 | // SEC phase needs to run library constructors by hand.\r | |
144 | ExtractGuidedSectionLibConstructor ();\r | |
145 | LzmaDecompressLibConstructor ();\r | |
146 | \r | |
147 | // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r | |
148 | BuildPeCoffLoaderHob ();\r | |
149 | BuildExtractSectionHob (\r | |
150 | &gLzmaCustomDecompressGuid,\r | |
151 | LzmaGuidedSectionGetInfo,\r | |
152 | LzmaGuidedSectionExtraction\r | |
153 | );\r | |
154 | \r | |
155 | // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r | |
156 | DecompressFirstFv ();\r | |
157 | \r | |
158 | // Load the DXE Core and transfer control to it\r | |
159 | LoadDxeCoreFromFv (NULL, 0);\r | |
160 | \r | |
161 | // DXE Core should always load and never return\r | |
162 | ASSERT (FALSE);\r | |
163 | }\r | |
164 | \r |