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6f5872b1 | 1 | #\r |
7fbd1eb2 | 2 | # Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r |
6f5872b1 | 3 | # Copyright (c) 2014, Linaro Limited. All rights reserved.\r |
42e3d9eb | 4 | # Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.\r |
6f5872b1 | 5 | #\r |
9792fb0e | 6 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
6f5872b1 MC |
7 | #\r |
8 | \r | |
9 | ################################################################################\r | |
10 | #\r | |
11 | # FD Section\r | |
12 | # The [FD] Section is made up of the definition statements and a\r | |
13 | # description of what goes into the Flash Device Image. Each FD section\r | |
14 | # defines one flash "device" image. A flash device image may be one of\r | |
15 | # the following: Removable media bootable image (like a boot floppy\r | |
16 | # image,) an Option ROM image (that would be "flashed" into an add-in\r | |
17 | # card,) a System "Flash" image (that would be burned into a system's\r | |
18 | # flash) or an Update ("Capsule") image that will be used to update and\r | |
19 | # existing system flash.\r | |
20 | #\r | |
21 | ################################################################################\r | |
22 | \r | |
7551529c AB |
23 | [Defines]\r |
24 | !if $(FD_SIZE_IN_MB) == 2\r | |
25 | DEFINE FVMAIN_COMPACT_SIZE = 0x1ff000\r | |
26 | !endif\r | |
27 | !if $(FD_SIZE_IN_MB) == 3\r | |
28 | DEFINE FVMAIN_COMPACT_SIZE = 0x2ff000\r | |
29 | !endif\r | |
30 | \r | |
6f5872b1 MC |
31 | [FD.QEMU_EFI]\r |
32 | BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # QEMU assigns 0 - 0x8000000 for a BootROM\r | |
7551529c | 33 | Size = $(FD_SIZE)|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device\r |
6f5872b1 MC |
34 | ErasePolarity = 1\r |
35 | \r | |
36 | # This one is tricky, it must be: BlockSize * NumBlocks = Size\r | |
37 | BlockSize = 0x00001000\r | |
7551529c | 38 | NumBlocks = $(FD_NUM_BLOCKS)\r |
6f5872b1 MC |
39 | \r |
40 | ################################################################################\r | |
41 | #\r | |
42 | # Following are lists of FD Region layout which correspond to the locations of different\r | |
43 | # images within the flash device.\r | |
44 | #\r | |
45 | # Regions must be defined in ascending order and may not overlap.\r | |
46 | #\r | |
47 | # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r | |
48 | # the pipe "|" character, followed by the size of the region, also in hex with the leading\r | |
49 | # "0x" characters. Like:\r | |
50 | # Offset|Size\r | |
51 | # PcdOffsetCName|PcdSizeCName\r | |
52 | # RegionType <FV, DATA, or FILE>\r | |
53 | #\r | |
54 | ################################################################################\r | |
55 | \r | |
56 | #\r | |
57 | # UEFI has trouble dealing with FVs that reside at physical address 0x0.\r | |
58 | # So instead, put a hardcoded 'jump to 0x1000' at offset 0x0, and put the\r | |
59 | # real FV at offset 0x1000\r | |
60 | #\r | |
61 | 0x00000000|0x00001000\r | |
62 | DATA = {\r | |
63 | !if $(ARCH) == AARCH64\r | |
64 | 0x00, 0x04, 0x00, 0x14 # 'b 0x1000' in AArch64 ASM\r | |
65 | !else\r | |
66 | 0xfe, 0x03, 0x00, 0xea # 'b 0x1000' in AArch32 ASM\r | |
67 | !endif\r | |
68 | }\r | |
69 | \r | |
7551529c | 70 | 0x00001000|$(FVMAIN_COMPACT_SIZE)\r |
6f5872b1 MC |
71 | gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r |
72 | FV = FVMAIN_COMPACT\r | |
73 | \r | |
bf57a42a | 74 | !include VarStore.fdf.inc\r |
6f5872b1 MC |
75 | \r |
76 | ################################################################################\r | |
77 | #\r | |
78 | # FV Section\r | |
79 | #\r | |
80 | # [FV] section is used to define what components or modules are placed within a flash\r | |
81 | # device file. This section also defines order the components and modules are positioned\r | |
82 | # within the image. The [FV] section consists of define statements, set statements and\r | |
83 | # module statements.\r | |
84 | #\r | |
85 | ################################################################################\r | |
86 | \r | |
c9eca0b2 | 87 | !include ArmVirtQemuFvMain.fdf.inc\r |
26a36374 | 88 | \r |
6f5872b1 MC |
89 | [FV.FVMAIN_COMPACT]\r |
90 | FvAlignment = 16\r | |
91 | ERASE_POLARITY = 1\r | |
92 | MEMORY_MAPPED = TRUE\r | |
93 | STICKY_WRITE = TRUE\r | |
94 | LOCK_CAP = TRUE\r | |
95 | LOCK_STATUS = TRUE\r | |
96 | WRITE_DISABLED_CAP = TRUE\r | |
97 | WRITE_ENABLED_CAP = TRUE\r | |
98 | WRITE_STATUS = TRUE\r | |
99 | WRITE_LOCK_CAP = TRUE\r | |
100 | WRITE_LOCK_STATUS = TRUE\r | |
101 | READ_DISABLED_CAP = TRUE\r | |
102 | READ_ENABLED_CAP = TRUE\r | |
103 | READ_STATUS = TRUE\r | |
104 | READ_LOCK_CAP = TRUE\r | |
105 | READ_LOCK_STATUS = TRUE\r | |
106 | \r | |
6f5872b1 MC |
107 | INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf\r |
108 | INF MdeModulePkg/Core/Pei/PeiMain.inf\r | |
109 | INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r | |
110 | INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r | |
111 | INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r | |
112 | INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r | |
113 | INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r | |
114 | INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r | |
115 | \r | |
f5cb3767 AB |
116 | !if $(TPM2_ENABLE) == TRUE\r |
117 | INF MdeModulePkg/Universal/ResetSystemPei/ResetSystemPei.inf\r | |
ddd34a81 AB |
118 | INF OvmfPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf\r |
119 | INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf\r | |
f5cb3767 AB |
120 | !endif\r |
121 | \r | |
6f5872b1 MC |
122 | FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r |
123 | SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r | |
124 | SECTION FV_IMAGE = FVMAIN\r | |
125 | }\r | |
126 | }\r | |
127 | \r | |
f4aee089 | 128 | !include ArmVirtRules.fdf.inc\r |