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1 | /** @file |
2 | ||
3 | Copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR> | |
4 | ||
5 | All rights reserved. This program and the accompanying materials | |
6 | are licensed and made available under the terms and conditions of the BSD License | |
7 | which accompanies this distribution. The full text of the license may be found at | |
8 | http://opensource.org/licenses/bsd-license.php | |
9 | ||
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
12 | ||
13 | **/ | |
14 | ||
15 | #ifndef __OMAP3530GPIO_H__ | |
16 | #define __OMAP3530GPIO_H__ | |
17 | ||
18 | #define GPIO1_BASE (0x48310000) | |
19 | #define GPIO2_BASE (0x49050000) | |
20 | #define GPIO3_BASE (0x49052000) | |
21 | #define GPIO4_BASE (0x49054000) | |
22 | #define GPIO5_BASE (0x49056000) | |
23 | #define GPIO6_BASE (0x49058000) | |
24 | ||
25 | #define GPIO_SYSCONFIG (0x0010) | |
26 | #define GPIO_SYSSTATUS (0x0014) | |
27 | #define GPIO_IRQSTATUS1 (0x0018) | |
28 | #define GPIO_IRQENABLE1 (0x001C) | |
29 | #define GPIO_WAKEUPENABLE (0x0020) | |
30 | #define GPIO_IRQSTATUS2 (0x0028) | |
31 | #define GPIO_IRQENABLE2 (0x002C) | |
32 | #define GPIO_CTRL (0x0030) | |
33 | #define GPIO_OE (0x0034) | |
34 | #define GPIO_DATAIN (0x0038) | |
35 | #define GPIO_DATAOUT (0x003C) | |
36 | #define GPIO_LEVELDETECT0 (0x0040) | |
37 | #define GPIO_LEVELDETECT1 (0x0044) | |
38 | #define GPIO_RISINGDETECT (0x0048) | |
39 | #define GPIO_FALLINGDETECT (0x004C) | |
40 | #define GPIO_DEBOUNCENABLE (0x0050) | |
41 | #define GPIO_DEBOUNCINGTIME (0x0054) | |
42 | #define GPIO_CLEARIRQENABLE1 (0x0060) | |
43 | #define GPIO_SETIRQENABLE1 (0x0064) | |
44 | #define GPIO_CLEARIRQENABLE2 (0x0070) | |
45 | #define GPIO_SETIRQENABLE2 (0x0074) | |
46 | #define GPIO_CLEARWKUENA (0x0080) | |
47 | #define GPIO_SETWKUENA (0x0084) | |
48 | #define GPIO_CLEARDATAOUT (0x0090) | |
49 | #define GPIO_SETDATAOUT (0x0094) | |
50 | ||
51 | #define GPIO_SYSCONFIG_IDLEMODE_MASK (3UL << 3) | |
52 | #define GPIO_SYSCONFIG_IDLEMODE_FORCE (0UL << 3) | |
53 | #define GPIO_SYSCONFIG_IDLEMODE_NONE (1UL << 3) | |
54 | #define GPIO_SYSCONFIG_IDLEMODE_SMART (2UL << 3) | |
55 | #define GPIO_SYSCONFIG_ENAWAKEUP_MASK (1UL << 2) | |
56 | #define GPIO_SYSCONFIG_ENAWAKEUP_DISABLE (0UL << 2) | |
57 | #define GPIO_SYSCONFIG_ENAWAKEUP_ENABLE (1UL << 2) | |
58 | #define GPIO_SYSCONFIG_SOFTRESET_MASK (1UL << 1) | |
59 | #define GPIO_SYSCONFIG_SOFTRESET_NORMAL (0UL << 1) | |
60 | #define GPIO_SYSCONFIG_SOFTRESET_RESET (1UL << 1) | |
61 | #define GPIO_SYSCONFIG_AUTOIDLE_MASK (1UL << 0) | |
62 | #define GPIO_SYSCONFIG_AUTOIDLE_FREE_RUN (0UL << 0) | |
63 | #define GPIO_SYSCONFIG_AUTOIDLE_ON (1UL << 0) | |
64 | ||
65 | #define GPIO_SYSSTATUS_RESETDONE_MASK (1UL << 0) | |
66 | #define GPIO_SYSSTATUS_RESETDONE_ONGOING (0UL << 0) | |
67 | #define GPIO_SYSSTATUS_RESETDONE_COMPLETE (1UL << 0) | |
68 | ||
69 | #define GPIO_IRQSTATUS_MASK(x) (1UL << (x)) | |
70 | #define GPIO_IRQSTATUS_NOT_TRIGGERED(x) (0UL << (x)) | |
71 | #define GPIO_IRQSTATUS_TRIGGERED(x) (1UL << (x)) | |
72 | #define GPIO_IRQSTATUS_CLEAR(x) (1UL << (x)) | |
73 | ||
74 | #define GPIO_IRQENABLE_MASK(x) (1UL << (x)) | |
75 | #define GPIO_IRQENABLE_DISABLE(x) (0UL << (x)) | |
76 | #define GPIO_IRQENABLE_ENABLE(x) (1UL << (x)) | |
77 | ||
78 | #define GPIO_WAKEUPENABLE_MASK(x) (1UL << (x)) | |
79 | #define GPIO_WAKEUPENABLE_DISABLE(x) (0UL << (x)) | |
80 | #define GPIO_WAKEUPENABLE_ENABLE(x) (1UL << (x)) | |
81 | ||
82 | #define GPIO_CTRL_GATINGRATIO_MASK (3UL << 1) | |
83 | #define GPIO_CTRL_GATINGRATIO_DIV_1 (0UL << 1) | |
84 | #define GPIO_CTRL_GATINGRATIO_DIV_2 (1UL << 1) | |
85 | #define GPIO_CTRL_GATINGRATIO_DIV_4 (2UL << 1) | |
86 | #define GPIO_CTRL_GATINGRATIO_DIV_8 (3UL << 1) | |
87 | #define GPIO_CTRL_DISABLEMODULE_MASK (1UL << 0) | |
88 | #define GPIO_CTRL_DISABLEMODULE_ENABLE (0UL << 0) | |
89 | #define GPIO_CTRL_DISABLEMODULE_DISABLE (1UL << 0) | |
90 | ||
91 | #define GPIO_OE_MASK(x) (1UL << (x)) | |
92 | #define GPIO_OE_OUTPUT(x) (0UL << (x)) | |
93 | #define GPIO_OE_INPUT(x) (1UL << (x)) | |
94 | ||
95 | #define GPIO_DATAIN_MASK(x) (1UL << (x)) | |
96 | ||
97 | #define GPIO_DATAOUT_MASK(x) (1UL << (x)) | |
98 | ||
99 | #define GPIO_LEVELDETECT_MASK(x) (1UL << (x)) | |
100 | #define GPIO_LEVELDETECT_DISABLE(x) (0UL << (x)) | |
101 | #define GPIO_LEVELDETECT_ENABLE(x) (1UL << (x)) | |
102 | ||
103 | #define GPIO_RISINGDETECT_MASK(x) (1UL << (x)) | |
104 | #define GPIO_RISINGDETECT_DISABLE(x) (0UL << (x)) | |
105 | #define GPIO_RISINGDETECT_ENABLE(x) (1UL << (x)) | |
106 | ||
107 | #define GPIO_FALLINGDETECT_MASK(x) (1UL << (x)) | |
108 | #define GPIO_FALLINGDETECT_DISABLE(x) (0UL << (x)) | |
109 | #define GPIO_FALLINGDETECT_ENABLE(x) (1UL << (x)) | |
110 | ||
111 | #define GPIO_DEBOUNCENABLE_MASK(x) (1UL << (x)) | |
112 | #define GPIO_DEBOUNCENABLE_DISABLE(x) (0UL << (x)) | |
113 | #define GPIO_DEBOUNCENABLE_ENABLE(x) (1UL << (x)) | |
114 | ||
115 | #define GPIO_DEBOUNCINGTIME_MASK (0xFF) | |
116 | #define GPIO_DEBOUNCINGTIME_US(x) ((((x) / 31) - 1) & GPIO_DEBOUNCINGTIME_MASK) | |
117 | ||
118 | #define GPIO_CLEARIRQENABLE_BIT(x) (1UL << (x)) | |
119 | ||
120 | #define GPIO_SETIRQENABLE_BIT(x) (1UL << (x)) | |
121 | ||
122 | #define GPIO_CLEARWKUENA_BIT(x) (1UL << (x)) | |
123 | ||
124 | #define GPIO_SETWKUENA_BIT(x) (1UL << (x)) | |
125 | ||
126 | #define GPIO_CLEARDATAOUT_BIT(x) (1UL << (x)) | |
127 | ||
128 | #define GPIO_SETDATAOUT_BIT(x) (1UL << (x)) | |
129 | ||
130 | #endif // __OMAP3530GPIO_H__ | |
131 |