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1 | ================================================================================\r |
2 | Build And Integration Instructions\r | |
3 | 2014 June 24th\r | |
4 | ================================================================================\r | |
5 | \r | |
6 | ================================================================================\r | |
7 | DISCLAIMER\r | |
8 | ================================================================================\r | |
9 | This release note as well as the software described in it is furnished under license\r | |
10 | and may only be used or copied in accordance with the terms of the license. The\r | |
11 | information in this manual is furnished for informational use only, is subject to\r | |
12 | change without notice, and should not be construed as a commitment by Intel Corporation.\r | |
13 | Intel Corporation assumes no responsibility or liability for any errors or inaccuracies\r | |
14 | that may appear in this document or any software that may be provided in association\r | |
15 | with this document.\r | |
16 | Except as permitted by such license, no part of this document may be reproduced,\r | |
17 | stored in a retrieval system, or transmitted in any form or by any means without\r | |
18 | the express written consent of Intel Corporation.\r | |
19 | \r | |
20 | ================================================================================\r | |
21 | INDEX\r | |
22 | ================================================================================\r | |
23 | A. INTRODUCTION\r | |
24 | B. HOW TO BUILD\r | |
25 | C. HOW TO INTEGRATE \r | |
26 | \r | |
27 | ================================================================================\r | |
28 | A. INTRODUCTION\r | |
29 | ================================================================================\r | |
30 | This document provides instructions on how to build Coreboot Uefi Payload and \r | |
31 | how to integrate it into coreboot firmware.\r | |
32 | \r | |
33 | ================================================================================\r | |
34 | B. HOW TO BUILD \r | |
35 | ================================================================================\r | |
36 | 1. Run the below two commands in windows command prompt window:\r | |
37 | edksetup.bat\r | |
38 | \r | |
39 | For debug ia32 build:\r | |
92b48344 | 40 | build -a IA32 -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -b DEBUG -t <ToolChain>\r |
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41 | \r |
42 | For release ia32 build:\r | |
92b48344 | 43 | build -a IA32 -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -b RELEASE -t <ToolChain>\r |
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44 | \r |
45 | For debug X64 build:\r | |
9cb46176 | 46 | build -a IA32 -a X64 -p CorebootPayloadPkg\CorebootPayloadPkgIa32X64.dsc -b DEBUG -t <ToolChain>\r |
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47 | \r |
48 | For release X64 build:\r | |
9cb46176 | 49 | build -a IA32 -a X64 -p CorebootPayloadPkg\CorebootPayloadPkgIa32X64.dsc -b RELEASE -t <ToolChain>\r |
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50 | \r |
51 | <ToolChain> is the EDK II build environment on your host. Currently it was tested with VS2008x64 toolchain.\r | |
52 | \r | |
53 | For details about EDK II build steps, refer to http://svn.code.sf.net/p/edk2/code/branches/UDK2014/BuildNotes2.txt\r | |
54 | \r | |
55 | 2. If build is successfully, the payload image (UEFIPAYLOAD.fd) will be generated inside the folder of Build\CorebootPayloadPkg.\r | |
56 | \r | |
57 | ================================================================================\r | |
58 | C. HOW TO INTEGRATE\r | |
59 | ================================================================================\r | |
60 | 1. Copy the payload image (UEFIPAYLOAD.fd) into the top-level directory of Coreboot source tree.\r | |
61 | 2. Run "make menuconfig" in linux console to start Coreboot configuration surface.\r | |
62 | 3. In the Payload section,\r | |
63 | 1) Choose "An ELF executable payload" for the option of "Add a payload".\r | |
64 | 2) Type the path of payload image for the option of "Payload path and filename".\r | |
65 | 3) Select the option of "Use LZMA compression for payloads".\r | |
66 | \r | |
67 | 4. If the graphics console is required in Coreboot UEFI payload, running VGA option rom should be enabled.\r | |
68 | For details:\r | |
69 | 1) In the Device section, select the option of "Run VGA Option ROMs".\r | |
70 | 2) In the VGA BIOS section, select the option of "Add a VGA BIOS Image", Input the path of vga bios image \r | |
71 | for the option of VGA BIOS path and filename, give the values of vendor id and device id for the option \r | |
72 | of "VGA device PCI IDs".\r | |
73 | 3) In the Display section,\r | |
74 | Select the option of "Set framebuffer graphics resolution"\r | |
75 | Choose a right display mode for the option of "framebuffer graphics resolution".\r | |
76 | Note: If the boot OS is windows, please choose the display mode supporting 32 bit color.\r | |
77 | Select the option of "Keep VESA framebuffer"\r | |
78 | \r | |
79 | 5. Press ESC key to exit the Coreboot configuration surface. If there is a question prompted like "Do you wish to save your new configuration?",\r | |
80 | choose Yes.\r | |
81 | \r | |
82 | 6. Run "make" to build the coreboot firmware image.\r |