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54bd8079 | 1 | /** @file\r |
2 | Implementation of CPU I/O 2 Protocol based on Framework CPU I/O Protocol.\r | |
3 | \r | |
4 | Intel's Framework CPU I/O Protocol is replaced by CPU I/O 2 Protocol in PI.\r | |
5 | This module produces PI CPU I/O 2 Protocol on top of Framework CPU I/O Protocol.\r | |
6 | \r | |
584d5652 HT |
7 | Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r |
8 | This program and the accompanying materials\r | |
54bd8079 | 9 | are licensed and made available under the terms and conditions of the BSD License\r |
10 | which accompanies this distribution. The full text of the license may be found at\r | |
11 | http://opensource.org/licenses/bsd-license.php\r | |
12 | \r | |
13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
15 | \r | |
16 | **/\r | |
17 | \r | |
18 | #include "CpuIo2OnCpuIoThunk.h"\r | |
19 | \r | |
20 | EFI_HANDLE mCpuIo2Handle = NULL;\r | |
21 | EFI_CPU_IO_PROTOCOL *mCpuIo;\r | |
22 | EFI_CPU_IO2_PROTOCOL mCpuIo2 = {\r | |
23 | {\r | |
24 | CpuMemoryServiceRead,\r | |
25 | CpuMemoryServiceWrite\r | |
26 | },\r | |
27 | {\r | |
28 | CpuIoServiceRead,\r | |
29 | CpuIoServiceWrite\r | |
30 | }\r | |
31 | };\r | |
32 | \r | |
33 | /**\r | |
34 | Enables a driver to read memory-mapped registers in the PI System memory space.\r | |
35 | \r | |
36 | @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r | |
37 | @param[in] Width Signifies the width of the memory operation.\r | |
38 | @param[in] Address The base address of the memory operation.\r | |
39 | @param[in] Count The number of memory operations to perform. The number of bytes moved\r | |
40 | is Width size * Count, starting at Address.\r | |
26a76fbc | 41 | @param[in, out] Buffer The destination buffer to store the results.\r |
54bd8079 | 42 | \r |
43 | @retval EFI_SUCCESS The data was read from or written to the EFI system.\r | |
44 | @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.\r | |
45 | @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.\r | |
46 | Or,The address range specified by Address, Width, and Count is not valid for this EFI system.\r | |
47 | \r | |
48 | **/\r | |
49 | EFI_STATUS\r | |
50 | EFIAPI\r | |
51 | CpuMemoryServiceRead (\r | |
52 | IN EFI_CPU_IO2_PROTOCOL *This,\r | |
53 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
54 | IN UINT64 Address,\r | |
55 | IN UINTN Count,\r | |
26a76fbc | 56 | IN OUT VOID *Buffer\r |
54bd8079 | 57 | )\r |
58 | {\r | |
59 | return mCpuIo->Mem.Read (\r | |
60 | mCpuIo,\r | |
61 | Width,\r | |
62 | Address,\r | |
63 | Count,\r | |
64 | Buffer\r | |
65 | );\r | |
66 | }\r | |
67 | \r | |
68 | /**\r | |
69 | Enables a driver to write memory-mapped registers in the PI System memory space.\r | |
70 | \r | |
71 | @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r | |
72 | @param[in] Width Signifies the width of the memory operation.\r | |
73 | @param[in] Address The base address of the memory operation.\r | |
74 | @param[in] Count The number of memory operations to perform. The number of bytes moved\r | |
75 | is Width size * Count, starting at Address.\r | |
26a76fbc | 76 | @param[in, out] Buffer The source buffer from which to write data.\r |
54bd8079 | 77 | \r |
78 | @retval EFI_SUCCESS The data was read from or written to the EFI system.\r | |
79 | @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.\r | |
80 | @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.\r | |
81 | Or,The address range specified by Address, Width, and Count is not valid for this EFI system.\r | |
82 | \r | |
83 | **/\r | |
84 | EFI_STATUS\r | |
85 | EFIAPI\r | |
86 | CpuMemoryServiceWrite (\r | |
87 | IN EFI_CPU_IO2_PROTOCOL *This,\r | |
88 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
89 | IN UINT64 Address,\r | |
90 | IN UINTN Count,\r | |
26a76fbc | 91 | IN OUT VOID *Buffer\r |
54bd8079 | 92 | )\r |
93 | {\r | |
94 | return mCpuIo->Mem.Write (\r | |
95 | mCpuIo,\r | |
96 | Width,\r | |
97 | Address,\r | |
98 | Count,\r | |
99 | Buffer\r | |
100 | );\r | |
101 | }\r | |
102 | \r | |
103 | /**\r | |
104 | Enables a driver to read registers in the PI CPU I/O space.\r | |
105 | \r | |
106 | @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r | |
107 | @param[in] Width Signifies the width of the I/O operation.\r | |
108 | @param[in] Address The base address of the I/O operation. The caller is responsible\r | |
109 | for aligning the Address if required. \r | |
110 | @param[in] Count The number of I/O operations to perform. The number of bytes moved\r | |
111 | is Width size * Count, starting at Address.\r | |
26a76fbc | 112 | @param[in, out] Buffer The destination buffer to store the results.\r |
54bd8079 | 113 | \r |
114 | @retval EFI_SUCCESS The data was read from or written to the EFI system.\r | |
115 | @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.\r | |
116 | @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.\r | |
117 | Or,The address range specified by Address, Width, and Count is not valid for this EFI system.\r | |
118 | \r | |
119 | **/\r | |
120 | EFI_STATUS\r | |
121 | EFIAPI\r | |
122 | CpuIoServiceRead (\r | |
123 | IN EFI_CPU_IO2_PROTOCOL *This,\r | |
124 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
125 | IN UINT64 Address,\r | |
126 | IN UINTN Count,\r | |
26a76fbc | 127 | IN OUT VOID *Buffer\r |
54bd8079 | 128 | )\r |
129 | {\r | |
130 | return mCpuIo->Io.Read (\r | |
131 | mCpuIo,\r | |
132 | Width,\r | |
133 | Address,\r | |
134 | Count,\r | |
135 | Buffer\r | |
136 | );\r | |
137 | }\r | |
138 | \r | |
139 | /**\r | |
140 | Enables a driver to write registers in the PI CPU I/O space.\r | |
141 | \r | |
142 | @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r | |
143 | @param[in] Width Signifies the width of the I/O operation.\r | |
144 | @param[in] Address The base address of the I/O operation. The caller is responsible\r | |
145 | for aligning the Address if required. \r | |
146 | @param[in] Count The number of I/O operations to perform. The number of bytes moved\r | |
147 | is Width size * Count, starting at Address.\r | |
26a76fbc | 148 | @param[in, out] Buffer The source buffer from which to write data.\r |
54bd8079 | 149 | \r |
150 | @retval EFI_SUCCESS The data was read from or written to the EFI system.\r | |
151 | @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.\r | |
152 | @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.\r | |
153 | Or,The address range specified by Address, Width, and Count is not valid for this EFI system.\r | |
154 | \r | |
155 | **/\r | |
156 | EFI_STATUS\r | |
157 | EFIAPI\r | |
158 | CpuIoServiceWrite (\r | |
159 | IN EFI_CPU_IO2_PROTOCOL *This,\r | |
160 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
161 | IN UINT64 Address,\r | |
162 | IN UINTN Count,\r | |
26a76fbc | 163 | IN OUT VOID *Buffer\r |
54bd8079 | 164 | )\r |
165 | {\r | |
166 | return mCpuIo->Io.Write (\r | |
167 | mCpuIo,\r | |
168 | Width,\r | |
169 | Address,\r | |
170 | Count,\r | |
171 | Buffer\r | |
172 | );\r | |
173 | }\r | |
174 | \r | |
175 | /**\r | |
176 | Entrypoint of CPU I/O 2 DXE thunk module.\r | |
177 | \r | |
178 | @param ImageHandle The firmware allocated handle for the EFI image.\r | |
179 | @param SystemTable A pointer to the EFI System Table.\r | |
180 | \r | |
181 | @retval EFI_SUCCESS The entry point is executed successfully.\r | |
182 | \r | |
183 | **/\r | |
184 | EFI_STATUS\r | |
185 | EFIAPI\r | |
186 | CpuIo2OnCpuIoThunkInitialize (\r | |
187 | IN EFI_HANDLE ImageHandle,\r | |
188 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
189 | )\r | |
190 | {\r | |
191 | EFI_STATUS Status;\r | |
192 | \r | |
193 | //\r | |
194 | // Locate and cache Framework CPU I/O Protocol.\r | |
195 | //\r | |
196 | Status = gBS->LocateProtocol (\r | |
197 | &gEfiCpuIoProtocolGuid, \r | |
198 | NULL, \r | |
199 | (VOID **) &mCpuIo\r | |
200 | );\r | |
201 | ASSERT_EFI_ERROR (Status);\r | |
202 | \r | |
203 | //\r | |
204 | // Install the CPU I/O 2 Protocol on a new handle.\r | |
205 | //\r | |
206 | Status = gBS->InstallMultipleProtocolInterfaces (\r | |
207 | &mCpuIo2Handle,\r | |
208 | &gEfiCpuIo2ProtocolGuid, &mCpuIo2,\r | |
209 | NULL\r | |
210 | );\r | |
211 | ASSERT_EFI_ERROR (Status);\r | |
212 | \r | |
213 | return Status;\r | |
214 | }\r |