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d79eed91 1/**\r
2Module produce PciCfgPpi on top of PciCfgPpi2.\r
3\r
4PIWG's PI specification replaces Inte's EFI Specification 1.10.\r
5EFI_PEI_PCI_CFG_PPI defined in Inte's EFI Specification 1.10 is replaced by\r
6EFI_PEI_PCI_CFG2_PPI in PI 1.0.\r
7This module produces PciCfgPpi on top of PciCfgPpi2. This module is used on platform when both of\r
8these two conditions are true:\r
91) Framework module is present that consumes PCI CFG AND\r
102) R9 module is present that produces PCI CFG2 but not PCI CFG\r
11\r
4259256b 12\r
13Copyright (c) 2006 - 2008 Intel Corporation. <BR>\r
14All rights reserved. This program and the accompanying materials\r
15are licensed and made available under the terms and conditions of the BSD License\r
16which accompanies this distribution. The full text of the license may be found at\r
17http://opensource.org/licenses/bsd-license.php\r
18\r
19THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
20WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
21Module Name:\r
d79eed91 22**/\r
4259256b 23\r
24#include <PiPei.h>\r
25#include <Ppi/PciCfg.h>\r
26#include <Ppi/PciCfg2.h>\r
27#include <Library/DebugLib.h>\r
28\r
29//\r
30// Function Prototypes\r
31//\r
d79eed91 32\r
33/**\r
34 Reads from a given location in the PCI configuration space.\r
35\r
36 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
37\r
38 @param This Pointer to local data for the interface.\r
39\r
40 @param Width The width of the access. Enumerated in bytes.\r
41 See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
42\r
43 @param Address The physical address of the access. The format of\r
44 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
45\r
46 @param Buffer A pointer to the buffer of data..\r
47\r
48\r
49 @retval EFI_SUCCESS The function completed successfully.\r
50\r
51 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
52\r
53 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
54 time.\r
55\r
56**/\r
4259256b 57EFI_STATUS\r
58EFIAPI\r
59PciCfgRead (\r
60 IN EFI_PEI_SERVICES **PeiServices,\r
61 IN EFI_PEI_PCI_CFG_PPI *This,\r
62 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
63 IN UINT64 Address,\r
64 IN OUT VOID *Buffer\r
65 );\r
66\r
d79eed91 67/**\r
68 Write to a given location in the PCI configuration space.\r
69\r
70 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
71\r
72 @param This Pointer to local data for the interface.\r
73\r
74 @param Width The width of the access. Enumerated in bytes.\r
75 See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
76\r
77 @param Address The physical address of the access. The format of\r
78 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
79\r
80 @param Buffer A pointer to the buffer of data..\r
81\r
82\r
83 @retval EFI_SUCCESS The function completed successfully.\r
84\r
85 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
86\r
87 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
88 time.\r
89\r
90**/\r
4259256b 91EFI_STATUS\r
92EFIAPI\r
93PciCfgWrite (\r
94 IN EFI_PEI_SERVICES **PeiServices,\r
95 IN EFI_PEI_PCI_CFG_PPI *This,\r
96 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
97 IN UINT64 Address,\r
98 IN OUT VOID *Buffer\r
99 );\r
100\r
d79eed91 101/**\r
102 PCI read-modify-write operation.\r
103\r
104 @param PeiServices An indirect pointer to the PEI Services Table\r
105 published by the PEI Foundation.\r
106\r
107 @param This Pointer to local data for the interface.\r
108\r
109 @param Width The width of the access. Enumerated in bytes. Type\r
110 EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
111\r
112 @param Address The physical address of the access.\r
113\r
114 @param SetBits Points to value to bitwise-OR with the read configuration value.\r
115 The size of the value is determined by Width.\r
116\r
117 @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
118 The size of the value is determined by Width.\r
119\r
120\r
121 @retval EFI_SUCCESS The function completed successfully.\r
122\r
123 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
124\r
125 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting\r
126 the operation at this time.\r
127\r
128**/\r
4259256b 129EFI_STATUS\r
130EFIAPI\r
131PciCfgModify (\r
132 IN EFI_PEI_SERVICES **PeiServices,\r
133 IN EFI_PEI_PCI_CFG_PPI *This,\r
134 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
135 IN UINT64 Address,\r
136 IN UINTN SetBits,\r
137 IN UINTN ClearBits\r
138 );\r
139\r
140//\r
141// Module globals\r
142//\r
143EFI_PEI_PCI_CFG_PPI mPciCfgPpi = {\r
144 PciCfgRead,\r
145 PciCfgWrite,\r
146 PciCfgModify,\r
147};\r
148\r
149EFI_PEI_PPI_DESCRIPTOR mPpiListPciCfg = {\r
150 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
151 &gEfiPciCfgPpiInServiceTableGuid,\r
152 &mPciCfgPpi\r
153};\r
154\r
d79eed91 155/**\r
156\r
157 Standard PEIM entry point.\r
158\r
159 @param FfsHeadher The FFS file header\r
160 @param PeiServices General purpose services available to every PEIM.\r
161\r
162\r
163 @retval EFI_SUCCESS if the interface could be successfully\r
164 installed\r
165\r
166--*/\r
4259256b 167EFI_STATUS\r
168EFIAPI\r
169PeimInitializePciCfg (\r
d79eed91 170 IN EFI_PEI_FILE_HANDLE FfsHeader,\r
4259256b 171 IN CONST EFI_PEI_SERVICES **PeiServices\r
172 )\r
d79eed91 173{\r
174 //\r
175 // Publish the PciCfgToPciCfg2 Thunk capability to other modules\r
176 //\r
177 return (*PeiServices)->InstallPpi (PeiServices, &mPpiListPciCfg);\r
178}\r
4259256b 179\r
d79eed91 180/**\r
181 Reads from a given location in the PCI configuration space.\r
4259256b 182\r
d79eed91 183 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
4259256b 184\r
d79eed91 185 @param This Pointer to local data for the interface.\r
4259256b 186\r
d79eed91 187 @param Width The width of the access. Enumerated in bytes.\r
188 See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
4259256b 189\r
d79eed91 190 @param Address The physical address of the access. The format of\r
191 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
4259256b 192\r
d79eed91 193 @param Buffer A pointer to the buffer of data..\r
4259256b 194\r
4259256b 195\r
d79eed91 196 @retval EFI_SUCCESS The function completed successfully.\r
197\r
198 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
199\r
200 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
201 time.\r
202\r
203**/\r
4259256b 204EFI_STATUS\r
205EFIAPI\r
206PciCfgRead (\r
207 IN EFI_PEI_SERVICES **PeiServices,\r
208 IN EFI_PEI_PCI_CFG_PPI *This,\r
209 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
210 IN UINT64 Address,\r
211 IN OUT VOID *Buffer\r
212 )\r
213{\r
214 EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
215\r
216 PciCfg2 = (*PeiServices)->PciCfg;\r
217\r
218 return PciCfg2->Read ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, Buffer);\r
219}\r
220\r
d79eed91 221\r
222/**\r
223 Write to a given location in the PCI configuration space.\r
224\r
225 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
226\r
227 @param This Pointer to local data for the interface.\r
228\r
229 @param Width The width of the access. Enumerated in bytes.\r
230 See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
231\r
232 @param Address The physical address of the access. The format of\r
233 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
234\r
235 @param Buffer A pointer to the buffer of data..\r
236\r
237\r
238 @retval EFI_SUCCESS The function completed successfully.\r
239\r
240 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
241\r
242 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
243 time.\r
244\r
245**/\r
4259256b 246EFI_STATUS\r
247EFIAPI\r
248PciCfgWrite (\r
249 IN EFI_PEI_SERVICES **PeiServices,\r
250 IN EFI_PEI_PCI_CFG_PPI *This,\r
251 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
252 IN UINT64 Address,\r
253 IN OUT VOID *Buffer\r
254 )\r
255{\r
256 EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
257\r
258 PciCfg2 = (*PeiServices)->PciCfg;\r
259\r
260 return PciCfg2->Write ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, Buffer);\r
261}\r
262\r
d79eed91 263/**\r
264 PCI read-modify-write operation.\r
265\r
266 @param PeiServices An indirect pointer to the PEI Services Table\r
267 published by the PEI Foundation.\r
268\r
269 @param This Pointer to local data for the interface.\r
270\r
271 @param Width The width of the access. Enumerated in bytes. Type\r
272 EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
273\r
274 @param Address The physical address of the access.\r
275\r
276 @param SetBits Points to value to bitwise-OR with the read configuration value.\r
277 The size of the value is determined by Width.\r
278\r
279 @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
280 The size of the value is determined by Width.\r
281\r
282\r
283 @retval EFI_SUCCESS The function completed successfully.\r
284\r
285 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
286\r
287 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting\r
288 the operation at this time.\r
289\r
290**/\r
4259256b 291EFI_STATUS\r
292EFIAPI\r
293PciCfgModify (\r
294 IN EFI_PEI_SERVICES **PeiServices,\r
295 IN EFI_PEI_PCI_CFG_PPI *This,\r
296 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
297 IN UINT64 Address,\r
298 IN UINTN SetBits,\r
299 IN UINTN ClearBits\r
300 )\r
301{\r
302 EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
303\r
304 PciCfg2 = (*PeiServices)->PciCfg;\r
305\r
306 return PciCfg2->Modify ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, &SetBits, &ClearBits);\r
307}\r