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b341712e | 1 | #------------------------------------------------------------------------------\r |
2 | #*\r | |
3 | #* Copyright (c) 2008, Intel Corporation \r | |
4 | #* All rights reserved. This program and the accompanying materials \r | |
5 | #* are licensed and made available under the terms and conditions of the BSD License \r | |
6 | #* which accompanies this distribution. The full text of the license may be found at \r | |
7 | #* http://opensource.org/licenses/bsd-license.php \r | |
8 | #* \r | |
9 | #* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | #* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | #* \r | |
12 | #* Module Name:\r | |
13 | #*\r | |
14 | #* Cpu.asm\r | |
15 | #* \r | |
16 | #* Abstract:\r | |
17 | #* \r | |
18 | #------------------------------------------------------------------------------\r | |
19 | #include <EfiBind.h>\r | |
20 | \r | |
21 | .globl ASM_PFX(EfiHalt)\r | |
22 | .globl ASM_PFX(EfiWbinvd)\r | |
23 | .globl ASM_PFX(EfiInvd)\r | |
24 | .globl ASM_PFX(EfiCpuid)\r | |
25 | .globl ASM_PFX(EfiReadTsc)\r | |
26 | .globl ASM_PFX(EfiDisableCache)\r | |
27 | .globl ASM_PFX(EfiEnableCache)\r | |
28 | .globl ASM_PFX(EfiReadMsr)\r | |
29 | .globl ASM_PFX(EfiGetEflags)\r | |
30 | .globl ASM_PFX(EfiDisableInterrupts)\r | |
31 | .globl ASM_PFX(EfiEnableInterrupts)\r | |
32 | .globl ASM_PFX(EfiCpuidExt)\r | |
33 | \r | |
34 | .text\r | |
35 | \r | |
36 | \r | |
37 | #------------------------------------------------------------------------------\r | |
38 | # VOID\r | |
39 | # EfiHalt (\r | |
40 | # VOID\r | |
41 | # )\r | |
42 | #------------------------------------------------------------------------------\r | |
43 | ASM_PFX(EfiHalt):\r | |
44 | hlt\r | |
45 | retq\r | |
46 | \r | |
47 | \r | |
48 | #------------------------------------------------------------------------------\r | |
49 | # VOID\r | |
50 | # EfiWbinvd (\r | |
51 | # VOID\r | |
52 | # )\r | |
53 | #------------------------------------------------------------------------------\r | |
54 | ASM_PFX(EfiWbinvd):\r | |
55 | wbinvd\r | |
56 | retq\r | |
57 | \r | |
58 | \r | |
59 | #------------------------------------------------------------------------------\r | |
60 | # VOID\r | |
61 | # EfiInvd (\r | |
62 | # VOID\r | |
63 | # )\r | |
64 | #------------------------------------------------------------------------------\r | |
65 | ASM_PFX(EfiInvd):\r | |
66 | invd\r | |
67 | retq\r | |
68 | \r | |
69 | #------------------------------------------------------------------------------\r | |
70 | # VOID\r | |
71 | # EfiCpuid (\r | |
72 | # IN UINT32 RegisterInEax, // rcx \r | |
73 | # OUT EFI_CPUID_REGISTER *Reg OPTIONAL // rdx \r | |
74 | # )\r | |
75 | #------------------------------------------------------------------------------\r | |
76 | ASM_PFX(EfiCpuid):\r | |
9a1ed798 | 77 | push %rbx\r |
78 | mov %rdx,%r8\r | |
79 | mov %rcx,%rax\r | |
80 | cpuid \r | |
81 | cmp $0x0,%r8\r | |
82 | je _Exit\r | |
83 | mov %eax,(%r8)\r | |
84 | mov %ebx,0x4(%r8)\r | |
85 | mov %ecx,0x8(%r8)\r | |
b341712e | 86 | mov %edx,0xc(%r8)\r |
87 | _Exit: \r | |
88 | pop %rbx\r | |
89 | retq\r | |
90 | \r | |
91 | #------------------------------------------------------------------------------\r | |
92 | # UINT64\r | |
93 | # EfiReadMsr (\r | |
94 | # IN UINT32 Index, // rcx\r | |
95 | # )\r | |
96 | #------------------------------------------------------------------------------\r | |
97 | ASM_PFX(EfiReadMsr):\r | |
9a1ed798 | 98 | rdmsr \r |
99 | shl $0x20,%rdx\r | |
100 | or %rdx,%rax\r | |
101 | retq \r | |
b341712e | 102 | \r |
103 | #------------------------------------------------------------------------------\r | |
104 | # VOID\r | |
105 | # EfiWriteMsr (\r | |
106 | # IN UINT32 Index, // rcx\r | |
107 | # IN UINT64 Value // rdx\r | |
108 | # )\r | |
109 | #------------------------------------------------------------------------------\r | |
110 | ASM_PFX(EfiWriteMsr):\r | |
9a1ed798 | 111 | mov %rdx,%rax\r |
112 | sar $0x20,%rdx\r | |
113 | wrmsr \r | |
b341712e | 114 | retq \r |
115 | \r | |
116 | #------------------------------------------------------------------------------\r | |
117 | # UINT64\r | |
118 | # EfiReadTsc (\r | |
119 | # VOID\r | |
120 | # );\r | |
121 | #------------------------------------------------------------------------------\r | |
122 | ASM_PFX(EfiReadTsc):\r | |
9a1ed798 | 123 | rdtsc \r |
124 | shl $0x20,%rax\r | |
125 | shrd $0x20,%rdx,%rax\r | |
126 | retq \r | |
b341712e | 127 | \r |
128 | #------------------------------------------------------------------------------\r | |
129 | # VOID\r | |
130 | # EfiDisableCache (\r | |
131 | # VOID\r | |
132 | # );\r | |
133 | #------------------------------------------------------------------------------\r | |
134 | ASM_PFX(EfiDisableCache):\r | |
135 | # added a check to see if cache is already disabled. If it is, then skip.\r | |
9a1ed798 | 136 | mov %cr0,%rax\r |
137 | and $0x60000000,%rax\r | |
138 | cmp $0x0,%rax\r | |
139 | jne 1f\r | |
140 | mov %cr0,%rax\r | |
141 | or $0x60000000,%rax\r | |
142 | mov %rax,%cr0\r | |
143 | wbinvd \r | |
b341712e | 144 | 1:\r |
9a1ed798 | 145 | retq \r |
b341712e | 146 | \r |
147 | #------------------------------------------------------------------------------\r | |
148 | # VOID\r | |
149 | # EfiEnableCache (\r | |
150 | # VOID\r | |
151 | # );\r | |
152 | #------------------------------------------------------------------------------\r | |
153 | ASM_PFX(EfiEnableCache):\r | |
9a1ed798 | 154 | invd \r |
155 | mov %cr0,%rax\r | |
156 | and $0xffffffff9fffffff,%rax\r | |
157 | mov %rax,%cr0\r | |
158 | retq \r | |
b341712e | 159 | \r |
160 | #------------------------------------------------------------------------------\r | |
161 | # UINTN\r | |
162 | # EfiGetEflags (\r | |
163 | # VOID\r | |
164 | # );\r | |
165 | #------------------------------------------------------------------------------\r | |
166 | ASM_PFX(EfiGetEflags):\r | |
9a1ed798 | 167 | pushfq \r |
168 | pop %rax\r | |
169 | retq \r | |
b341712e | 170 | \r |
171 | #------------------------------------------------------------------------------\r | |
172 | # VOID\r | |
173 | # EfiDisableInterrupts (\r | |
174 | # VOID\r | |
175 | # );\r | |
176 | #------------------------------------------------------------------------------\r | |
177 | ASM_PFX(EfiDisableInterrupts):\r | |
178 | cli\r | |
179 | ret\r | |
180 | \r | |
181 | #------------------------------------------------------------------------------\r | |
182 | # VOID\r | |
183 | # EfiEnableInterrupts (\r | |
184 | # VOID\r | |
185 | # );\r | |
186 | #------------------------------------------------------------------------------\r | |
187 | ASM_PFX(EfiEnableInterrupts):\r | |
188 | sti\r | |
189 | ret\r | |
190 | #------------------------------------------------------------------------------\r | |
191 | # VOID\r | |
192 | # EfiCpuidExt (\r | |
193 | # IN UINT32 RegisterInEax,\r | |
194 | # IN UINT32 CacheLevel,\r | |
195 | # OUT EFI_CPUID_REGISTER *Regs \r | |
196 | # )\r | |
197 | #------------------------------------------------------------------------------\r | |
198 | ASM_PFX(EfiCpuidExt):\r | |
9a1ed798 | 199 | push %rbx\r |
200 | mov %rcx,%rax\r | |
201 | mov %rdx,%rcx\r | |
202 | cpuid \r | |
203 | mov %eax,(%r8)\r | |
204 | mov %ebx,0x4(%r8)\r | |
205 | mov %ecx,0x8(%r8)\r | |
206 | mov %edx,0xc(%r8)\r | |
207 | pop %rbx\r | |
208 | retq \r |