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3eb9473e | 1 | /*++\r |
2 | \r | |
3 | Copyright (c) 2004 - 2006, Intel Corporation \r | |
4 | All rights reserved. This program and the accompanying materials \r | |
5 | are licensed and made available under the terms and conditions of the BSD License \r | |
6 | which accompanies this distribution. The full text of the license may be found at \r | |
7 | http://opensource.org/licenses/bsd-license.php \r | |
8 | \r | |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | \r | |
12 | \r | |
13 | Module Name:\r | |
14 | \r | |
15 | EdkIIGlueBaseLib.h\r | |
16 | \r | |
17 | Abstract: \r | |
18 | \r | |
19 | Memory-only library functions with no library constructor/destructor\r | |
20 | \r | |
21 | --*/\r | |
22 | \r | |
23 | #ifndef __EDKII_GLUE_BASE_LIB_H__\r | |
24 | #define __EDKII_GLUE_BASE_LIB_H__\r | |
25 | \r | |
26 | \r | |
27 | //\r | |
28 | // String Functions\r | |
29 | //\r | |
30 | #define StrCpy(_Dest, _Source) GlueStrCpy(_Dest, _Source)\r | |
31 | #define StrnCpy(_Dest, _Source, _Length) GlueStrnCpy(_Dest, _Source, _Length)\r | |
32 | #define StrLen(_String) GlueStrLen(_String)\r | |
33 | #define StrSize(_String) GlueStrSize(_String)\r | |
34 | #define StrCmp(_FristString, _SecondString) GlueStrCmp(_FristString, _SecondString)\r | |
35 | #define StrnCmp(_FirstString, _SecondString, _Length) GlueStrnCmp(_FirstString, _SecondString, _Length)\r | |
36 | #define StrCat(_Dest, _Source) GlueStrCat(_Dest, _Source)\r | |
37 | #define StrnCat(_Dest, _Source, _Length) GlueStrnCat(_Dest, _Source, _Length)\r | |
38 | \r | |
39 | //\r | |
40 | // Linked List\r | |
41 | //\r | |
42 | #define InitializeListHead(_ListHead) GlueInitializeListHead(_ListHead)\r | |
43 | #define InsertHeadList(_ListHead, _Entry ) GlueInsertHeadList(_ListHead, _Entry)\r | |
44 | #define InsertTailList(_ListHead, _Entry) GlueInsertTailList(_ListHead, _Entry)\r | |
45 | #define GetFirstNode(_List) GlueGetFirstNode(_List)\r | |
46 | #define GetNextNode(_List, _Node) GlueGetNextNode(_List, _Node)\r | |
47 | #define IsListEmpty(_ListHead) GlueIsListEmpty(_ListHead)\r | |
48 | #define IsNull(_List, _Node) GlueIsNull(_List, _Node)\r | |
49 | #define IsNodeAtEnd(_List, _Node) GlueIsNodeAtEnd(_List, _Node)\r | |
50 | #define SwapListEntries(_FirstEntry, _SecondEntry) GlueSwapListEntries(_FirstEntry, _SecondEntry)\r | |
51 | #define RemoveEntryList(_Entry) GlueRemoveEntryList(_Entry)\r | |
52 | \r | |
53 | //\r | |
54 | // Math Functions\r | |
55 | //\r | |
56 | #define LShiftU64(_Op, _Count) GlueLShiftU64(_Op, _Count)\r | |
57 | #define RShiftU64(_Op, _Count) GlueRShiftU64(_Op, _Count)\r | |
58 | #define MultU64x32(_Multiplicand, _Multiplier) GlueMultU64x32(_Multiplicand, _Multiplier)\r | |
59 | #define DivU64x32(_Dividend, _Divisor) GlueDivU64x32(_Dividend, _Divisor)\r | |
60 | \r | |
61 | //\r | |
62 | // Others\r | |
63 | //\r | |
64 | #define GetInterruptState() GlueGetInterruptState()\r | |
65 | \r | |
66 | \r | |
67 | //\r | |
68 | // Definitions for architecture specific types\r | |
69 | // These include SPIN_LOCK and BASE_LIBRARY_JUMP_BUFFER\r | |
70 | //\r | |
71 | \r | |
72 | //\r | |
73 | // SPIN_LOCK\r | |
74 | //\r | |
c7f33ca4 | 75 | typedef volatile UINTN SPIN_LOCK;\r |
3eb9473e | 76 | \r |
77 | #if defined (MDE_CPU_IA32)\r | |
78 | //\r | |
79 | // IA32 context buffer used by SetJump() and LongJump()\r | |
80 | //\r | |
81 | typedef struct {\r | |
82 | UINT32 Ebx;\r | |
83 | UINT32 Esi;\r | |
84 | UINT32 Edi;\r | |
85 | UINT32 Ebp;\r | |
86 | UINT32 Esp;\r | |
87 | UINT32 Eip;\r | |
88 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
89 | \r | |
90 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
91 | \r | |
92 | #elif defined (MDE_CPU_IPF)\r | |
93 | //\r | |
94 | // IPF context buffer used by SetJump() and LongJump()\r | |
95 | //\r | |
96 | typedef struct {\r | |
97 | UINT64 F2[2];\r | |
98 | UINT64 F3[2];\r | |
99 | UINT64 F4[2];\r | |
100 | UINT64 F5[2];\r | |
101 | UINT64 F16[2];\r | |
102 | UINT64 F17[2];\r | |
103 | UINT64 F18[2];\r | |
104 | UINT64 F19[2];\r | |
105 | UINT64 F20[2];\r | |
106 | UINT64 F21[2];\r | |
107 | UINT64 F22[2];\r | |
108 | UINT64 F23[2];\r | |
109 | UINT64 F24[2];\r | |
110 | UINT64 F25[2];\r | |
111 | UINT64 F26[2];\r | |
112 | UINT64 F27[2];\r | |
113 | UINT64 F28[2];\r | |
114 | UINT64 F29[2];\r | |
115 | UINT64 F30[2];\r | |
116 | UINT64 F31[2];\r | |
117 | UINT64 R4;\r | |
118 | UINT64 R5;\r | |
119 | UINT64 R6;\r | |
120 | UINT64 R7;\r | |
121 | UINT64 SP;\r | |
122 | UINT64 BR0;\r | |
123 | UINT64 BR1;\r | |
124 | UINT64 BR2;\r | |
125 | UINT64 BR3;\r | |
126 | UINT64 BR4;\r | |
127 | UINT64 BR5;\r | |
128 | UINT64 InitialUNAT;\r | |
129 | UINT64 AfterSpillUNAT;\r | |
130 | UINT64 PFS;\r | |
131 | UINT64 BSP;\r | |
132 | UINT64 Predicates;\r | |
133 | UINT64 LoopCount;\r | |
134 | UINT64 FPSR;\r | |
135 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
136 | \r | |
137 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r | |
138 | \r | |
139 | #elif defined (MDE_CPU_X64)\r | |
140 | //\r | |
141 | // X64 context buffer used by SetJump() and LongJump()\r | |
142 | //\r | |
143 | typedef struct {\r | |
144 | UINT64 Rbx;\r | |
145 | UINT64 Rsp;\r | |
146 | UINT64 Rbp;\r | |
147 | UINT64 Rdi;\r | |
148 | UINT64 Rsi;\r | |
149 | UINT64 R12;\r | |
150 | UINT64 R13;\r | |
151 | UINT64 R14;\r | |
152 | UINT64 R15;\r | |
153 | UINT64 Rip;\r | |
154 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
155 | \r | |
156 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
157 | \r | |
158 | #elif defined (MDE_CPU_EBC)\r | |
159 | //\r | |
160 | // EBC context buffer used by SetJump() and LongJump()\r | |
161 | //\r | |
162 | typedef struct {\r | |
163 | UINT64 R0;\r | |
164 | UINT64 R1;\r | |
165 | UINT64 R2;\r | |
166 | UINT64 R3;\r | |
167 | UINT64 IP;\r | |
168 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
169 | \r | |
170 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
171 | \r | |
172 | #else\r | |
173 | #error Unknown Processor Type\r | |
174 | #endif\r | |
175 | \r | |
176 | //\r | |
177 | // String Services\r | |
178 | //\r | |
179 | \r | |
180 | /**\r | |
181 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r | |
182 | string and returns the new Unicode string.\r | |
183 | \r | |
184 | This function copies the contents of the Unicode string Source to the Unicode\r | |
185 | string Destination, and returns Destination. If Source and Destination\r | |
186 | overlap, then the results are undefined.\r | |
187 | \r | |
188 | If Destination is NULL, then ASSERT().\r | |
189 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
190 | If Source is NULL, then ASSERT().\r | |
191 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
192 | If Source and Destination overlap, then ASSERT().\r | |
193 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
194 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
195 | Null-terminator, then ASSERT().\r | |
196 | \r | |
197 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
198 | @param Source Pointer to a Null-terminated Unicode string.\r | |
199 | \r | |
200 | @return Destiantion\r | |
201 | \r | |
202 | **/\r | |
203 | CHAR16 *\r | |
204 | EFIAPI\r | |
205 | GlueStrCpy (\r | |
206 | OUT CHAR16 *Destination,\r | |
207 | IN CONST CHAR16 *Source\r | |
208 | );\r | |
c7f33ca4 | 209 | \r |
210 | \r | |
3eb9473e | 211 | /**\r |
212 | Copies one Null-terminated Unicode string with a maximum length to another\r | |
213 | Null-terminated Unicode string with a maximum length and returns the new\r | |
214 | Unicode string.\r | |
215 | \r | |
216 | This function copies the contents of the Unicode string Source to the Unicode\r | |
217 | string Destination, and returns Destination. At most, Length Unicode\r | |
218 | characters are copied from Source to Destination. If Length is 0, then\r | |
219 | Destination is returned unmodified. If Length is greater that the number of\r | |
220 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
221 | characters. If Source and Destination overlap, then the results are\r | |
222 | undefined.\r | |
223 | \r | |
224 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
225 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
226 | If Length > 0 and Source is NULL, then ASSERT().\r | |
227 | If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().\r | |
228 | If Source and Destination overlap, then ASSERT().\r | |
229 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
230 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
231 | Null-terminator, then ASSERT().\r | |
232 | \r | |
233 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
234 | @param Source Pointer to a Null-terminated Unicode string.\r | |
235 | @param Length Maximum number of Unicode characters to copy.\r | |
236 | \r | |
237 | @return Destination\r | |
238 | \r | |
239 | **/\r | |
240 | CHAR16 *\r | |
241 | EFIAPI\r | |
242 | GlueStrnCpy (\r | |
243 | OUT CHAR16 *Destination,\r | |
244 | IN CONST CHAR16 *Source,\r | |
245 | IN UINTN Length\r | |
246 | );\r | |
c7f33ca4 | 247 | \r |
248 | \r | |
3eb9473e | 249 | /**\r |
250 | Returns the length of a Null-terminated Unicode string.\r | |
251 | \r | |
252 | This function returns the number of Unicode characters in the Null-terminated\r | |
253 | Unicode string specified by String.\r | |
254 | \r | |
255 | If String is NULL, then ASSERT().\r | |
256 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
257 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
258 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
259 | Null-terminator, then ASSERT().\r | |
260 | \r | |
261 | @param String Pointer to a Null-terminated Unicode string.\r | |
262 | \r | |
263 | @return The length of String.\r | |
264 | \r | |
265 | **/\r | |
266 | UINTN\r | |
267 | EFIAPI\r | |
268 | GlueStrLen (\r | |
269 | IN CONST CHAR16 *String\r | |
270 | );\r | |
c7f33ca4 | 271 | \r |
272 | \r | |
3eb9473e | 273 | /**\r |
274 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
275 | Null terminator.\r | |
276 | \r | |
277 | This function returns the size, in bytes, of the Null-terminated Unicode\r | |
278 | string specified by String.\r | |
279 | \r | |
280 | If String is NULL, then ASSERT().\r | |
281 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
282 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
283 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
284 | Null-terminator, then ASSERT().\r | |
285 | \r | |
286 | @param String Pointer to a Null-terminated Unicode string.\r | |
287 | \r | |
288 | @return The size of String.\r | |
289 | \r | |
290 | **/\r | |
291 | UINTN\r | |
292 | EFIAPI\r | |
293 | GlueStrSize (\r | |
294 | IN CONST CHAR16 *String\r | |
295 | );\r | |
c7f33ca4 | 296 | \r |
297 | \r | |
3eb9473e | 298 | /**\r |
299 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
300 | between the first mismatched Unicode characters.\r | |
301 | \r | |
302 | This function compares the Null-terminated Unicode string FirstString to the\r | |
303 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
304 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
305 | mismatched Unicode character in SecondString subtracted from the first\r | |
306 | mismatched Unicode character in FirstString.\r | |
307 | \r | |
308 | If FirstString is NULL, then ASSERT().\r | |
309 | If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r | |
310 | If SecondString is NULL, then ASSERT().\r | |
311 | If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r | |
312 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
313 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
314 | Null-terminator, then ASSERT().\r | |
315 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
316 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
317 | Null-terminator, then ASSERT().\r | |
318 | \r | |
319 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
320 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
321 | \r | |
322 | @retval 0 FirstString is identical to SecondString.\r | |
323 | @retval !=0 FirstString is not identical to SecondString.\r | |
324 | \r | |
325 | **/\r | |
326 | INTN\r | |
327 | EFIAPI\r | |
328 | GlueStrCmp (\r | |
329 | IN CONST CHAR16 *FirstString,\r | |
330 | IN CONST CHAR16 *SecondString\r | |
331 | );\r | |
c7f33ca4 | 332 | \r |
333 | \r | |
3eb9473e | 334 | /**\r |
335 | Compares two Null-terminated Unicode strings with maximum lengths, and\r | |
336 | returns the difference between the first mismatched Unicode characters.\r | |
337 | \r | |
338 | This function compares the Null-terminated Unicode string FirstString to the\r | |
339 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
340 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
341 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
342 | value returned is the first mismatched Unicode character in SecondString\r | |
343 | subtracted from the first mismatched Unicode character in FirstString.\r | |
344 | \r | |
345 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
346 | If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().\r | |
347 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
348 | If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().\r | |
349 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
350 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
351 | Null-terminator, then ASSERT().\r | |
352 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
353 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
354 | Null-terminator, then ASSERT().\r | |
355 | \r | |
356 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
357 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
358 | @param Length Maximum number of Unicode characters to compare.\r | |
359 | \r | |
360 | @retval 0 FirstString is identical to SecondString.\r | |
361 | @retval !=0 FirstString is not identical to SecondString.\r | |
362 | \r | |
363 | **/\r | |
364 | INTN\r | |
365 | EFIAPI\r | |
366 | GlueStrnCmp (\r | |
367 | IN CONST CHAR16 *FirstString,\r | |
368 | IN CONST CHAR16 *SecondString,\r | |
369 | IN UINTN Length\r | |
370 | );\r | |
c7f33ca4 | 371 | \r |
372 | \r | |
3eb9473e | 373 | /**\r |
374 | Concatenates one Null-terminated Unicode string to another Null-terminated\r | |
375 | Unicode string, and returns the concatenated Unicode string.\r | |
376 | \r | |
377 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
378 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
379 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
380 | Unicode String is returned. If Source and Destination overlap, then the\r | |
381 | results are undefined.\r | |
382 | \r | |
383 | If Destination is NULL, then ASSERT().\r | |
384 | If Destination is not aligned on a 16-bit bounadary, then ASSERT().\r | |
385 | If Source is NULL, then ASSERT().\r | |
386 | If Source is not aligned on a 16-bit bounadary, then ASSERT().\r | |
387 | If Source and Destination overlap, then ASSERT().\r | |
388 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
389 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
390 | Null-terminator, then ASSERT().\r | |
391 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
392 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
393 | Null-terminator, then ASSERT().\r | |
394 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
395 | and Source results in a Unicode string with more than\r | |
396 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
397 | Null-terminator, then ASSERT().\r | |
398 | \r | |
399 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
400 | @param Source Pointer to a Null-terminated Unicode string.\r | |
401 | \r | |
402 | @return Destination\r | |
403 | \r | |
404 | **/\r | |
405 | CHAR16 *\r | |
406 | EFIAPI\r | |
407 | GlueStrCat (\r | |
408 | IN OUT CHAR16 *Destination,\r | |
409 | IN CONST CHAR16 *Source\r | |
410 | );\r | |
c7f33ca4 | 411 | \r |
412 | \r | |
3eb9473e | 413 | /**\r |
414 | Concatenates one Null-terminated Unicode string with a maximum length to the\r | |
415 | end of another Null-terminated Unicode string, and returns the concatenated\r | |
416 | Unicode string.\r | |
417 | \r | |
418 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
419 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
420 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
421 | most, Length Unicode characters are concatenated from Source to the end of\r | |
422 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
423 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
424 | the results are undefined.\r | |
425 | \r | |
426 | If Destination is NULL, then ASSERT().\r | |
427 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
428 | If Length > 0 and Source is NULL, then ASSERT().\r | |
429 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
430 | If Source and Destination overlap, then ASSERT().\r | |
431 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
432 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
433 | Null-terminator, then ASSERT().\r | |
434 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
435 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
436 | Null-terminator, then ASSERT().\r | |
437 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
438 | and Source results in a Unicode string with more than\r | |
439 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
440 | Null-terminator, then ASSERT().\r | |
441 | \r | |
442 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
443 | @param Source Pointer to a Null-terminated Unicode string.\r | |
444 | @param Length Maximum number of Unicode characters to concatenate from\r | |
445 | Source.\r | |
446 | \r | |
447 | @return Destination\r | |
448 | \r | |
449 | **/\r | |
450 | CHAR16 *\r | |
451 | EFIAPI\r | |
452 | GlueStrnCat (\r | |
453 | IN OUT CHAR16 *Destination,\r | |
454 | IN CONST CHAR16 *Source,\r | |
455 | IN UINTN Length\r | |
456 | );\r | |
457 | \r | |
458 | /**\r | |
c7f33ca4 | 459 | Returns the first occurance of a Null-terminated Unicode sub-string\r |
3eb9473e | 460 | in a Null-terminated Unicode string.\r |
461 | \r | |
c7f33ca4 | 462 | This function scans the contents of the Null-terminated Unicode string\r |
463 | specified by String and returns the first occurrence of SearchString.\r | |
464 | If SearchString is not found in String, then NULL is returned. If\r | |
465 | the length of SearchString is zero, then String is\r | |
3eb9473e | 466 | returned.\r |
c7f33ca4 | 467 | \r |
3eb9473e | 468 | If String is NULL, then ASSERT().\r |
469 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
470 | If SearchString is NULL, then ASSERT().\r | |
471 | If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r | |
472 | \r | |
c7f33ca4 | 473 | If PcdMaximumUnicodeStringLength is not zero, and SearchString\r |
474 | or String contains more than PcdMaximumUnicodeStringLength Unicode\r | |
3eb9473e | 475 | characters not including the Null-terminator, then ASSERT().\r |
476 | \r | |
477 | @param String Pointer to a Null-terminated Unicode string.\r | |
478 | @param SearchString Pointer to a Null-terminated Unicode string to search for.\r | |
479 | \r | |
480 | @retval NULL If the SearchString does not appear in String.\r | |
481 | @retval !NULL If there is a match.\r | |
482 | \r | |
483 | **/\r | |
484 | CHAR16 *\r | |
485 | EFIAPI\r | |
486 | StrStr (\r | |
487 | IN CONST CHAR16 *String,\r | |
488 | IN CONST CHAR16 *SearchString\r | |
489 | );\r | |
490 | \r | |
491 | /**\r | |
c7f33ca4 | 492 | Convert a Null-terminated Unicode decimal string to a value of\r |
3eb9473e | 493 | type UINTN.\r |
494 | \r | |
c7f33ca4 | 495 | This function returns a value of type UINTN by interpreting the contents\r |
496 | of the Unicode string specified by String as a decimal number. The format\r | |
3eb9473e | 497 | of the input Unicode string String is:\r |
c7f33ca4 | 498 | \r |
3eb9473e | 499 | [spaces] [decimal digits].\r |
c7f33ca4 | 500 | \r |
501 | The valid decimal digit character is in the range [0-9]. The\r | |
502 | function will ignore the pad space, which includes spaces or\r | |
503 | tab characters, before [decimal digits]. The running zero in the\r | |
504 | beginning of [decimal digits] will be ignored. Then, the function\r | |
505 | stops at the first character that is a not a valid decimal character\r | |
506 | or a Null-terminator, whichever one comes first.\r | |
507 | \r | |
3eb9473e | 508 | If String is NULL, then ASSERT().\r |
c7f33ca4 | 509 | If String is not aligned in a 16-bit boundary, then ASSERT().\r |
3eb9473e | 510 | If String has only pad spaces, then 0 is returned.\r |
c7f33ca4 | 511 | If String has no pad spaces or valid decimal digits,\r |
3eb9473e | 512 | then 0 is returned.\r |
c7f33ca4 | 513 | If the number represented by String overflows according\r |
3eb9473e | 514 | to the range defined by UINTN, then ASSERT().\r |
c7f33ca4 | 515 | \r |
516 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
517 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
3eb9473e | 518 | the Null-terminator, then ASSERT().\r |
519 | \r | |
520 | @param String Pointer to a Null-terminated Unicode string.\r | |
521 | \r | |
c7f33ca4 | 522 | @retval UINTN\r |
3eb9473e | 523 | \r |
524 | **/\r | |
525 | UINTN\r | |
526 | EFIAPI\r | |
527 | StrDecimalToUintn (\r | |
528 | IN CONST CHAR16 *String\r | |
529 | );\r | |
530 | \r | |
531 | /**\r | |
c7f33ca4 | 532 | Convert a Null-terminated Unicode decimal string to a value of\r |
3eb9473e | 533 | type UINT64.\r |
534 | \r | |
c7f33ca4 | 535 | This function returns a value of type UINT64 by interpreting the contents\r |
536 | of the Unicode string specified by String as a decimal number. The format\r | |
3eb9473e | 537 | of the input Unicode string String is:\r |
c7f33ca4 | 538 | \r |
3eb9473e | 539 | [spaces] [decimal digits].\r |
c7f33ca4 | 540 | \r |
541 | The valid decimal digit character is in the range [0-9]. The\r | |
542 | function will ignore the pad space, which includes spaces or\r | |
543 | tab characters, before [decimal digits]. The running zero in the\r | |
544 | beginning of [decimal digits] will be ignored. Then, the function\r | |
545 | stops at the first character that is a not a valid decimal character\r | |
546 | or a Null-terminator, whichever one comes first.\r | |
547 | \r | |
3eb9473e | 548 | If String is NULL, then ASSERT().\r |
c7f33ca4 | 549 | If String is not aligned in a 16-bit boundary, then ASSERT().\r |
3eb9473e | 550 | If String has only pad spaces, then 0 is returned.\r |
c7f33ca4 | 551 | If String has no pad spaces or valid decimal digits,\r |
3eb9473e | 552 | then 0 is returned.\r |
c7f33ca4 | 553 | If the number represented by String overflows according\r |
3eb9473e | 554 | to the range defined by UINT64, then ASSERT().\r |
c7f33ca4 | 555 | \r |
556 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
557 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
3eb9473e | 558 | the Null-terminator, then ASSERT().\r |
559 | \r | |
560 | @param String Pointer to a Null-terminated Unicode string.\r | |
561 | \r | |
c7f33ca4 | 562 | @retval UINT64\r |
3eb9473e | 563 | \r |
564 | **/\r | |
565 | UINT64\r | |
566 | EFIAPI\r | |
567 | StrDecimalToUint64 (\r | |
568 | IN CONST CHAR16 *String\r | |
569 | );\r | |
c7f33ca4 | 570 | \r |
3eb9473e | 571 | \r |
572 | /**\r | |
573 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r | |
574 | \r | |
c7f33ca4 | 575 | This function returns a value of type UINTN by interpreting the contents\r |
576 | of the Unicode string specified by String as a hexadecimal number.\r | |
3eb9473e | 577 | The format of the input Unicode string String is:\r |
c7f33ca4 | 578 | \r |
579 | [spaces][zeros][x][hexadecimal digits].\r | |
580 | \r | |
581 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
582 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
583 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
584 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
585 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
586 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
587 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
3eb9473e | 588 | a not a valid hexadecimal character or NULL, whichever one comes first.\r |
589 | \r | |
590 | If String is NULL, then ASSERT().\r | |
591 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
592 | If String has only pad spaces, then zero is returned.\r | |
c7f33ca4 | 593 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r |
3eb9473e | 594 | then zero is returned.\r |
c7f33ca4 | 595 | If the number represented by String overflows according to the range defined by\r |
3eb9473e | 596 | UINTN, then ASSERT().\r |
597 | \r | |
c7f33ca4 | 598 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r |
599 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
3eb9473e | 600 | then ASSERT().\r |
601 | \r | |
602 | @param String Pointer to a Null-terminated Unicode string.\r | |
603 | \r | |
604 | @retval UINTN\r | |
605 | \r | |
606 | **/\r | |
607 | UINTN\r | |
608 | EFIAPI\r | |
609 | StrHexToUintn (\r | |
610 | IN CONST CHAR16 *String\r | |
611 | );\r | |
612 | \r | |
c7f33ca4 | 613 | \r |
3eb9473e | 614 | /**\r |
615 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r | |
616 | \r | |
c7f33ca4 | 617 | This function returns a value of type UINT64 by interpreting the contents\r |
618 | of the Unicode string specified by String as a hexadecimal number.\r | |
619 | The format of the input Unicode string String is\r | |
620 | \r | |
621 | [spaces][zeros][x][hexadecimal digits].\r | |
622 | \r | |
623 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
624 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
625 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
626 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
627 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
628 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
629 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
3eb9473e | 630 | a not a valid hexadecimal character or NULL, whichever one comes first.\r |
631 | \r | |
632 | If String is NULL, then ASSERT().\r | |
633 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
634 | If String has only pad spaces, then zero is returned.\r | |
c7f33ca4 | 635 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r |
3eb9473e | 636 | then zero is returned.\r |
c7f33ca4 | 637 | If the number represented by String overflows according to the range defined by\r |
3eb9473e | 638 | UINT64, then ASSERT().\r |
639 | \r | |
c7f33ca4 | 640 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r |
641 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
3eb9473e | 642 | then ASSERT().\r |
643 | \r | |
644 | @param String Pointer to a Null-terminated Unicode string.\r | |
645 | \r | |
646 | @retval UINT64\r | |
647 | \r | |
648 | **/\r | |
649 | UINT64\r | |
650 | EFIAPI\r | |
651 | StrHexToUint64 (\r | |
652 | IN CONST CHAR16 *String\r | |
653 | );\r | |
654 | \r | |
c7f33ca4 | 655 | \r |
3eb9473e | 656 | /**\r |
c7f33ca4 | 657 | Convert one Null-terminated Unicode string to a Null-terminated\r |
3eb9473e | 658 | ASCII string and returns the ASCII string.\r |
3eb9473e | 659 | \r |
c7f33ca4 | 660 | This function converts the content of the Unicode string Source\r |
661 | to the ASCII string Destination by copying the lower 8 bits of\r | |
662 | each Unicode character. It returns Destination.\r | |
663 | \r | |
664 | If any Unicode characters in Source contain non-zero value in\r | |
3eb9473e | 665 | the upper 8 bits, then ASSERT().\r |
c7f33ca4 | 666 | \r |
3eb9473e | 667 | If Destination is NULL, then ASSERT().\r |
668 | If Source is NULL, then ASSERT().\r | |
669 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
670 | If Source and Destination overlap, then ASSERT().\r | |
c7f33ca4 | 671 | \r |
672 | If PcdMaximumUnicodeStringLength is not zero, and Source contains\r | |
673 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
3eb9473e | 674 | the Null-terminator, then ASSERT().\r |
c7f33ca4 | 675 | \r |
676 | If PcdMaximumAsciiStringLength is not zero, and Source contains more\r | |
677 | than PcdMaximumAsciiStringLength Unicode characters not including the\r | |
3eb9473e | 678 | Null-terminator, then ASSERT().\r |
679 | \r | |
680 | @param Source Pointer to a Null-terminated Unicode string.\r | |
681 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
682 | \r | |
683 | @reture Destination\r | |
684 | \r | |
685 | **/\r | |
686 | CHAR8 *\r | |
687 | EFIAPI\r | |
688 | UnicodeStrToAsciiStr (\r | |
689 | IN CONST CHAR16 *Source,\r | |
690 | OUT CHAR8 *Destination\r | |
691 | );\r | |
692 | \r | |
c7f33ca4 | 693 | \r |
3eb9473e | 694 | /**\r |
695 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r | |
696 | string and returns the new ASCII string.\r | |
697 | \r | |
698 | This function copies the contents of the ASCII string Source to the ASCII\r | |
699 | string Destination, and returns Destination. If Source and Destination\r | |
700 | overlap, then the results are undefined.\r | |
701 | \r | |
702 | If Destination is NULL, then ASSERT().\r | |
703 | If Source is NULL, then ASSERT().\r | |
704 | If Source and Destination overlap, then ASSERT().\r | |
705 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
706 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
707 | then ASSERT().\r | |
708 | \r | |
709 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
710 | @param Source Pointer to a Null-terminated ASCII string.\r | |
711 | \r | |
712 | @return Destination\r | |
713 | \r | |
714 | **/\r | |
715 | CHAR8 *\r | |
716 | EFIAPI\r | |
717 | AsciiStrCpy (\r | |
718 | OUT CHAR8 *Destination,\r | |
719 | IN CONST CHAR8 *Source\r | |
720 | );\r | |
c7f33ca4 | 721 | \r |
722 | \r | |
3eb9473e | 723 | /**\r |
724 | Copies one Null-terminated ASCII string with a maximum length to another\r | |
725 | Null-terminated ASCII string with a maximum length and returns the new ASCII\r | |
726 | string.\r | |
727 | \r | |
728 | This function copies the contents of the ASCII string Source to the ASCII\r | |
729 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
730 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
731 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
732 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
733 | and Destination overlap, then the results are undefined.\r | |
734 | \r | |
735 | If Destination is NULL, then ASSERT().\r | |
736 | If Source is NULL, then ASSERT().\r | |
737 | If Source and Destination overlap, then ASSERT().\r | |
738 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
739 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
740 | then ASSERT().\r | |
741 | \r | |
742 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
743 | @param Source Pointer to a Null-terminated ASCII string.\r | |
744 | @param Length Maximum number of ASCII characters to copy.\r | |
745 | \r | |
746 | @return Destination\r | |
747 | \r | |
748 | **/\r | |
749 | CHAR8 *\r | |
750 | EFIAPI\r | |
751 | AsciiStrnCpy (\r | |
752 | OUT CHAR8 *Destination,\r | |
753 | IN CONST CHAR8 *Source,\r | |
754 | IN UINTN Length\r | |
755 | );\r | |
c7f33ca4 | 756 | \r |
757 | \r | |
3eb9473e | 758 | /**\r |
759 | Returns the length of a Null-terminated ASCII string.\r | |
760 | \r | |
761 | This function returns the number of ASCII characters in the Null-terminated\r | |
762 | ASCII string specified by String.\r | |
763 | \r | |
764 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
765 | If Length > 0 and Source is NULL, then ASSERT().\r | |
766 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
767 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
768 | then ASSERT().\r | |
769 | \r | |
770 | @param String Pointer to a Null-terminated ASCII string.\r | |
771 | \r | |
772 | @return The length of String.\r | |
773 | \r | |
774 | **/\r | |
775 | UINTN\r | |
776 | EFIAPI\r | |
777 | AsciiStrLen (\r | |
778 | IN CONST CHAR8 *String\r | |
779 | );\r | |
c7f33ca4 | 780 | \r |
781 | \r | |
3eb9473e | 782 | /**\r |
783 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
784 | Null terminator.\r | |
785 | \r | |
786 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
787 | specified by String.\r | |
788 | \r | |
789 | If String is NULL, then ASSERT().\r | |
790 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
791 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
792 | then ASSERT().\r | |
793 | \r | |
794 | @param String Pointer to a Null-terminated ASCII string.\r | |
795 | \r | |
796 | @return The size of String.\r | |
797 | \r | |
798 | **/\r | |
799 | UINTN\r | |
800 | EFIAPI\r | |
801 | AsciiStrSize (\r | |
802 | IN CONST CHAR8 *String\r | |
803 | );\r | |
c7f33ca4 | 804 | \r |
805 | \r | |
3eb9473e | 806 | /**\r |
807 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
808 | between the first mismatched ASCII characters.\r | |
809 | \r | |
810 | This function compares the Null-terminated ASCII string FirstString to the\r | |
811 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
812 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
813 | mismatched ASCII character in SecondString subtracted from the first\r | |
814 | mismatched ASCII character in FirstString.\r | |
815 | \r | |
816 | If FirstString is NULL, then ASSERT().\r | |
817 | If SecondString is NULL, then ASSERT().\r | |
818 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
819 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
820 | then ASSERT().\r | |
821 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
822 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
823 | Null-terminator, then ASSERT().\r | |
824 | \r | |
825 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
826 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
827 | \r | |
828 | @retval 0 FirstString is identical to SecondString.\r | |
829 | @retval !=0 FirstString is not identical to SecondString.\r | |
830 | \r | |
831 | **/\r | |
832 | INTN\r | |
833 | EFIAPI\r | |
834 | AsciiStrCmp (\r | |
835 | IN CONST CHAR8 *FirstString,\r | |
836 | IN CONST CHAR8 *SecondString\r | |
837 | );\r | |
c7f33ca4 | 838 | \r |
839 | \r | |
3eb9473e | 840 | /**\r |
841 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
842 | and returns the difference between the first mismatched ASCII characters.\r | |
843 | \r | |
844 | This function performs a case insensitive comparison of the Null-terminated\r | |
845 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
846 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
847 | value returned is the first mismatched lower case ASCII character in\r | |
848 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
849 | in FirstString.\r | |
850 | \r | |
851 | If FirstString is NULL, then ASSERT().\r | |
852 | If SecondString is NULL, then ASSERT().\r | |
853 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
854 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
855 | then ASSERT().\r | |
856 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
857 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
858 | Null-terminator, then ASSERT().\r | |
859 | \r | |
860 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
861 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
862 | \r | |
863 | @retval 0 FirstString is identical to SecondString using case insensitive\r | |
864 | comparisons.\r | |
865 | @retval !=0 FirstString is not identical to SecondString using case\r | |
866 | insensitive comparisons.\r | |
867 | \r | |
868 | **/\r | |
869 | INTN\r | |
870 | EFIAPI\r | |
871 | AsciiStriCmp (\r | |
872 | IN CONST CHAR8 *FirstString,\r | |
873 | IN CONST CHAR8 *SecondString\r | |
874 | );\r | |
c7f33ca4 | 875 | \r |
876 | \r | |
3eb9473e | 877 | /**\r |
878 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
879 | the difference between the first mismatched ASCII characters.\r | |
880 | \r | |
881 | This function compares the Null-terminated ASCII string FirstString to the\r | |
882 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
883 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
884 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
885 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
886 | first mismatched ASCII character in FirstString.\r | |
887 | \r | |
888 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
889 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
890 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
891 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
892 | then ASSERT().\r | |
893 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more than\r | |
894 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
895 | then ASSERT().\r | |
896 | \r | |
897 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
898 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
899 | \r | |
900 | @retval 0 FirstString is identical to SecondString.\r | |
901 | @retval !=0 FirstString is not identical to SecondString.\r | |
902 | \r | |
903 | **/\r | |
904 | INTN\r | |
905 | EFIAPI\r | |
906 | AsciiStrnCmp (\r | |
907 | IN CONST CHAR8 *FirstString,\r | |
908 | IN CONST CHAR8 *SecondString,\r | |
909 | IN UINTN Length\r | |
910 | );\r | |
c7f33ca4 | 911 | \r |
912 | \r | |
3eb9473e | 913 | /**\r |
914 | Concatenates one Null-terminated ASCII string to another Null-terminated\r | |
915 | ASCII string, and returns the concatenated ASCII string.\r | |
916 | \r | |
917 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
918 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
919 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
920 | String is returned.\r | |
921 | \r | |
922 | If Destination is NULL, then ASSERT().\r | |
923 | If Source is NULL, then ASSERT().\r | |
924 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
925 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
926 | then ASSERT().\r | |
927 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
928 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
929 | then ASSERT().\r | |
930 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r | |
931 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
932 | ASCII characters, then ASSERT().\r | |
933 | \r | |
934 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
935 | @param Source Pointer to a Null-terminated ASCII string.\r | |
936 | \r | |
937 | @return Destination\r | |
938 | \r | |
939 | **/\r | |
940 | CHAR8 *\r | |
941 | EFIAPI\r | |
942 | AsciiStrCat (\r | |
943 | IN OUT CHAR8 *Destination,\r | |
944 | IN CONST CHAR8 *Source\r | |
945 | );\r | |
c7f33ca4 | 946 | \r |
947 | \r | |
3eb9473e | 948 | /**\r |
949 | Concatenates one Null-terminated ASCII string with a maximum length to the\r | |
950 | end of another Null-terminated ASCII string, and returns the concatenated\r | |
951 | ASCII string.\r | |
952 | \r | |
953 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
954 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
955 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
956 | Length ASCII characters are concatenated from Source to the end of\r | |
957 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
958 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
959 | the results are undefined.\r | |
960 | \r | |
961 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
962 | If Length > 0 and Source is NULL, then ASSERT().\r | |
963 | If Source and Destination overlap, then ASSERT().\r | |
964 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r | |
965 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
966 | then ASSERT().\r | |
967 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
968 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
969 | then ASSERT().\r | |
970 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r | |
971 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
972 | ASCII characters not including the Null-terminator, then ASSERT().\r | |
973 | \r | |
974 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
975 | @param Source Pointer to a Null-terminated ASCII string.\r | |
976 | @param Length Maximum number of ASCII characters to concatenate from\r | |
977 | Source.\r | |
978 | \r | |
979 | @return Destination\r | |
980 | \r | |
981 | **/\r | |
982 | CHAR8 *\r | |
983 | EFIAPI\r | |
984 | AsciiStrnCat (\r | |
985 | IN OUT CHAR8 *Destination,\r | |
986 | IN CONST CHAR8 *Source,\r | |
987 | IN UINTN Length\r | |
988 | );\r | |
989 | \r | |
c7f33ca4 | 990 | \r |
3eb9473e | 991 | /**\r |
c7f33ca4 | 992 | Returns the first occurance of a Null-terminated ASCII sub-string\r |
3eb9473e | 993 | in a Null-terminated ASCII string.\r |
994 | \r | |
c7f33ca4 | 995 | This function scans the contents of the ASCII string specified by String\r |
996 | and returns the first occurrence of SearchString. If SearchString is not\r | |
997 | found in String, then NULL is returned. If the length of SearchString is zero,\r | |
3eb9473e | 998 | then String is returned.\r |
c7f33ca4 | 999 | \r |
3eb9473e | 1000 | If String is NULL, then ASSERT().\r |
1001 | If SearchString is NULL, then ASSERT().\r | |
1002 | \r | |
c7f33ca4 | 1003 | If PcdMaximumAsciiStringLength is not zero, and SearchString or\r |
1004 | String contains more than PcdMaximumAsciiStringLength Unicode characters\r | |
3eb9473e | 1005 | not including the Null-terminator, then ASSERT().\r |
1006 | \r | |
1007 | @param String Pointer to a Null-terminated ASCII string.\r | |
1008 | @param SearchString Pointer to a Null-terminated ASCII string to search for.\r | |
1009 | \r | |
1010 | @retval NULL If the SearchString does not appear in String.\r | |
1011 | @retval !NULL If there is a match.\r | |
1012 | \r | |
1013 | **/\r | |
1014 | CHAR8 *\r | |
1015 | EFIAPI\r | |
1016 | AsciiStrStr (\r | |
1017 | IN CONST CHAR8 *String,\r | |
1018 | IN CONST CHAR8 *SearchString\r | |
1019 | );\r | |
1020 | \r | |
c7f33ca4 | 1021 | \r |
3eb9473e | 1022 | /**\r |
c7f33ca4 | 1023 | Convert a Null-terminated ASCII decimal string to a value of type\r |
3eb9473e | 1024 | UINTN.\r |
1025 | \r | |
c7f33ca4 | 1026 | This function returns a value of type UINTN by interpreting the contents\r |
1027 | of the ASCII string String as a decimal number. The format of the input\r | |
3eb9473e | 1028 | ASCII string String is:\r |
c7f33ca4 | 1029 | \r |
3eb9473e | 1030 | [spaces] [decimal digits].\r |
c7f33ca4 | 1031 | \r |
1032 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1033 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1034 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1035 | function stops at the first character that is a not a valid decimal character or\r | |
3eb9473e | 1036 | Null-terminator, whichever on comes first.\r |
c7f33ca4 | 1037 | \r |
3eb9473e | 1038 | If String has only pad spaces, then 0 is returned.\r |
1039 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
c7f33ca4 | 1040 | If the number represented by String overflows according to the range defined by\r |
3eb9473e | 1041 | UINTN, then ASSERT().\r |
1042 | If String is NULL, then ASSERT().\r | |
c7f33ca4 | 1043 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r |
1044 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
3eb9473e | 1045 | then ASSERT().\r |
1046 | \r | |
1047 | @param String Pointer to a Null-terminated ASCII string.\r | |
1048 | \r | |
c7f33ca4 | 1049 | @retval UINTN\r |
3eb9473e | 1050 | \r |
1051 | **/\r | |
1052 | UINTN\r | |
1053 | EFIAPI\r | |
1054 | AsciiStrDecimalToUintn (\r | |
1055 | IN CONST CHAR8 *String\r | |
1056 | );\r | |
1057 | \r | |
c7f33ca4 | 1058 | \r |
3eb9473e | 1059 | /**\r |
c7f33ca4 | 1060 | Convert a Null-terminated ASCII decimal string to a value of type\r |
3eb9473e | 1061 | UINT64.\r |
1062 | \r | |
c7f33ca4 | 1063 | This function returns a value of type UINT64 by interpreting the contents\r |
1064 | of the ASCII string String as a decimal number. The format of the input\r | |
3eb9473e | 1065 | ASCII string String is:\r |
c7f33ca4 | 1066 | \r |
3eb9473e | 1067 | [spaces] [decimal digits].\r |
c7f33ca4 | 1068 | \r |
1069 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1070 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1071 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1072 | function stops at the first character that is a not a valid decimal character or\r | |
3eb9473e | 1073 | Null-terminator, whichever on comes first.\r |
c7f33ca4 | 1074 | \r |
3eb9473e | 1075 | If String has only pad spaces, then 0 is returned.\r |
1076 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
c7f33ca4 | 1077 | If the number represented by String overflows according to the range defined by\r |
3eb9473e | 1078 | UINT64, then ASSERT().\r |
1079 | If String is NULL, then ASSERT().\r | |
c7f33ca4 | 1080 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r |
1081 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
3eb9473e | 1082 | then ASSERT().\r |
1083 | \r | |
1084 | @param String Pointer to a Null-terminated ASCII string.\r | |
1085 | \r | |
c7f33ca4 | 1086 | @retval UINT64\r |
3eb9473e | 1087 | \r |
1088 | **/\r | |
1089 | UINT64\r | |
1090 | EFIAPI\r | |
1091 | AsciiStrDecimalToUint64 (\r | |
1092 | IN CONST CHAR8 *String\r | |
1093 | );\r | |
1094 | \r | |
c7f33ca4 | 1095 | \r |
3eb9473e | 1096 | /**\r |
1097 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r | |
1098 | \r | |
c7f33ca4 | 1099 | This function returns a value of type UINTN by interpreting the contents of\r |
1100 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
3eb9473e | 1101 | string String is:\r |
c7f33ca4 | 1102 | \r |
3eb9473e | 1103 | [spaces][zeros][x][hexadecimal digits].\r |
c7f33ca4 | 1104 | \r |
1105 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1106 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1107 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1108 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1109 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1110 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1111 | digit. Then, the function stops at the first character that is a not a valid\r | |
3eb9473e | 1112 | hexadecimal character or Null-terminator, whichever on comes first.\r |
c7f33ca4 | 1113 | \r |
3eb9473e | 1114 | If String has only pad spaces, then 0 is returned.\r |
1115 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1116 | 0 is returned.\r | |
1117 | \r | |
c7f33ca4 | 1118 | If the number represented by String overflows according to the range defined by UINTN,\r |
3eb9473e | 1119 | then ASSERT().\r |
1120 | If String is NULL, then ASSERT().\r | |
c7f33ca4 | 1121 | If PcdMaximumAsciiStringLength is not zero,\r |
1122 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
3eb9473e | 1123 | the Null-terminator, then ASSERT().\r |
1124 | \r | |
1125 | @param String Pointer to a Null-terminated ASCII string.\r | |
1126 | \r | |
1127 | @retval UINTN\r | |
1128 | \r | |
1129 | **/\r | |
1130 | UINTN\r | |
1131 | EFIAPI\r | |
1132 | AsciiStrHexToUintn (\r | |
1133 | IN CONST CHAR8 *String\r | |
1134 | );\r | |
1135 | \r | |
c7f33ca4 | 1136 | \r |
3eb9473e | 1137 | /**\r |
1138 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r | |
1139 | \r | |
c7f33ca4 | 1140 | This function returns a value of type UINT64 by interpreting the contents of\r |
1141 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
3eb9473e | 1142 | string String is:\r |
c7f33ca4 | 1143 | \r |
3eb9473e | 1144 | [spaces][zeros][x][hexadecimal digits].\r |
c7f33ca4 | 1145 | \r |
1146 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1147 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1148 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1149 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1150 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1151 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1152 | digit. Then, the function stops at the first character that is a not a valid\r | |
3eb9473e | 1153 | hexadecimal character or Null-terminator, whichever on comes first.\r |
c7f33ca4 | 1154 | \r |
3eb9473e | 1155 | If String has only pad spaces, then 0 is returned.\r |
1156 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1157 | 0 is returned.\r | |
1158 | \r | |
c7f33ca4 | 1159 | If the number represented by String overflows according to the range defined by UINT64,\r |
3eb9473e | 1160 | then ASSERT().\r |
1161 | If String is NULL, then ASSERT().\r | |
c7f33ca4 | 1162 | If PcdMaximumAsciiStringLength is not zero,\r |
1163 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
3eb9473e | 1164 | the Null-terminator, then ASSERT().\r |
1165 | \r | |
1166 | @param String Pointer to a Null-terminated ASCII string.\r | |
1167 | \r | |
1168 | @retval UINT64\r | |
1169 | \r | |
1170 | **/\r | |
1171 | UINT64\r | |
1172 | EFIAPI\r | |
1173 | AsciiStrHexToUint64 (\r | |
1174 | IN CONST CHAR8 *String\r | |
1175 | );\r | |
1176 | \r | |
c7f33ca4 | 1177 | \r |
3eb9473e | 1178 | /**\r |
c7f33ca4 | 1179 | Convert one Null-terminated ASCII string to a Null-terminated\r |
3eb9473e | 1180 | Unicode string and returns the Unicode string.\r |
1181 | \r | |
c7f33ca4 | 1182 | This function converts the contents of the ASCII string Source to the Unicode\r |
1183 | string Destination, and returns Destination. The function terminates the\r | |
1184 | Unicode string Destination by appending a Null-terminator character at the end.\r | |
1185 | The caller is responsible to make sure Destination points to a buffer with size\r | |
3eb9473e | 1186 | equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r |
c7f33ca4 | 1187 | \r |
3eb9473e | 1188 | If Destination is NULL, then ASSERT().\r |
1189 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
1190 | If Source is NULL, then ASSERT().\r | |
1191 | If Source and Destination overlap, then ASSERT().\r | |
c7f33ca4 | 1192 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
1193 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
3eb9473e | 1194 | then ASSERT().\r |
c7f33ca4 | 1195 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
1196 | PcdMaximumUnicodeStringLength ASCII characters not including the\r | |
3eb9473e | 1197 | Null-terminator, then ASSERT().\r |
1198 | \r | |
1199 | @param Source Pointer to a Null-terminated ASCII string.\r | |
1200 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
1201 | \r | |
1202 | @reture Destination\r | |
1203 | \r | |
1204 | **/\r | |
1205 | CHAR16 *\r | |
1206 | EFIAPI\r | |
1207 | AsciiStrToUnicodeStr (\r | |
1208 | IN CONST CHAR8 *Source,\r | |
1209 | OUT CHAR16 *Destination\r | |
1210 | );\r | |
1211 | \r | |
c7f33ca4 | 1212 | \r |
3eb9473e | 1213 | /**\r |
1214 | Converts an 8-bit value to an 8-bit BCD value.\r | |
1215 | \r | |
1216 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r | |
1217 | returned.\r | |
1218 | \r | |
1219 | If Value >= 100, then ASSERT().\r | |
1220 | \r | |
1221 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r | |
1222 | \r | |
1223 | @return The BCD value\r | |
1224 | \r | |
1225 | **/\r | |
1226 | UINT8\r | |
1227 | EFIAPI\r | |
1228 | DecimalToBcd8 (\r | |
1229 | IN UINT8 Value\r | |
1230 | );\r | |
1231 | \r | |
c7f33ca4 | 1232 | \r |
3eb9473e | 1233 | /**\r |
1234 | Converts an 8-bit BCD value to an 8-bit value.\r | |
1235 | \r | |
1236 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r | |
1237 | value is returned.\r | |
1238 | \r | |
1239 | If Value >= 0xA0, then ASSERT().\r | |
1240 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r | |
1241 | \r | |
1242 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r | |
1243 | \r | |
1244 | @return The 8-bit value is returned.\r | |
1245 | \r | |
1246 | **/\r | |
1247 | UINT8\r | |
1248 | EFIAPI\r | |
1249 | BcdToDecimal8 (\r | |
1250 | IN UINT8 Value\r | |
1251 | );\r | |
1252 | \r | |
1253 | //\r | |
1254 | // LIST_ENTRY definition\r | |
1255 | //\r | |
1256 | typedef struct _LIST_ENTRY LIST_ENTRY;\r | |
1257 | \r | |
1258 | struct _LIST_ENTRY {\r | |
1259 | LIST_ENTRY *ForwardLink;\r | |
1260 | LIST_ENTRY *BackLink;\r | |
1261 | };\r | |
1262 | \r | |
1263 | //\r | |
1264 | // Linked List Functions and Macros\r | |
1265 | //\r | |
1266 | \r | |
1267 | /**\r | |
1268 | Initializes the head node of a doubly linked list that is declared as a\r | |
1269 | global variable in a module.\r | |
1270 | \r | |
1271 | Initializes the forward and backward links of a new linked list. After\r | |
1272 | initializing a linked list with this macro, the other linked list functions\r | |
1273 | may be used to add and remove nodes from the linked list. This macro results\r | |
1274 | in smaller executables by initializing the linked list in the data section,\r | |
1275 | instead if calling the InitializeListHead() function to perform the\r | |
1276 | equivalent operation.\r | |
1277 | \r | |
1278 | @param ListHead The head note of a list to initiailize.\r | |
1279 | \r | |
1280 | **/\r | |
1281 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&ListHead, &ListHead}\r | |
1282 | \r | |
c7f33ca4 | 1283 | \r |
3eb9473e | 1284 | /**\r |
1285 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
1286 | the head node of the doubly linked list.\r | |
1287 | \r | |
1288 | Initializes the forward and backward links of a new linked list. After\r | |
1289 | initializing a linked list with this function, the other linked list\r | |
1290 | functions may be used to add and remove nodes from the linked list. It is up\r | |
1291 | to the caller of this function to allocate the memory for ListHead.\r | |
1292 | \r | |
1293 | If ListHead is NULL, then ASSERT().\r | |
1294 | \r | |
1295 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
1296 | \r | |
1297 | @return ListHead\r | |
1298 | \r | |
1299 | **/\r | |
1300 | LIST_ENTRY *\r | |
1301 | EFIAPI\r | |
1302 | GlueInitializeListHead (\r | |
1303 | IN LIST_ENTRY *ListHead\r | |
1304 | );\r | |
1305 | \r | |
c7f33ca4 | 1306 | \r |
3eb9473e | 1307 | /**\r |
1308 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
1309 | to the head node of the doubly linked list.\r | |
1310 | \r | |
1311 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
1312 | ListHead, and returns ListHead.\r | |
1313 | \r | |
1314 | If ListHead is NULL, then ASSERT().\r | |
1315 | If Entry is NULL, then ASSERT().\r | |
1316 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r | |
1317 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r | |
1318 | of nodes in ListHead, including the ListHead node, is greater than or\r | |
1319 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1320 | \r | |
1321 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1322 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
1323 | of a doubly linked list.\r | |
1324 | \r | |
1325 | @return ListHead\r | |
1326 | \r | |
1327 | **/\r | |
1328 | LIST_ENTRY *\r | |
1329 | EFIAPI\r | |
1330 | GlueInsertHeadList (\r | |
1331 | IN LIST_ENTRY *ListHead,\r | |
1332 | IN LIST_ENTRY *Entry\r | |
1333 | );\r | |
1334 | \r | |
c7f33ca4 | 1335 | \r |
3eb9473e | 1336 | /**\r |
1337 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
1338 | the head node of the doubly linked list.\r | |
1339 | \r | |
1340 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
1341 | and returns ListHead.\r | |
1342 | \r | |
1343 | If ListHead is NULL, then ASSERT().\r | |
1344 | If Entry is NULL, then ASSERT().\r | |
1345 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r | |
1346 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r | |
1347 | of nodes in ListHead, including the ListHead node, is greater than or\r | |
1348 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1349 | \r | |
1350 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1351 | @param Entry A pointer to a node that is to be added at the end of the\r | |
1352 | doubly linked list.\r | |
1353 | \r | |
1354 | @return ListHead\r | |
1355 | \r | |
1356 | **/\r | |
1357 | LIST_ENTRY *\r | |
1358 | EFIAPI\r | |
1359 | GlueInsertTailList (\r | |
1360 | IN LIST_ENTRY *ListHead,\r | |
1361 | IN LIST_ENTRY *Entry\r | |
1362 | );\r | |
1363 | \r | |
c7f33ca4 | 1364 | \r |
3eb9473e | 1365 | /**\r |
1366 | Retrieves the first node of a doubly linked list.\r | |
1367 | \r | |
1368 | Returns the first node of a doubly linked list. List must have been\r | |
1369 | initialized with InitializeListHead(). If List is empty, then NULL is\r | |
1370 | returned.\r | |
1371 | \r | |
1372 | If List is NULL, then ASSERT().\r | |
1373 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
1374 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r | |
1375 | in List, including the List node, is greater than or equal to\r | |
1376 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1377 | \r | |
1378 | @param List A pointer to the head node of a doubly linked list.\r | |
1379 | \r | |
1380 | @return The first node of a doubly linked list.\r | |
1381 | @retval NULL The list is empty.\r | |
1382 | \r | |
1383 | **/\r | |
1384 | LIST_ENTRY *\r | |
1385 | EFIAPI\r | |
1386 | GlueGetFirstNode (\r | |
1387 | IN CONST LIST_ENTRY *List\r | |
1388 | );\r | |
1389 | \r | |
c7f33ca4 | 1390 | \r |
3eb9473e | 1391 | /**\r |
1392 | Retrieves the next node of a doubly linked list.\r | |
1393 | \r | |
1394 | Returns the node of a doubly linked list that follows Node. List must have\r | |
1395 | been initialized with InitializeListHead(). If List is empty, then List is\r | |
1396 | returned.\r | |
1397 | \r | |
1398 | If List is NULL, then ASSERT().\r | |
1399 | If Node is NULL, then ASSERT().\r | |
1400 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
1401 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r | |
1402 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
1403 | If Node is not a node in List, then ASSERT().\r | |
1404 | \r | |
1405 | @param List A pointer to the head node of a doubly linked list.\r | |
1406 | @param Node A pointer to a node in the doubly linked list.\r | |
1407 | \r | |
1408 | @return Pointer to the next node if one exists. Otherwise a null value which\r | |
1409 | is actually List is returned.\r | |
1410 | \r | |
1411 | **/\r | |
1412 | LIST_ENTRY *\r | |
1413 | EFIAPI\r | |
1414 | GlueGetNextNode (\r | |
1415 | IN CONST LIST_ENTRY *List,\r | |
1416 | IN CONST LIST_ENTRY *Node\r | |
1417 | );\r | |
1418 | \r | |
c7f33ca4 | 1419 | \r |
3eb9473e | 1420 | /**\r |
1421 | Checks to see if a doubly linked list is empty or not.\r | |
1422 | \r | |
1423 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
1424 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
1425 | \r | |
1426 | If ListHead is NULL, then ASSERT().\r | |
1427 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r | |
1428 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r | |
1429 | in List, including the List node, is greater than or equal to\r | |
1430 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1431 | \r | |
1432 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1433 | \r | |
1434 | @retval TRUE The linked list is empty.\r | |
1435 | @retval FALSE The linked list is not empty.\r | |
1436 | \r | |
1437 | **/\r | |
1438 | BOOLEAN\r | |
1439 | EFIAPI\r | |
1440 | GlueIsListEmpty (\r | |
1441 | IN CONST LIST_ENTRY *ListHead\r | |
1442 | );\r | |
1443 | \r | |
c7f33ca4 | 1444 | \r |
3eb9473e | 1445 | /**\r |
1446 | Determines if a node in a doubly linked list is null.\r | |
1447 | \r | |
1448 | Returns FALSE if Node is one of the nodes in the doubly linked list specified\r | |
1449 | by List. Otherwise, TRUE is returned. List must have been initialized with\r | |
1450 | InitializeListHead().\r | |
1451 | \r | |
1452 | If List is NULL, then ASSERT().\r | |
1453 | If Node is NULL, then ASSERT().\r | |
1454 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
1455 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r | |
1456 | in List, including the List node, is greater than or equal to\r | |
1457 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1458 | If Node is not a node in List and Node is not equal to List, then ASSERT().\r | |
1459 | \r | |
1460 | @param List A pointer to the head node of a doubly linked list.\r | |
1461 | @param Node A pointer to a node in the doubly linked list.\r | |
1462 | \r | |
1463 | @retval TRUE Node is one of the nodes in the doubly linked list.\r | |
1464 | @retval FALSE Node is not one of the nodes in the doubly linked list.\r | |
1465 | \r | |
1466 | **/\r | |
1467 | BOOLEAN\r | |
1468 | EFIAPI\r | |
1469 | GlueIsNull (\r | |
1470 | IN CONST LIST_ENTRY *List,\r | |
1471 | IN CONST LIST_ENTRY *Node\r | |
1472 | );\r | |
1473 | \r | |
c7f33ca4 | 1474 | \r |
3eb9473e | 1475 | /**\r |
1476 | Determines if a node the last node in a doubly linked list.\r | |
1477 | \r | |
1478 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
1479 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
1480 | InitializeListHead().\r | |
1481 | \r | |
1482 | If List is NULL, then ASSERT().\r | |
1483 | If Node is NULL, then ASSERT().\r | |
1484 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
1485 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r | |
1486 | in List, including the List node, is greater than or equal to\r | |
1487 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1488 | If Node is not a node in List, then ASSERT().\r | |
1489 | \r | |
1490 | @param List A pointer to the head node of a doubly linked list.\r | |
1491 | @param Node A pointer to a node in the doubly linked list.\r | |
1492 | \r | |
1493 | @retval TRUE Node is the last node in the linked list.\r | |
1494 | @retval FALSE Node is not the last node in the linked list.\r | |
1495 | \r | |
1496 | **/\r | |
1497 | BOOLEAN\r | |
1498 | EFIAPI\r | |
1499 | GlueIsNodeAtEnd (\r | |
1500 | IN CONST LIST_ENTRY *List,\r | |
1501 | IN CONST LIST_ENTRY *Node\r | |
1502 | );\r | |
1503 | \r | |
c7f33ca4 | 1504 | \r |
3eb9473e | 1505 | /**\r |
1506 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
1507 | first node after the swap.\r | |
1508 | \r | |
1509 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
1510 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
1511 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
1512 | same double linked list as FirstEntry and that double linked list must have\r | |
1513 | been initialized with InitializeListHead(). SecondEntry is returned after the\r | |
1514 | nodes are swapped.\r | |
1515 | \r | |
1516 | If FirstEntry is NULL, then ASSERT().\r | |
1517 | If SecondEntry is NULL, then ASSERT().\r | |
1518 | If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r | |
1519 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1520 | linked list containing the FirstEntry and SecondEntry nodes, including\r | |
1521 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r | |
1522 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1523 | \r | |
1524 | @param FirstEntry A pointer to a node in a linked list.\r | |
1525 | @param SecondEntry A pointer to another node in the same linked list.\r | |
1526 | \r | |
1527 | **/\r | |
1528 | LIST_ENTRY *\r | |
1529 | EFIAPI\r | |
1530 | GlueSwapListEntries (\r | |
1531 | IN LIST_ENTRY *FirstEntry,\r | |
1532 | IN LIST_ENTRY *SecondEntry\r | |
1533 | );\r | |
1534 | \r | |
c7f33ca4 | 1535 | \r |
3eb9473e | 1536 | /**\r |
1537 | Removes a node from a doubly linked list, and returns the node that follows\r | |
1538 | the removed node.\r | |
1539 | \r | |
1540 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
1541 | this function to release the memory used by this node if that is required. On\r | |
1542 | exit, the node following Entry in the doubly linked list is returned. If\r | |
1543 | Entry is the only node in the linked list, then the head node of the linked\r | |
1544 | list is returned.\r | |
1545 | \r | |
1546 | If Entry is NULL, then ASSERT().\r | |
1547 | If Entry is the head node of an empty list, then ASSERT().\r | |
1548 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1549 | linked list containing Entry, including the Entry node, is greater than\r | |
1550 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1551 | \r | |
1552 | @param Entry A pointer to a node in a linked list\r | |
1553 | \r | |
1554 | @return Entry\r | |
1555 | \r | |
1556 | **/\r | |
1557 | LIST_ENTRY *\r | |
1558 | EFIAPI\r | |
1559 | GlueRemoveEntryList (\r | |
1560 | IN CONST LIST_ENTRY *Entry\r | |
1561 | );\r | |
1562 | \r | |
1563 | //\r | |
1564 | // Math Services\r | |
1565 | //\r | |
1566 | \r | |
1567 | /**\r | |
1568 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
1569 | with zeros. The shifted value is returned.\r | |
1570 | \r | |
1571 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
1572 | low Count bits are set to zero. The shifted value is returned.\r | |
1573 | \r | |
1574 | If Count is greater than 63, then ASSERT().\r | |
1575 | \r | |
1576 | @param Operand The 64-bit operand to shift left.\r | |
1577 | @param Count The number of bits to shift left.\r | |
1578 | \r | |
1579 | @return Operand << Count\r | |
1580 | \r | |
1581 | **/\r | |
1582 | UINT64\r | |
1583 | EFIAPI\r | |
1584 | GlueLShiftU64 (\r | |
1585 | IN UINT64 Operand,\r | |
1586 | IN UINTN Count\r | |
1587 | );\r | |
1588 | \r | |
c7f33ca4 | 1589 | \r |
3eb9473e | 1590 | /**\r |
1591 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
1592 | filled with zeros. The shifted value is returned.\r | |
1593 | \r | |
1594 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1595 | high Count bits are set to zero. The shifted value is returned.\r | |
1596 | \r | |
1597 | If Count is greater than 63, then ASSERT().\r | |
1598 | \r | |
1599 | @param Operand The 64-bit operand to shift right.\r | |
1600 | @param Count The number of bits to shift right.\r | |
1601 | \r | |
1602 | @return Operand >> Count\r | |
1603 | \r | |
1604 | **/\r | |
1605 | UINT64\r | |
1606 | EFIAPI\r | |
1607 | GlueRShiftU64 (\r | |
1608 | IN UINT64 Operand,\r | |
1609 | IN UINTN Count\r | |
1610 | );\r | |
1611 | \r | |
c7f33ca4 | 1612 | \r |
3eb9473e | 1613 | /**\r |
1614 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
1615 | with original integer's bit 63. The shifted value is returned.\r | |
1616 | \r | |
1617 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1618 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
1619 | \r | |
1620 | If Count is greater than 63, then ASSERT().\r | |
1621 | \r | |
1622 | @param Operand The 64-bit operand to shift right.\r | |
1623 | @param Count The number of bits to shift right.\r | |
1624 | \r | |
1625 | @return Operand >> Count\r | |
1626 | \r | |
1627 | **/\r | |
1628 | UINT64\r | |
1629 | EFIAPI\r | |
1630 | ARShiftU64 (\r | |
1631 | IN UINT64 Operand,\r | |
1632 | IN UINTN Count\r | |
1633 | );\r | |
1634 | \r | |
c7f33ca4 | 1635 | \r |
3eb9473e | 1636 | /**\r |
1637 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
1638 | with the high bits that were rotated.\r | |
1639 | \r | |
1640 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
1641 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1642 | value is returned.\r | |
1643 | \r | |
1644 | If Count is greater than 31, then ASSERT().\r | |
1645 | \r | |
1646 | @param Operand The 32-bit operand to rotate left.\r | |
1647 | @param Count The number of bits to rotate left.\r | |
1648 | \r | |
1649 | @return Operand <<< Count\r | |
1650 | \r | |
1651 | **/\r | |
1652 | UINT32\r | |
1653 | EFIAPI\r | |
1654 | LRotU32 (\r | |
1655 | IN UINT32 Operand,\r | |
1656 | IN UINTN Count\r | |
1657 | );\r | |
1658 | \r | |
c7f33ca4 | 1659 | \r |
3eb9473e | 1660 | /**\r |
1661 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
1662 | with the low bits that were rotated.\r | |
1663 | \r | |
1664 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
1665 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1666 | value is returned.\r | |
1667 | \r | |
1668 | If Count is greater than 31, then ASSERT().\r | |
1669 | \r | |
1670 | @param Operand The 32-bit operand to rotate right.\r | |
1671 | @param Count The number of bits to rotate right.\r | |
1672 | \r | |
1673 | @return Operand >>> Count\r | |
1674 | \r | |
1675 | **/\r | |
1676 | UINT32\r | |
1677 | EFIAPI\r | |
1678 | RRotU32 (\r | |
1679 | IN UINT32 Operand,\r | |
1680 | IN UINTN Count\r | |
1681 | );\r | |
1682 | \r | |
c7f33ca4 | 1683 | \r |
3eb9473e | 1684 | /**\r |
1685 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
1686 | with the high bits that were rotated.\r | |
1687 | \r | |
1688 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
1689 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1690 | value is returned.\r | |
1691 | \r | |
1692 | If Count is greater than 63, then ASSERT().\r | |
1693 | \r | |
1694 | @param Operand The 64-bit operand to rotate left.\r | |
1695 | @param Count The number of bits to rotate left.\r | |
1696 | \r | |
1697 | @return Operand <<< Count\r | |
1698 | \r | |
1699 | **/\r | |
1700 | UINT64\r | |
1701 | EFIAPI\r | |
1702 | LRotU64 (\r | |
1703 | IN UINT64 Operand,\r | |
1704 | IN UINTN Count\r | |
1705 | );\r | |
1706 | \r | |
c7f33ca4 | 1707 | \r |
3eb9473e | 1708 | /**\r |
1709 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
1710 | with the high low bits that were rotated.\r | |
1711 | \r | |
1712 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
1713 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1714 | value is returned.\r | |
1715 | \r | |
1716 | If Count is greater than 63, then ASSERT().\r | |
1717 | \r | |
1718 | @param Operand The 64-bit operand to rotate right.\r | |
1719 | @param Count The number of bits to rotate right.\r | |
1720 | \r | |
1721 | @return Operand >>> Count\r | |
1722 | \r | |
1723 | **/\r | |
1724 | UINT64\r | |
1725 | EFIAPI\r | |
1726 | RRotU64 (\r | |
1727 | IN UINT64 Operand,\r | |
1728 | IN UINTN Count\r | |
1729 | );\r | |
1730 | \r | |
c7f33ca4 | 1731 | \r |
3eb9473e | 1732 | /**\r |
1733 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
1734 | \r | |
1735 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
1736 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1737 | Otherwise, a value between 0 and 31 is returned.\r | |
1738 | \r | |
1739 | @param Operand The 32-bit operand to evaluate.\r | |
1740 | \r | |
1741 | @return Position of the lowest bit set in Operand if found.\r | |
1742 | @retval -1 Operand is zero.\r | |
1743 | \r | |
1744 | **/\r | |
1745 | INTN\r | |
1746 | EFIAPI\r | |
1747 | LowBitSet32 (\r | |
1748 | IN UINT32 Operand\r | |
1749 | );\r | |
1750 | \r | |
c7f33ca4 | 1751 | \r |
3eb9473e | 1752 | /**\r |
1753 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
1754 | \r | |
1755 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
1756 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1757 | Otherwise, a value between 0 and 63 is returned.\r | |
1758 | \r | |
1759 | @param Operand The 64-bit operand to evaluate.\r | |
1760 | \r | |
1761 | @return Position of the lowest bit set in Operand if found.\r | |
1762 | @retval -1 Operand is zero.\r | |
1763 | \r | |
1764 | **/\r | |
1765 | INTN\r | |
1766 | EFIAPI\r | |
1767 | LowBitSet64 (\r | |
1768 | IN UINT64 Operand\r | |
1769 | );\r | |
1770 | \r | |
c7f33ca4 | 1771 | \r |
3eb9473e | 1772 | /**\r |
1773 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
1774 | to log2(x).\r | |
1775 | \r | |
1776 | This function computes the bit position of the highest bit set in the 32-bit\r | |
1777 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1778 | Otherwise, a value between 0 and 31 is returned.\r | |
1779 | \r | |
1780 | @param Operand The 32-bit operand to evaluate.\r | |
1781 | \r | |
1782 | @return Position of the highest bit set in Operand if found.\r | |
1783 | @retval -1 Operand is zero.\r | |
1784 | \r | |
1785 | **/\r | |
1786 | INTN\r | |
1787 | EFIAPI\r | |
1788 | HighBitSet32 (\r | |
1789 | IN UINT32 Operand\r | |
1790 | );\r | |
1791 | \r | |
c7f33ca4 | 1792 | \r |
3eb9473e | 1793 | /**\r |
1794 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
1795 | to log2(x).\r | |
1796 | \r | |
1797 | This function computes the bit position of the highest bit set in the 64-bit\r | |
1798 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1799 | Otherwise, a value between 0 and 63 is returned.\r | |
1800 | \r | |
1801 | @param Operand The 64-bit operand to evaluate.\r | |
1802 | \r | |
1803 | @return Position of the highest bit set in Operand if found.\r | |
1804 | @retval -1 Operand is zero.\r | |
1805 | \r | |
1806 | **/\r | |
1807 | INTN\r | |
1808 | EFIAPI\r | |
1809 | HighBitSet64 (\r | |
1810 | IN UINT64 Operand\r | |
1811 | );\r | |
1812 | \r | |
c7f33ca4 | 1813 | \r |
3eb9473e | 1814 | /**\r |
1815 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
1816 | 1 << HighBitSet32(x).\r | |
1817 | \r | |
1818 | This function computes the value of the highest bit set in the 32-bit value\r | |
1819 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1820 | \r | |
1821 | @param Operand The 32-bit operand to evaluate.\r | |
1822 | \r | |
1823 | @return 1 << HighBitSet32(Operand)\r | |
1824 | @retval 0 Operand is zero.\r | |
1825 | \r | |
1826 | **/\r | |
1827 | UINT32\r | |
1828 | EFIAPI\r | |
1829 | GetPowerOfTwo32 (\r | |
1830 | IN UINT32 Operand\r | |
1831 | );\r | |
1832 | \r | |
c7f33ca4 | 1833 | \r |
3eb9473e | 1834 | /**\r |
1835 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
1836 | 1 << HighBitSet64(x).\r | |
1837 | \r | |
1838 | This function computes the value of the highest bit set in the 64-bit value\r | |
1839 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1840 | \r | |
1841 | @param Operand The 64-bit operand to evaluate.\r | |
1842 | \r | |
1843 | @return 1 << HighBitSet64(Operand)\r | |
1844 | @retval 0 Operand is zero.\r | |
1845 | \r | |
1846 | **/\r | |
1847 | UINT64\r | |
1848 | EFIAPI\r | |
1849 | GetPowerOfTwo64 (\r | |
1850 | IN UINT64 Operand\r | |
1851 | );\r | |
1852 | \r | |
c7f33ca4 | 1853 | \r |
3eb9473e | 1854 | /**\r |
1855 | Switches the endianess of a 16-bit integer.\r | |
1856 | \r | |
1857 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
1858 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1859 | returned.\r | |
1860 | \r | |
1861 | @param Operand A 16-bit unsigned value.\r | |
1862 | \r | |
1863 | @return The byte swaped Operand.\r | |
1864 | \r | |
1865 | **/\r | |
1866 | UINT16\r | |
1867 | EFIAPI\r | |
1868 | SwapBytes16 (\r | |
1869 | IN UINT16 Value\r | |
1870 | );\r | |
1871 | \r | |
c7f33ca4 | 1872 | \r |
3eb9473e | 1873 | /**\r |
1874 | Switches the endianess of a 32-bit integer.\r | |
1875 | \r | |
1876 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
1877 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1878 | returned.\r | |
1879 | \r | |
1880 | @param Operand A 32-bit unsigned value.\r | |
1881 | \r | |
1882 | @return The byte swaped Operand.\r | |
1883 | \r | |
1884 | **/\r | |
1885 | UINT32\r | |
1886 | EFIAPI\r | |
1887 | SwapBytes32 (\r | |
1888 | IN UINT32 Value\r | |
1889 | );\r | |
1890 | \r | |
c7f33ca4 | 1891 | \r |
3eb9473e | 1892 | /**\r |
1893 | Switches the endianess of a 64-bit integer.\r | |
1894 | \r | |
1895 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
1896 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1897 | returned.\r | |
1898 | \r | |
1899 | @param Operand A 64-bit unsigned value.\r | |
1900 | \r | |
1901 | @return The byte swaped Operand.\r | |
1902 | \r | |
1903 | **/\r | |
1904 | UINT64\r | |
1905 | EFIAPI\r | |
1906 | SwapBytes64 (\r | |
1907 | IN UINT64 Value\r | |
1908 | );\r | |
1909 | \r | |
c7f33ca4 | 1910 | \r |
3eb9473e | 1911 | /**\r |
1912 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
1913 | generates a 64-bit unsigned result.\r | |
1914 | \r | |
1915 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
1916 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1917 | bit unsigned result is returned.\r | |
1918 | \r | |
1919 | If the result overflows, then ASSERT().\r | |
1920 | \r | |
1921 | @param Multiplicand A 64-bit unsigned value.\r | |
1922 | @param Multiplier A 32-bit unsigned value.\r | |
1923 | \r | |
1924 | @return Multiplicand * Multiplier\r | |
1925 | \r | |
1926 | **/\r | |
1927 | UINT64\r | |
1928 | EFIAPI\r | |
1929 | GlueMultU64x32 (\r | |
1930 | IN UINT64 Multiplicand,\r | |
1931 | IN UINT32 Multiplier\r | |
1932 | );\r | |
1933 | \r | |
c7f33ca4 | 1934 | \r |
3eb9473e | 1935 | /**\r |
1936 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
1937 | generates a 64-bit unsigned result.\r | |
1938 | \r | |
1939 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
1940 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1941 | bit unsigned result is returned.\r | |
1942 | \r | |
1943 | If the result overflows, then ASSERT().\r | |
1944 | \r | |
1945 | @param Multiplicand A 64-bit unsigned value.\r | |
1946 | @param Multiplier A 64-bit unsigned value.\r | |
1947 | \r | |
1948 | @return Multiplicand * Multiplier\r | |
1949 | \r | |
1950 | **/\r | |
1951 | UINT64\r | |
1952 | EFIAPI\r | |
1953 | MultU64x64 (\r | |
1954 | IN UINT64 Multiplicand,\r | |
1955 | IN UINT64 Multiplier\r | |
1956 | );\r | |
1957 | \r | |
c7f33ca4 | 1958 | \r |
3eb9473e | 1959 | /**\r |
1960 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
1961 | 64-bit signed result.\r | |
1962 | \r | |
1963 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
1964 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
1965 | signed result is returned.\r | |
1966 | \r | |
1967 | If the result overflows, then ASSERT().\r | |
1968 | \r | |
1969 | @param Multiplicand A 64-bit signed value.\r | |
1970 | @param Multiplier A 64-bit signed value.\r | |
1971 | \r | |
1972 | @return Multiplicand * Multiplier\r | |
1973 | \r | |
1974 | **/\r | |
1975 | INT64\r | |
1976 | EFIAPI\r | |
1977 | MultS64x64 (\r | |
1978 | IN INT64 Multiplicand,\r | |
1979 | IN INT64 Multiplier\r | |
1980 | );\r | |
1981 | \r | |
c7f33ca4 | 1982 | \r |
3eb9473e | 1983 | /**\r |
1984 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1985 | a 64-bit unsigned result.\r | |
1986 | \r | |
1987 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1988 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
1989 | function returns the 64-bit unsigned quotient.\r | |
1990 | \r | |
1991 | If Divisor is 0, then ASSERT().\r | |
1992 | \r | |
1993 | @param Dividend A 64-bit unsigned value.\r | |
1994 | @param Divisor A 32-bit unsigned value.\r | |
1995 | \r | |
1996 | @return Dividend / Divisor\r | |
1997 | \r | |
1998 | **/\r | |
1999 | UINT64\r | |
2000 | EFIAPI\r | |
2001 | GlueDivU64x32 (\r | |
2002 | IN UINT64 Dividend,\r | |
2003 | IN UINT32 Divisor\r | |
2004 | );\r | |
2005 | \r | |
c7f33ca4 | 2006 | \r |
3eb9473e | 2007 | /**\r |
2008 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2009 | a 32-bit unsigned remainder.\r | |
2010 | \r | |
2011 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2012 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
2013 | returns the 32-bit unsigned remainder.\r | |
2014 | \r | |
2015 | If Divisor is 0, then ASSERT().\r | |
2016 | \r | |
2017 | @param Dividend A 64-bit unsigned value.\r | |
2018 | @param Divisor A 32-bit unsigned value.\r | |
2019 | \r | |
2020 | @return Dividend % Divisor\r | |
2021 | \r | |
2022 | **/\r | |
2023 | UINT32\r | |
2024 | EFIAPI\r | |
2025 | ModU64x32 (\r | |
2026 | IN UINT64 Dividend,\r | |
2027 | IN UINT32 Divisor\r | |
2028 | );\r | |
2029 | \r | |
c7f33ca4 | 2030 | \r |
3eb9473e | 2031 | /**\r |
2032 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2033 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
2034 | \r | |
2035 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2036 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2037 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
2038 | This function returns the 64-bit unsigned quotient.\r | |
2039 | \r | |
2040 | If Divisor is 0, then ASSERT().\r | |
2041 | \r | |
2042 | @param Dividend A 64-bit unsigned value.\r | |
2043 | @param Divisor A 32-bit unsigned value.\r | |
2044 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
2045 | optional and may be NULL.\r | |
2046 | \r | |
2047 | @return Dividend / Divisor\r | |
2048 | \r | |
2049 | **/\r | |
2050 | UINT64\r | |
2051 | EFIAPI\r | |
2052 | DivU64x32Remainder (\r | |
2053 | IN UINT64 Dividend,\r | |
2054 | IN UINT32 Divisor,\r | |
2055 | OUT UINT32 *Remainder OPTIONAL\r | |
2056 | );\r | |
2057 | \r | |
c7f33ca4 | 2058 | \r |
3eb9473e | 2059 | /**\r |
2060 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
2061 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
2062 | \r | |
2063 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
2064 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2065 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
2066 | This function returns the 64-bit unsigned quotient.\r | |
2067 | \r | |
2068 | If Divisor is 0, then ASSERT().\r | |
2069 | \r | |
2070 | @param Dividend A 64-bit unsigned value.\r | |
2071 | @param Divisor A 64-bit unsigned value.\r | |
2072 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
2073 | optional and may be NULL.\r | |
2074 | \r | |
2075 | @return Dividend / Divisor\r | |
2076 | \r | |
2077 | **/\r | |
2078 | UINT64\r | |
2079 | EFIAPI\r | |
2080 | DivU64x64Remainder (\r | |
2081 | IN UINT64 Dividend,\r | |
2082 | IN UINT64 Divisor,\r | |
2083 | OUT UINT64 *Remainder OPTIONAL\r | |
2084 | );\r | |
2085 | \r | |
c7f33ca4 | 2086 | \r |
3eb9473e | 2087 | /**\r |
2088 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2089 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
2090 | \r | |
2091 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
2092 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
2093 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
2094 | function returns the 64-bit signed quotient.\r | |
2095 | \r | |
2096 | If Divisor is 0, then ASSERT().\r | |
2097 | \r | |
2098 | @param Dividend A 64-bit signed value.\r | |
2099 | @param Divisor A 64-bit signed value.\r | |
2100 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
2101 | optional and may be NULL.\r | |
2102 | \r | |
2103 | @return Dividend / Divisor\r | |
2104 | \r | |
2105 | **/\r | |
2106 | INT64\r | |
2107 | EFIAPI\r | |
2108 | DivS64x64Remainder (\r | |
2109 | IN INT64 Dividend,\r | |
2110 | IN INT64 Divisor,\r | |
2111 | OUT INT64 *Remainder OPTIONAL\r | |
2112 | );\r | |
2113 | \r | |
c7f33ca4 | 2114 | \r |
3eb9473e | 2115 | /**\r |
2116 | Reads a 16-bit value from memory that may be unaligned.\r | |
2117 | \r | |
2118 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
2119 | guarantees that the read operation does not produce an alignment fault.\r | |
2120 | \r | |
2121 | If the Buffer is NULL, then ASSERT().\r | |
2122 | \r | |
2123 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r | |
2124 | \r | |
2125 | @return *Uint16\r | |
2126 | \r | |
2127 | **/\r | |
2128 | UINT16\r | |
2129 | EFIAPI\r | |
2130 | ReadUnaligned16 (\r | |
2131 | IN CONST UINT16 *Uint16\r | |
2132 | );\r | |
2133 | \r | |
c7f33ca4 | 2134 | \r |
3eb9473e | 2135 | /**\r |
2136 | Writes a 16-bit value to memory that may be unaligned.\r | |
2137 | \r | |
2138 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
2139 | returned. The function guarantees that the write operation does not produce\r | |
2140 | an alignment fault.\r | |
2141 | \r | |
2142 | If the Buffer is NULL, then ASSERT().\r | |
2143 | \r | |
2144 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r | |
2145 | @param Value 16-bit value to write to Buffer.\r | |
2146 | \r | |
2147 | @return Value\r | |
2148 | \r | |
2149 | **/\r | |
2150 | UINT16\r | |
2151 | EFIAPI\r | |
2152 | WriteUnaligned16 (\r | |
2153 | OUT UINT16 *Uint16,\r | |
2154 | IN UINT16 Value\r | |
2155 | );\r | |
2156 | \r | |
c7f33ca4 | 2157 | \r |
3eb9473e | 2158 | /**\r |
2159 | Reads a 24-bit value from memory that may be unaligned.\r | |
2160 | \r | |
2161 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
2162 | guarantees that the read operation does not produce an alignment fault.\r | |
2163 | \r | |
2164 | If the Buffer is NULL, then ASSERT().\r | |
2165 | \r | |
2166 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
2167 | \r | |
2168 | @return The value read.\r | |
2169 | \r | |
2170 | **/\r | |
2171 | UINT32\r | |
2172 | EFIAPI\r | |
2173 | ReadUnaligned24 (\r | |
2174 | IN CONST UINT32 *Buffer\r | |
2175 | );\r | |
2176 | \r | |
c7f33ca4 | 2177 | \r |
3eb9473e | 2178 | /**\r |
2179 | Writes a 24-bit value to memory that may be unaligned.\r | |
2180 | \r | |
2181 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
2182 | returned. The function guarantees that the write operation does not produce\r | |
2183 | an alignment fault.\r | |
2184 | \r | |
2185 | If the Buffer is NULL, then ASSERT().\r | |
2186 | \r | |
2187 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
2188 | @param Value 24-bit value to write to Buffer.\r | |
2189 | \r | |
2190 | @return The value written.\r | |
2191 | \r | |
2192 | **/\r | |
2193 | UINT32\r | |
2194 | EFIAPI\r | |
2195 | WriteUnaligned24 (\r | |
2196 | OUT UINT32 *Buffer,\r | |
2197 | IN UINT32 Value\r | |
2198 | );\r | |
2199 | \r | |
c7f33ca4 | 2200 | \r |
3eb9473e | 2201 | /**\r |
2202 | Reads a 32-bit value from memory that may be unaligned.\r | |
2203 | \r | |
2204 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
2205 | guarantees that the read operation does not produce an alignment fault.\r | |
2206 | \r | |
2207 | If the Buffer is NULL, then ASSERT().\r | |
2208 | \r | |
2209 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r | |
2210 | \r | |
2211 | @return *Uint32\r | |
2212 | \r | |
2213 | **/\r | |
2214 | UINT32\r | |
2215 | EFIAPI\r | |
2216 | ReadUnaligned32 (\r | |
2217 | IN CONST UINT32 *Uint32\r | |
2218 | );\r | |
2219 | \r | |
c7f33ca4 | 2220 | \r |
3eb9473e | 2221 | /**\r |
2222 | Writes a 32-bit value to memory that may be unaligned.\r | |
2223 | \r | |
2224 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
2225 | returned. The function guarantees that the write operation does not produce\r | |
2226 | an alignment fault.\r | |
2227 | \r | |
2228 | If the Buffer is NULL, then ASSERT().\r | |
2229 | \r | |
2230 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r | |
2231 | @param Value 32-bit value to write to Buffer.\r | |
2232 | \r | |
2233 | @return Value\r | |
2234 | \r | |
2235 | **/\r | |
2236 | UINT32\r | |
2237 | EFIAPI\r | |
2238 | WriteUnaligned32 (\r | |
2239 | OUT UINT32 *Uint32,\r | |
2240 | IN UINT32 Value\r | |
2241 | );\r | |
2242 | \r | |
c7f33ca4 | 2243 | \r |
3eb9473e | 2244 | /**\r |
2245 | Reads a 64-bit value from memory that may be unaligned.\r | |
2246 | \r | |
2247 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
2248 | guarantees that the read operation does not produce an alignment fault.\r | |
2249 | \r | |
2250 | If the Buffer is NULL, then ASSERT().\r | |
2251 | \r | |
2252 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r | |
2253 | \r | |
2254 | @return *Uint64\r | |
2255 | \r | |
2256 | **/\r | |
2257 | UINT64\r | |
2258 | EFIAPI\r | |
2259 | ReadUnaligned64 (\r | |
2260 | IN CONST UINT64 *Uint64\r | |
2261 | );\r | |
2262 | \r | |
c7f33ca4 | 2263 | \r |
3eb9473e | 2264 | /**\r |
2265 | Writes a 64-bit value to memory that may be unaligned.\r | |
2266 | \r | |
2267 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
2268 | returned. The function guarantees that the write operation does not produce\r | |
2269 | an alignment fault.\r | |
2270 | \r | |
2271 | If the Buffer is NULL, then ASSERT().\r | |
2272 | \r | |
2273 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r | |
2274 | @param Value 64-bit value to write to Buffer.\r | |
2275 | \r | |
2276 | @return Value\r | |
2277 | \r | |
2278 | **/\r | |
2279 | UINT64\r | |
2280 | EFIAPI\r | |
2281 | WriteUnaligned64 (\r | |
2282 | OUT UINT64 *Uint64,\r | |
2283 | IN UINT64 Value\r | |
2284 | );\r | |
2285 | \r | |
c7f33ca4 | 2286 | \r |
3eb9473e | 2287 | //\r |
2288 | // Bit Field Functions\r | |
2289 | //\r | |
2290 | \r | |
2291 | /**\r | |
2292 | Returns a bit field from an 8-bit value.\r | |
2293 | \r | |
2294 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2295 | \r | |
2296 | If 8-bit operations are not supported, then ASSERT().\r | |
2297 | If StartBit is greater than 7, then ASSERT().\r | |
2298 | If EndBit is greater than 7, then ASSERT().\r | |
2299 | If EndBit is less than StartBit, then ASSERT().\r | |
2300 | \r | |
2301 | @param Operand Operand on which to perform the bitfield operation.\r | |
2302 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2303 | Range 0..7.\r | |
2304 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2305 | Range 0..7.\r | |
2306 | \r | |
2307 | @return The bit field read.\r | |
2308 | \r | |
2309 | **/\r | |
2310 | UINT8\r | |
2311 | EFIAPI\r | |
2312 | BitFieldRead8 (\r | |
2313 | IN UINT8 Operand,\r | |
2314 | IN UINTN StartBit,\r | |
2315 | IN UINTN EndBit\r | |
2316 | );\r | |
2317 | \r | |
c7f33ca4 | 2318 | \r |
3eb9473e | 2319 | /**\r |
2320 | Writes a bit field to an 8-bit value, and returns the result.\r | |
2321 | \r | |
2322 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2323 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
2324 | returned.\r | |
2325 | \r | |
2326 | If 8-bit operations are not supported, then ASSERT().\r | |
2327 | If StartBit is greater than 7, then ASSERT().\r | |
2328 | If EndBit is greater than 7, then ASSERT().\r | |
2329 | If EndBit is less than StartBit, then ASSERT().\r | |
2330 | \r | |
2331 | @param Operand Operand on which to perform the bitfield operation.\r | |
2332 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2333 | Range 0..7.\r | |
2334 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2335 | Range 0..7.\r | |
2336 | @param Value New value of the bit field.\r | |
2337 | \r | |
2338 | @return The new 8-bit value.\r | |
2339 | \r | |
2340 | **/\r | |
2341 | UINT8\r | |
2342 | EFIAPI\r | |
2343 | BitFieldWrite8 (\r | |
2344 | IN UINT8 Operand,\r | |
2345 | IN UINTN StartBit,\r | |
2346 | IN UINTN EndBit,\r | |
2347 | IN UINT8 Value\r | |
2348 | );\r | |
2349 | \r | |
c7f33ca4 | 2350 | \r |
3eb9473e | 2351 | /**\r |
2352 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
2353 | result.\r | |
2354 | \r | |
2355 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2356 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2357 | Operand are preserved. The new 8-bit value is returned.\r | |
2358 | \r | |
2359 | If 8-bit operations are not supported, then ASSERT().\r | |
2360 | If StartBit is greater than 7, then ASSERT().\r | |
2361 | If EndBit is greater than 7, then ASSERT().\r | |
2362 | If EndBit is less than StartBit, then ASSERT().\r | |
2363 | \r | |
2364 | @param Operand Operand on which to perform the bitfield operation.\r | |
2365 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2366 | Range 0..7.\r | |
2367 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2368 | Range 0..7.\r | |
2369 | @param OrData The value to OR with the read value from the value\r | |
2370 | \r | |
2371 | @return The new 8-bit value.\r | |
2372 | \r | |
2373 | **/\r | |
2374 | UINT8\r | |
2375 | EFIAPI\r | |
2376 | BitFieldOr8 (\r | |
2377 | IN UINT8 Operand,\r | |
2378 | IN UINTN StartBit,\r | |
2379 | IN UINTN EndBit,\r | |
2380 | IN UINT8 OrData\r | |
2381 | );\r | |
2382 | \r | |
c7f33ca4 | 2383 | \r |
3eb9473e | 2384 | /**\r |
2385 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
2386 | the result.\r | |
2387 | \r | |
2388 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2389 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2390 | preserved. The new 8-bit value is returned.\r | |
2391 | \r | |
2392 | If 8-bit operations are not supported, then ASSERT().\r | |
2393 | If StartBit is greater than 7, then ASSERT().\r | |
2394 | If EndBit is greater than 7, then ASSERT().\r | |
2395 | If EndBit is less than StartBit, then ASSERT().\r | |
2396 | \r | |
2397 | @param Operand Operand on which to perform the bitfield operation.\r | |
2398 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2399 | Range 0..7.\r | |
2400 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2401 | Range 0..7.\r | |
2402 | @param AndData The value to AND with the read value from the value.\r | |
2403 | \r | |
2404 | @return The new 8-bit value.\r | |
2405 | \r | |
2406 | **/\r | |
2407 | UINT8\r | |
2408 | EFIAPI\r | |
2409 | BitFieldAnd8 (\r | |
2410 | IN UINT8 Operand,\r | |
2411 | IN UINTN StartBit,\r | |
2412 | IN UINTN EndBit,\r | |
2413 | IN UINT8 AndData\r | |
2414 | );\r | |
2415 | \r | |
c7f33ca4 | 2416 | \r |
3eb9473e | 2417 | /**\r |
2418 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
2419 | bitwise OR, and returns the result.\r | |
2420 | \r | |
2421 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2422 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2423 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2424 | preserved. The new 8-bit value is returned.\r | |
2425 | \r | |
2426 | If 8-bit operations are not supported, then ASSERT().\r | |
2427 | If StartBit is greater than 7, then ASSERT().\r | |
2428 | If EndBit is greater than 7, then ASSERT().\r | |
2429 | If EndBit is less than StartBit, then ASSERT().\r | |
2430 | \r | |
2431 | @param Operand Operand on which to perform the bitfield operation.\r | |
2432 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2433 | Range 0..7.\r | |
2434 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2435 | Range 0..7.\r | |
2436 | @param AndData The value to AND with the read value from the value.\r | |
2437 | @param OrData The value to OR with the result of the AND operation.\r | |
2438 | \r | |
2439 | @return The new 8-bit value.\r | |
2440 | \r | |
2441 | **/\r | |
2442 | UINT8\r | |
2443 | EFIAPI\r | |
2444 | BitFieldAndThenOr8 (\r | |
2445 | IN UINT8 Operand,\r | |
2446 | IN UINTN StartBit,\r | |
2447 | IN UINTN EndBit,\r | |
2448 | IN UINT8 AndData,\r | |
2449 | IN UINT8 OrData\r | |
2450 | );\r | |
2451 | \r | |
c7f33ca4 | 2452 | \r |
3eb9473e | 2453 | /**\r |
2454 | Returns a bit field from a 16-bit value.\r | |
2455 | \r | |
2456 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2457 | \r | |
2458 | If 16-bit operations are not supported, then ASSERT().\r | |
2459 | If StartBit is greater than 15, then ASSERT().\r | |
2460 | If EndBit is greater than 15, then ASSERT().\r | |
2461 | If EndBit is less than StartBit, then ASSERT().\r | |
2462 | \r | |
2463 | @param Operand Operand on which to perform the bitfield operation.\r | |
2464 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2465 | Range 0..15.\r | |
2466 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2467 | Range 0..15.\r | |
2468 | \r | |
2469 | @return The bit field read.\r | |
2470 | \r | |
2471 | **/\r | |
2472 | UINT16\r | |
2473 | EFIAPI\r | |
2474 | BitFieldRead16 (\r | |
2475 | IN UINT16 Operand,\r | |
2476 | IN UINTN StartBit,\r | |
2477 | IN UINTN EndBit\r | |
2478 | );\r | |
2479 | \r | |
c7f33ca4 | 2480 | \r |
3eb9473e | 2481 | /**\r |
2482 | Writes a bit field to a 16-bit value, and returns the result.\r | |
2483 | \r | |
2484 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2485 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
2486 | returned.\r | |
2487 | \r | |
2488 | If 16-bit operations are not supported, then ASSERT().\r | |
2489 | If StartBit is greater than 15, then ASSERT().\r | |
2490 | If EndBit is greater than 15, then ASSERT().\r | |
2491 | If EndBit is less than StartBit, then ASSERT().\r | |
2492 | \r | |
2493 | @param Operand Operand on which to perform the bitfield operation.\r | |
2494 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2495 | Range 0..15.\r | |
2496 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2497 | Range 0..15.\r | |
2498 | @param Value New value of the bit field.\r | |
2499 | \r | |
2500 | @return The new 16-bit value.\r | |
2501 | \r | |
2502 | **/\r | |
2503 | UINT16\r | |
2504 | EFIAPI\r | |
2505 | BitFieldWrite16 (\r | |
2506 | IN UINT16 Operand,\r | |
2507 | IN UINTN StartBit,\r | |
2508 | IN UINTN EndBit,\r | |
2509 | IN UINT16 Value\r | |
2510 | );\r | |
2511 | \r | |
c7f33ca4 | 2512 | \r |
3eb9473e | 2513 | /**\r |
2514 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
2515 | result.\r | |
2516 | \r | |
2517 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2518 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2519 | Operand are preserved. The new 16-bit value is returned.\r | |
2520 | \r | |
2521 | If 16-bit operations are not supported, then ASSERT().\r | |
2522 | If StartBit is greater than 15, then ASSERT().\r | |
2523 | If EndBit is greater than 15, then ASSERT().\r | |
2524 | If EndBit is less than StartBit, then ASSERT().\r | |
2525 | \r | |
2526 | @param Operand Operand on which to perform the bitfield operation.\r | |
2527 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2528 | Range 0..15.\r | |
2529 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2530 | Range 0..15.\r | |
2531 | @param OrData The value to OR with the read value from the value\r | |
2532 | \r | |
2533 | @return The new 16-bit value.\r | |
2534 | \r | |
2535 | **/\r | |
2536 | UINT16\r | |
2537 | EFIAPI\r | |
2538 | BitFieldOr16 (\r | |
2539 | IN UINT16 Operand,\r | |
2540 | IN UINTN StartBit,\r | |
2541 | IN UINTN EndBit,\r | |
2542 | IN UINT16 OrData\r | |
2543 | );\r | |
2544 | \r | |
c7f33ca4 | 2545 | \r |
3eb9473e | 2546 | /**\r |
2547 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
2548 | the result.\r | |
2549 | \r | |
2550 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2551 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2552 | preserved. The new 16-bit value is returned.\r | |
2553 | \r | |
2554 | If 16-bit operations are not supported, then ASSERT().\r | |
2555 | If StartBit is greater than 15, then ASSERT().\r | |
2556 | If EndBit is greater than 15, then ASSERT().\r | |
2557 | If EndBit is less than StartBit, then ASSERT().\r | |
2558 | \r | |
2559 | @param Operand Operand on which to perform the bitfield operation.\r | |
2560 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2561 | Range 0..15.\r | |
2562 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2563 | Range 0..15.\r | |
2564 | @param AndData The value to AND with the read value from the value\r | |
2565 | \r | |
2566 | @return The new 16-bit value.\r | |
2567 | \r | |
2568 | **/\r | |
2569 | UINT16\r | |
2570 | EFIAPI\r | |
2571 | BitFieldAnd16 (\r | |
2572 | IN UINT16 Operand,\r | |
2573 | IN UINTN StartBit,\r | |
2574 | IN UINTN EndBit,\r | |
2575 | IN UINT16 AndData\r | |
2576 | );\r | |
2577 | \r | |
c7f33ca4 | 2578 | \r |
3eb9473e | 2579 | /**\r |
2580 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
2581 | bitwise OR, and returns the result.\r | |
2582 | \r | |
2583 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2584 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2585 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2586 | preserved. The new 16-bit value is returned.\r | |
2587 | \r | |
2588 | If 16-bit operations are not supported, then ASSERT().\r | |
2589 | If StartBit is greater than 15, then ASSERT().\r | |
2590 | If EndBit is greater than 15, then ASSERT().\r | |
2591 | If EndBit is less than StartBit, then ASSERT().\r | |
2592 | \r | |
2593 | @param Operand Operand on which to perform the bitfield operation.\r | |
2594 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2595 | Range 0..15.\r | |
2596 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2597 | Range 0..15.\r | |
2598 | @param AndData The value to AND with the read value from the value.\r | |
2599 | @param OrData The value to OR with the result of the AND operation.\r | |
2600 | \r | |
2601 | @return The new 16-bit value.\r | |
2602 | \r | |
2603 | **/\r | |
2604 | UINT16\r | |
2605 | EFIAPI\r | |
2606 | BitFieldAndThenOr16 (\r | |
2607 | IN UINT16 Operand,\r | |
2608 | IN UINTN StartBit,\r | |
2609 | IN UINTN EndBit,\r | |
2610 | IN UINT16 AndData,\r | |
2611 | IN UINT16 OrData\r | |
2612 | );\r | |
2613 | \r | |
c7f33ca4 | 2614 | \r |
3eb9473e | 2615 | /**\r |
2616 | Returns a bit field from a 32-bit value.\r | |
2617 | \r | |
2618 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2619 | \r | |
2620 | If 32-bit operations are not supported, then ASSERT().\r | |
2621 | If StartBit is greater than 31, then ASSERT().\r | |
2622 | If EndBit is greater than 31, then ASSERT().\r | |
2623 | If EndBit is less than StartBit, then ASSERT().\r | |
2624 | \r | |
2625 | @param Operand Operand on which to perform the bitfield operation.\r | |
2626 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2627 | Range 0..31.\r | |
2628 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2629 | Range 0..31.\r | |
2630 | \r | |
2631 | @return The bit field read.\r | |
2632 | \r | |
2633 | **/\r | |
2634 | UINT32\r | |
2635 | EFIAPI\r | |
2636 | BitFieldRead32 (\r | |
2637 | IN UINT32 Operand,\r | |
2638 | IN UINTN StartBit,\r | |
2639 | IN UINTN EndBit\r | |
2640 | );\r | |
2641 | \r | |
c7f33ca4 | 2642 | \r |
3eb9473e | 2643 | /**\r |
2644 | Writes a bit field to a 32-bit value, and returns the result.\r | |
2645 | \r | |
2646 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2647 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
2648 | returned.\r | |
2649 | \r | |
2650 | If 32-bit operations are not supported, then ASSERT().\r | |
2651 | If StartBit is greater than 31, then ASSERT().\r | |
2652 | If EndBit is greater than 31, then ASSERT().\r | |
2653 | If EndBit is less than StartBit, then ASSERT().\r | |
2654 | \r | |
2655 | @param Operand Operand on which to perform the bitfield operation.\r | |
2656 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2657 | Range 0..31.\r | |
2658 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2659 | Range 0..31.\r | |
2660 | @param Value New value of the bit field.\r | |
2661 | \r | |
2662 | @return The new 32-bit value.\r | |
2663 | \r | |
2664 | **/\r | |
2665 | UINT32\r | |
2666 | EFIAPI\r | |
2667 | BitFieldWrite32 (\r | |
2668 | IN UINT32 Operand,\r | |
2669 | IN UINTN StartBit,\r | |
2670 | IN UINTN EndBit,\r | |
2671 | IN UINT32 Value\r | |
2672 | );\r | |
2673 | \r | |
c7f33ca4 | 2674 | \r |
3eb9473e | 2675 | /**\r |
2676 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
2677 | result.\r | |
2678 | \r | |
2679 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2680 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2681 | Operand are preserved. The new 32-bit value is returned.\r | |
2682 | \r | |
2683 | If 32-bit operations are not supported, then ASSERT().\r | |
2684 | If StartBit is greater than 31, then ASSERT().\r | |
2685 | If EndBit is greater than 31, then ASSERT().\r | |
2686 | If EndBit is less than StartBit, then ASSERT().\r | |
2687 | \r | |
2688 | @param Operand Operand on which to perform the bitfield operation.\r | |
2689 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2690 | Range 0..31.\r | |
2691 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2692 | Range 0..31.\r | |
2693 | @param OrData The value to OR with the read value from the value\r | |
2694 | \r | |
2695 | @return The new 32-bit value.\r | |
2696 | \r | |
2697 | **/\r | |
2698 | UINT32\r | |
2699 | EFIAPI\r | |
2700 | BitFieldOr32 (\r | |
2701 | IN UINT32 Operand,\r | |
2702 | IN UINTN StartBit,\r | |
2703 | IN UINTN EndBit,\r | |
2704 | IN UINT32 OrData\r | |
2705 | );\r | |
2706 | \r | |
c7f33ca4 | 2707 | \r |
3eb9473e | 2708 | /**\r |
2709 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
2710 | the result.\r | |
2711 | \r | |
2712 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2713 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2714 | preserved. The new 32-bit value is returned.\r | |
2715 | \r | |
2716 | If 32-bit operations are not supported, then ASSERT().\r | |
2717 | If StartBit is greater than 31, then ASSERT().\r | |
2718 | If EndBit is greater than 31, then ASSERT().\r | |
2719 | If EndBit is less than StartBit, then ASSERT().\r | |
2720 | \r | |
2721 | @param Operand Operand on which to perform the bitfield operation.\r | |
2722 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2723 | Range 0..31.\r | |
2724 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2725 | Range 0..31.\r | |
2726 | @param AndData The value to AND with the read value from the value\r | |
2727 | \r | |
2728 | @return The new 32-bit value.\r | |
2729 | \r | |
2730 | **/\r | |
2731 | UINT32\r | |
2732 | EFIAPI\r | |
2733 | BitFieldAnd32 (\r | |
2734 | IN UINT32 Operand,\r | |
2735 | IN UINTN StartBit,\r | |
2736 | IN UINTN EndBit,\r | |
2737 | IN UINT32 AndData\r | |
2738 | );\r | |
2739 | \r | |
c7f33ca4 | 2740 | \r |
3eb9473e | 2741 | /**\r |
2742 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
2743 | bitwise OR, and returns the result.\r | |
2744 | \r | |
2745 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2746 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2747 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2748 | preserved. The new 32-bit value is returned.\r | |
2749 | \r | |
2750 | If 32-bit operations are not supported, then ASSERT().\r | |
2751 | If StartBit is greater than 31, then ASSERT().\r | |
2752 | If EndBit is greater than 31, then ASSERT().\r | |
2753 | If EndBit is less than StartBit, then ASSERT().\r | |
2754 | \r | |
2755 | @param Operand Operand on which to perform the bitfield operation.\r | |
2756 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2757 | Range 0..31.\r | |
2758 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2759 | Range 0..31.\r | |
2760 | @param AndData The value to AND with the read value from the value.\r | |
2761 | @param OrData The value to OR with the result of the AND operation.\r | |
2762 | \r | |
2763 | @return The new 32-bit value.\r | |
2764 | \r | |
2765 | **/\r | |
2766 | UINT32\r | |
2767 | EFIAPI\r | |
2768 | BitFieldAndThenOr32 (\r | |
2769 | IN UINT32 Operand,\r | |
2770 | IN UINTN StartBit,\r | |
2771 | IN UINTN EndBit,\r | |
2772 | IN UINT32 AndData,\r | |
2773 | IN UINT32 OrData\r | |
2774 | );\r | |
2775 | \r | |
c7f33ca4 | 2776 | \r |
3eb9473e | 2777 | /**\r |
2778 | Returns a bit field from a 64-bit value.\r | |
2779 | \r | |
2780 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2781 | \r | |
2782 | If 64-bit operations are not supported, then ASSERT().\r | |
2783 | If StartBit is greater than 63, then ASSERT().\r | |
2784 | If EndBit is greater than 63, then ASSERT().\r | |
2785 | If EndBit is less than StartBit, then ASSERT().\r | |
2786 | \r | |
2787 | @param Operand Operand on which to perform the bitfield operation.\r | |
2788 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2789 | Range 0..63.\r | |
2790 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2791 | Range 0..63.\r | |
2792 | \r | |
2793 | @return The bit field read.\r | |
2794 | \r | |
2795 | **/\r | |
2796 | UINT64\r | |
2797 | EFIAPI\r | |
2798 | BitFieldRead64 (\r | |
2799 | IN UINT64 Operand,\r | |
2800 | IN UINTN StartBit,\r | |
2801 | IN UINTN EndBit\r | |
2802 | );\r | |
2803 | \r | |
c7f33ca4 | 2804 | \r |
3eb9473e | 2805 | /**\r |
2806 | Writes a bit field to a 64-bit value, and returns the result.\r | |
2807 | \r | |
2808 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2809 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
2810 | returned.\r | |
2811 | \r | |
2812 | If 64-bit operations are not supported, then ASSERT().\r | |
2813 | If StartBit is greater than 63, then ASSERT().\r | |
2814 | If EndBit is greater than 63, then ASSERT().\r | |
2815 | If EndBit is less than StartBit, then ASSERT().\r | |
2816 | \r | |
2817 | @param Operand Operand on which to perform the bitfield operation.\r | |
2818 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2819 | Range 0..63.\r | |
2820 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2821 | Range 0..63.\r | |
2822 | @param Value New value of the bit field.\r | |
2823 | \r | |
2824 | @return The new 64-bit value.\r | |
2825 | \r | |
2826 | **/\r | |
2827 | UINT64\r | |
2828 | EFIAPI\r | |
2829 | BitFieldWrite64 (\r | |
2830 | IN UINT64 Operand,\r | |
2831 | IN UINTN StartBit,\r | |
2832 | IN UINTN EndBit,\r | |
2833 | IN UINT64 Value\r | |
2834 | );\r | |
2835 | \r | |
c7f33ca4 | 2836 | \r |
3eb9473e | 2837 | /**\r |
2838 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
2839 | result.\r | |
2840 | \r | |
2841 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2842 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2843 | Operand are preserved. The new 64-bit value is returned.\r | |
2844 | \r | |
2845 | If 64-bit operations are not supported, then ASSERT().\r | |
2846 | If StartBit is greater than 63, then ASSERT().\r | |
2847 | If EndBit is greater than 63, then ASSERT().\r | |
2848 | If EndBit is less than StartBit, then ASSERT().\r | |
2849 | \r | |
2850 | @param Operand Operand on which to perform the bitfield operation.\r | |
2851 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2852 | Range 0..63.\r | |
2853 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2854 | Range 0..63.\r | |
2855 | @param OrData The value to OR with the read value from the value\r | |
2856 | \r | |
2857 | @return The new 64-bit value.\r | |
2858 | \r | |
2859 | **/\r | |
2860 | UINT64\r | |
2861 | EFIAPI\r | |
2862 | BitFieldOr64 (\r | |
2863 | IN UINT64 Operand,\r | |
2864 | IN UINTN StartBit,\r | |
2865 | IN UINTN EndBit,\r | |
2866 | IN UINT64 OrData\r | |
2867 | );\r | |
2868 | \r | |
c7f33ca4 | 2869 | \r |
3eb9473e | 2870 | /**\r |
2871 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
2872 | the result.\r | |
2873 | \r | |
2874 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2875 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2876 | preserved. The new 64-bit value is returned.\r | |
2877 | \r | |
2878 | If 64-bit operations are not supported, then ASSERT().\r | |
2879 | If StartBit is greater than 63, then ASSERT().\r | |
2880 | If EndBit is greater than 63, then ASSERT().\r | |
2881 | If EndBit is less than StartBit, then ASSERT().\r | |
2882 | \r | |
2883 | @param Operand Operand on which to perform the bitfield operation.\r | |
2884 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2885 | Range 0..63.\r | |
2886 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2887 | Range 0..63.\r | |
2888 | @param AndData The value to AND with the read value from the value\r | |
2889 | \r | |
2890 | @return The new 64-bit value.\r | |
2891 | \r | |
2892 | **/\r | |
2893 | UINT64\r | |
2894 | EFIAPI\r | |
2895 | BitFieldAnd64 (\r | |
2896 | IN UINT64 Operand,\r | |
2897 | IN UINTN StartBit,\r | |
2898 | IN UINTN EndBit,\r | |
2899 | IN UINT64 AndData\r | |
2900 | );\r | |
2901 | \r | |
c7f33ca4 | 2902 | \r |
3eb9473e | 2903 | /**\r |
2904 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
2905 | bitwise OR, and returns the result.\r | |
2906 | \r | |
2907 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2908 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2909 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2910 | preserved. The new 64-bit value is returned.\r | |
2911 | \r | |
2912 | If 64-bit operations are not supported, then ASSERT().\r | |
2913 | If StartBit is greater than 63, then ASSERT().\r | |
2914 | If EndBit is greater than 63, then ASSERT().\r | |
2915 | If EndBit is less than StartBit, then ASSERT().\r | |
2916 | \r | |
2917 | @param Operand Operand on which to perform the bitfield operation.\r | |
2918 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2919 | Range 0..63.\r | |
2920 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2921 | Range 0..63.\r | |
2922 | @param AndData The value to AND with the read value from the value.\r | |
2923 | @param OrData The value to OR with the result of the AND operation.\r | |
2924 | \r | |
2925 | @return The new 64-bit value.\r | |
2926 | \r | |
2927 | **/\r | |
2928 | UINT64\r | |
2929 | EFIAPI\r | |
2930 | BitFieldAndThenOr64 (\r | |
2931 | IN UINT64 Operand,\r | |
2932 | IN UINTN StartBit,\r | |
2933 | IN UINTN EndBit,\r | |
2934 | IN UINT64 AndData,\r | |
2935 | IN UINT64 OrData\r | |
2936 | );\r | |
2937 | \r | |
c7f33ca4 | 2938 | \r |
3eb9473e | 2939 | //\r |
2940 | // Base Library Synchronization Functions\r | |
2941 | //\r | |
2942 | \r | |
2943 | /**\r | |
2944 | Retrieves the architecture specific spin lock alignment requirements for\r | |
2945 | optimal spin lock performance.\r | |
2946 | \r | |
2947 | This function retrieves the spin lock alignment requirements for optimal\r | |
2948 | performance on a given CPU architecture. The spin lock alignment must be a\r | |
2949 | power of two and is returned by this function. If there are no alignment\r | |
2950 | requirements, then 1 must be returned. The spin lock synchronization\r | |
2951 | functions must function correctly if the spin lock size and alignment values\r | |
2952 | returned by this function are not used at all. These values are hints to the\r | |
2953 | consumers of the spin lock synchronization functions to obtain optimal spin\r | |
2954 | lock performance.\r | |
2955 | \r | |
2956 | @return The architecture specific spin lock alignment.\r | |
2957 | \r | |
2958 | **/\r | |
2959 | UINTN\r | |
2960 | EFIAPI\r | |
2961 | GetSpinLockProperties (\r | |
2962 | VOID\r | |
2963 | );\r | |
2964 | \r | |
c7f33ca4 | 2965 | \r |
3eb9473e | 2966 | /**\r |
2967 | Initializes a spin lock to the released state and returns the spin lock.\r | |
2968 | \r | |
2969 | This function initializes the spin lock specified by SpinLock to the released\r | |
2970 | state, and returns SpinLock. Optimal performance can be achieved by calling\r | |
2971 | GetSpinLockProperties() to determine the size and alignment requirements for\r | |
2972 | SpinLock.\r | |
2973 | \r | |
2974 | If SpinLock is NULL, then ASSERT().\r | |
2975 | \r | |
2976 | @param SpinLock A pointer to the spin lock to initialize to the released\r | |
2977 | state.\r | |
2978 | \r | |
2979 | @return SpinLock\r | |
2980 | \r | |
2981 | **/\r | |
2982 | SPIN_LOCK *\r | |
2983 | EFIAPI\r | |
2984 | InitializeSpinLock (\r | |
2985 | IN SPIN_LOCK *SpinLock\r | |
2986 | );\r | |
2987 | \r | |
c7f33ca4 | 2988 | \r |
3eb9473e | 2989 | /**\r |
2990 | Waits until a spin lock can be placed in the acquired state.\r | |
2991 | \r | |
2992 | This function checks the state of the spin lock specified by SpinLock. If\r | |
2993 | SpinLock is in the released state, then this function places SpinLock in the\r | |
2994 | acquired state and returns SpinLock. Otherwise, this function waits\r | |
2995 | indefinitely for the spin lock to be released, and then places it in the\r | |
2996 | acquired state and returns SpinLock. All state transitions of SpinLock must\r | |
2997 | be performed using MP safe mechanisms.\r | |
2998 | \r | |
2999 | If SpinLock is NULL, then ASSERT().\r | |
3000 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
3001 | If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r | |
3002 | PcdSpinLockTimeout microseconds, then ASSERT().\r | |
3003 | \r | |
3004 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r | |
3005 | \r | |
3006 | @return SpinLock\r | |
3007 | \r | |
3008 | **/\r | |
3009 | SPIN_LOCK *\r | |
3010 | EFIAPI\r | |
3011 | AcquireSpinLock (\r | |
3012 | IN SPIN_LOCK *SpinLock\r | |
3013 | );\r | |
3014 | \r | |
c7f33ca4 | 3015 | \r |
3eb9473e | 3016 | /**\r |
3017 | Attempts to place a spin lock in the acquired state.\r | |
3018 | \r | |
3019 | This function checks the state of the spin lock specified by SpinLock. If\r | |
3020 | SpinLock is in the released state, then this function places SpinLock in the\r | |
3021 | acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r | |
3022 | transitions of SpinLock must be performed using MP safe mechanisms.\r | |
3023 | \r | |
3024 | If SpinLock is NULL, then ASSERT().\r | |
3025 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
3026 | \r | |
3027 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r | |
3028 | \r | |
3029 | @retval TRUE SpinLock was placed in the acquired state.\r | |
3030 | @retval FALSE SpinLock could not be acquired.\r | |
3031 | \r | |
3032 | **/\r | |
3033 | BOOLEAN\r | |
3034 | EFIAPI\r | |
3035 | AcquireSpinLockOrFail (\r | |
3036 | IN SPIN_LOCK *SpinLock\r | |
3037 | );\r | |
3038 | \r | |
c7f33ca4 | 3039 | \r |
3eb9473e | 3040 | /**\r |
3041 | Releases a spin lock.\r | |
3042 | \r | |
3043 | This function places the spin lock specified by SpinLock in the release state\r | |
3044 | and returns SpinLock.\r | |
3045 | \r | |
3046 | If SpinLock is NULL, then ASSERT().\r | |
3047 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
3048 | \r | |
3049 | @param SpinLock A pointer to the spin lock to release.\r | |
3050 | \r | |
3051 | @return SpinLock\r | |
3052 | \r | |
3053 | **/\r | |
3054 | SPIN_LOCK *\r | |
3055 | EFIAPI\r | |
3056 | ReleaseSpinLock (\r | |
3057 | IN SPIN_LOCK *SpinLock\r | |
3058 | );\r | |
3059 | \r | |
c7f33ca4 | 3060 | \r |
3eb9473e | 3061 | /**\r |
3062 | Performs an atomic increment of an 32-bit unsigned integer.\r | |
3063 | \r | |
3064 | Performs an atomic increment of the 32-bit unsigned integer specified by\r | |
3065 | Value and returns the incremented value. The increment operation must be\r | |
3066 | performed using MP safe mechanisms. The state of the return value is not\r | |
3067 | guaranteed to be MP safe.\r | |
3068 | \r | |
3069 | If Value is NULL, then ASSERT().\r | |
3070 | \r | |
3071 | @param Value A pointer to the 32-bit value to increment.\r | |
3072 | \r | |
3073 | @return The incremented value.\r | |
3074 | \r | |
3075 | **/\r | |
3076 | UINT32\r | |
3077 | EFIAPI\r | |
3078 | InterlockedIncrement (\r | |
3079 | IN UINT32 *Value\r | |
3080 | );\r | |
3081 | \r | |
c7f33ca4 | 3082 | \r |
3eb9473e | 3083 | /**\r |
3084 | Performs an atomic decrement of an 32-bit unsigned integer.\r | |
3085 | \r | |
3086 | Performs an atomic decrement of the 32-bit unsigned integer specified by\r | |
3087 | Value and returns the decremented value. The decrement operation must be\r | |
3088 | performed using MP safe mechanisms. The state of the return value is not\r | |
3089 | guaranteed to be MP safe.\r | |
3090 | \r | |
3091 | If Value is NULL, then ASSERT().\r | |
3092 | \r | |
3093 | @param Value A pointer to the 32-bit value to decrement.\r | |
3094 | \r | |
3095 | @return The decremented value.\r | |
3096 | \r | |
3097 | **/\r | |
3098 | UINT32\r | |
3099 | EFIAPI\r | |
3100 | InterlockedDecrement (\r | |
3101 | IN UINT32 *Value\r | |
3102 | );\r | |
3103 | \r | |
c7f33ca4 | 3104 | \r |
3eb9473e | 3105 | /**\r |
3106 | Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r | |
3107 | \r | |
3108 | Performs an atomic compare exchange operation on the 32-bit unsigned integer\r | |
3109 | specified by Value. If Value is equal to CompareValue, then Value is set to\r | |
3110 | ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r | |
3111 | then Value is returned. The compare exchange operation must be performed using\r | |
3112 | MP safe mechanisms.\r | |
3113 | \r | |
3114 | If Value is NULL, then ASSERT().\r | |
3115 | \r | |
3116 | @param Value A pointer to the 32-bit value for the compare exchange\r | |
3117 | operation.\r | |
3118 | @param CompareValue 32-bit value used in compare operation.\r | |
3119 | @param ExchangeValue 32-bit value used in exchange operation.\r | |
3120 | \r | |
3121 | @return The original *Value before exchange.\r | |
3122 | \r | |
3123 | **/\r | |
3124 | UINT32\r | |
3125 | EFIAPI\r | |
3126 | InterlockedCompareExchange32 (\r | |
3127 | IN OUT UINT32 *Value,\r | |
3128 | IN UINT32 CompareValue,\r | |
3129 | IN UINT32 ExchangeValue\r | |
3130 | );\r | |
3131 | \r | |
c7f33ca4 | 3132 | \r |
3eb9473e | 3133 | /**\r |
3134 | Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r | |
3135 | \r | |
3136 | Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r | |
3137 | by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and\r | |
3138 | CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.\r | |
3139 | The compare exchange operation must be performed using MP safe mechanisms.\r | |
3140 | \r | |
3141 | If Value is NULL, then ASSERT().\r | |
3142 | \r | |
3143 | @param Value A pointer to the 64-bit value for the compare exchange\r | |
3144 | operation.\r | |
3145 | @param CompareValue 64-bit value used in compare operation.\r | |
3146 | @param ExchangeValue 64-bit value used in exchange operation.\r | |
3147 | \r | |
3148 | @return The original *Value before exchange.\r | |
3149 | \r | |
3150 | **/\r | |
3151 | UINT64\r | |
3152 | EFIAPI\r | |
3153 | InterlockedCompareExchange64 (\r | |
3154 | IN OUT UINT64 *Value,\r | |
3155 | IN UINT64 CompareValue,\r | |
3156 | IN UINT64 ExchangeValue\r | |
3157 | );\r | |
3158 | \r | |
c7f33ca4 | 3159 | \r |
3eb9473e | 3160 | /**\r |
3161 | Performs an atomic compare exchange operation on a pointer value.\r | |
3162 | \r | |
3163 | Performs an atomic compare exchange operation on the pointer value specified\r | |
3164 | by Value. If Value is equal to CompareValue, then Value is set to\r | |
3165 | ExchangeValue and CompareValue is returned. If Value is not equal to\r | |
3166 | CompareValue, then Value is returned. The compare exchange operation must be\r | |
3167 | performed using MP safe mechanisms.\r | |
3168 | \r | |
3169 | If Value is NULL, then ASSERT().\r | |
3170 | \r | |
3171 | @param Value A pointer to the pointer value for the compare exchange\r | |
3172 | operation.\r | |
3173 | @param CompareValue Pointer value used in compare operation.\r | |
3174 | @param ExchangeValue Pointer value used in exchange operation.\r | |
3175 | \r | |
3176 | **/\r | |
3177 | VOID *\r | |
3178 | EFIAPI\r | |
3179 | InterlockedCompareExchangePointer (\r | |
3180 | IN OUT VOID **Value,\r | |
3181 | IN VOID *CompareValue,\r | |
3182 | IN VOID *ExchangeValue\r | |
3183 | );\r | |
3184 | \r | |
c7f33ca4 | 3185 | \r |
3eb9473e | 3186 | //\r |
3187 | // Base Library Checksum Functions\r | |
3188 | //\r | |
3189 | \r | |
3190 | /**\r | |
c7f33ca4 | 3191 | Calculate the sum of all elements in a buffer in unit of UINT8.\r |
3eb9473e | 3192 | During calculation, the carry bits are dropped.\r |
3193 | \r | |
c7f33ca4 | 3194 | This function calculates the sum of all elements in a buffer\r |
3195 | in unit of UINT8. The carry bits in result of addition are dropped.\r | |
3196 | The result is returned as UINT8. If Length is Zero, then Zero is\r | |
3eb9473e | 3197 | returned.\r |
c7f33ca4 | 3198 | \r |
3eb9473e | 3199 | If Buffer is NULL, then ASSERT().\r |
c7f33ca4 | 3200 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r |
3eb9473e | 3201 | \r |
3202 | @param Buffer Pointer to the buffer to carry out the sum operation.\r | |
3203 | @param Length The size, in bytes, of Buffer .\r | |
3204 | \r | |
3205 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3206 | \r | |
3207 | **/\r | |
3208 | UINT8\r | |
3209 | EFIAPI\r | |
3210 | CalculateSum8 (\r | |
3211 | IN CONST UINT8 *Buffer,\r | |
3212 | IN UINTN Length\r | |
3213 | );\r | |
3214 | \r | |
3215 | \r | |
3216 | /**\r | |
c7f33ca4 | 3217 | Returns the two's complement checksum of all elements in a buffer\r |
3eb9473e | 3218 | of 8-bit values.\r |
3219 | \r | |
c7f33ca4 | 3220 | This function first calculates the sum of the 8-bit values in the\r |
3221 | buffer specified by Buffer and Length. The carry bits in the result\r | |
3222 | of addition are dropped. Then, the two's complement of the sum is\r | |
3eb9473e | 3223 | returned. If Length is 0, then 0 is returned.\r |
c7f33ca4 | 3224 | \r |
3eb9473e | 3225 | If Buffer is NULL, then ASSERT().\r |
3226 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3227 | \r | |
3228 | \r | |
3229 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r | |
3230 | @param Length The size, in bytes, of Buffer.\r | |
3231 | \r | |
3232 | @return Checksum The 2's complement checksum of Buffer.\r | |
3233 | \r | |
3234 | **/\r | |
3235 | UINT8\r | |
3236 | EFIAPI\r | |
3237 | CalculateCheckSum8 (\r | |
3238 | IN CONST UINT8 *Buffer,\r | |
3239 | IN UINTN Length\r | |
3240 | );\r | |
3241 | \r | |
c7f33ca4 | 3242 | \r |
3eb9473e | 3243 | /**\r |
c7f33ca4 | 3244 | Returns the sum of all elements in a buffer of 16-bit values. During\r |
3eb9473e | 3245 | calculation, the carry bits are dropped.\r |
3246 | \r | |
c7f33ca4 | 3247 | This function calculates the sum of the 16-bit values in the buffer\r |
3248 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3249 | The 16-bit result is returned. If Length is 0, then 0 is returned.\r | |
3250 | \r | |
3eb9473e | 3251 | If Buffer is NULL, then ASSERT().\r |
3252 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3253 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3254 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3255 | \r | |
3256 | @param Buffer Pointer to the buffer to carry out the sum operation.\r | |
3257 | @param Length The size, in bytes, of Buffer.\r | |
3258 | \r | |
3259 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3260 | \r | |
3261 | **/\r | |
3262 | UINT16\r | |
3263 | EFIAPI\r | |
3264 | CalculateSum16 (\r | |
3265 | IN CONST UINT16 *Buffer,\r | |
3266 | IN UINTN Length\r | |
3267 | );\r | |
3268 | \r | |
c7f33ca4 | 3269 | \r |
3eb9473e | 3270 | /**\r |
c7f33ca4 | 3271 | Returns the two's complement checksum of all elements in a buffer of\r |
3eb9473e | 3272 | 16-bit values.\r |
3273 | \r | |
c7f33ca4 | 3274 | This function first calculates the sum of the 16-bit values in the buffer\r |
3275 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3276 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3eb9473e | 3277 | is 0, then 0 is returned.\r |
c7f33ca4 | 3278 | \r |
3eb9473e | 3279 | If Buffer is NULL, then ASSERT().\r |
3280 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3281 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
c7f33ca4 | 3282 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r |
3eb9473e | 3283 | \r |
3284 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r | |
3285 | @param Length The size, in bytes, of Buffer.\r | |
3286 | \r | |
3287 | @return Checksum The 2's complement checksum of Buffer.\r | |
3288 | \r | |
3289 | **/\r | |
3290 | UINT16\r | |
3291 | EFIAPI\r | |
3292 | CalculateCheckSum16 (\r | |
3293 | IN CONST UINT16 *Buffer,\r | |
3294 | IN UINTN Length\r | |
3295 | );\r | |
3296 | \r | |
c7f33ca4 | 3297 | \r |
3eb9473e | 3298 | /**\r |
c7f33ca4 | 3299 | Returns the sum of all elements in a buffer of 32-bit values. During\r |
3eb9473e | 3300 | calculation, the carry bits are dropped.\r |
3301 | \r | |
c7f33ca4 | 3302 | This function calculates the sum of the 32-bit values in the buffer\r |
3303 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3304 | The 32-bit result is returned. If Length is 0, then 0 is returned.\r | |
3305 | \r | |
3eb9473e | 3306 | If Buffer is NULL, then ASSERT().\r |
3307 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3308 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3309 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3310 | \r | |
3311 | @param Buffer Pointer to the buffer to carry out the sum operation.\r | |
3312 | @param Length The size, in bytes, of Buffer.\r | |
3313 | \r | |
3314 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3315 | \r | |
3316 | **/\r | |
3317 | UINT32\r | |
3318 | EFIAPI\r | |
3319 | CalculateSum32 (\r | |
3320 | IN CONST UINT32 *Buffer,\r | |
3321 | IN UINTN Length\r | |
3322 | );\r | |
3323 | \r | |
c7f33ca4 | 3324 | \r |
3eb9473e | 3325 | /**\r |
c7f33ca4 | 3326 | Returns the two's complement checksum of all elements in a buffer of\r |
3eb9473e | 3327 | 32-bit values.\r |
3328 | \r | |
c7f33ca4 | 3329 | This function first calculates the sum of the 32-bit values in the buffer\r |
3330 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3331 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3eb9473e | 3332 | is 0, then 0 is returned.\r |
c7f33ca4 | 3333 | \r |
3eb9473e | 3334 | If Buffer is NULL, then ASSERT().\r |
3335 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3336 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
c7f33ca4 | 3337 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r |
3eb9473e | 3338 | \r |
3339 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r | |
3340 | @param Length The size, in bytes, of Buffer.\r | |
3341 | \r | |
3342 | @return Checksum The 2's complement checksum of Buffer.\r | |
3343 | \r | |
3344 | **/\r | |
3345 | UINT32\r | |
3346 | EFIAPI\r | |
3347 | CalculateCheckSum32 (\r | |
3348 | IN CONST UINT32 *Buffer,\r | |
3349 | IN UINTN Length\r | |
3350 | );\r | |
3351 | \r | |
c7f33ca4 | 3352 | \r |
3eb9473e | 3353 | /**\r |
c7f33ca4 | 3354 | Returns the sum of all elements in a buffer of 64-bit values. During\r |
3eb9473e | 3355 | calculation, the carry bits are dropped.\r |
3356 | \r | |
c7f33ca4 | 3357 | This function calculates the sum of the 64-bit values in the buffer\r |
3358 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3359 | The 64-bit result is returned. If Length is 0, then 0 is returned.\r | |
3360 | \r | |
3eb9473e | 3361 | If Buffer is NULL, then ASSERT().\r |
3362 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3363 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3364 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3365 | \r | |
3366 | @param Buffer Pointer to the buffer to carry out the sum operation.\r | |
3367 | @param Length The size, in bytes, of Buffer.\r | |
3368 | \r | |
3369 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3370 | \r | |
3371 | **/\r | |
3372 | UINT64\r | |
3373 | EFIAPI\r | |
3374 | CalculateSum64 (\r | |
3375 | IN CONST UINT64 *Buffer,\r | |
3376 | IN UINTN Length\r | |
3377 | );\r | |
3378 | \r | |
c7f33ca4 | 3379 | \r |
3eb9473e | 3380 | /**\r |
c7f33ca4 | 3381 | Returns the two's complement checksum of all elements in a buffer of\r |
3eb9473e | 3382 | 64-bit values.\r |
3383 | \r | |
c7f33ca4 | 3384 | This function first calculates the sum of the 64-bit values in the buffer\r |
3385 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3386 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3eb9473e | 3387 | is 0, then 0 is returned.\r |
c7f33ca4 | 3388 | \r |
3eb9473e | 3389 | If Buffer is NULL, then ASSERT().\r |
3390 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3391 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
c7f33ca4 | 3392 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r |
3eb9473e | 3393 | \r |
3394 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r | |
3395 | @param Length The size, in bytes, of Buffer.\r | |
3396 | \r | |
3397 | @return Checksum The 2's complement checksum of Buffer.\r | |
3398 | \r | |
3399 | **/\r | |
3400 | UINT64\r | |
3401 | EFIAPI\r | |
3402 | CalculateCheckSum64 (\r | |
3403 | IN CONST UINT64 *Buffer,\r | |
3404 | IN UINTN Length\r | |
3405 | );\r | |
3406 | \r | |
c7f33ca4 | 3407 | \r |
3eb9473e | 3408 | //\r |
3409 | // Base Library CPU Functions\r | |
3410 | //\r | |
3411 | typedef\r | |
3412 | VOID\r | |
3413 | (EFIAPI *SWITCH_STACK_ENTRY_POINT) (\r | |
3414 | IN VOID *Context1, OPTIONAL\r | |
3415 | IN VOID *Context2 OPTIONAL\r | |
3416 | );\r | |
3417 | \r | |
c7f33ca4 | 3418 | \r |
3eb9473e | 3419 | /**\r |
3420 | Used to serialize load and store operations.\r | |
3421 | \r | |
3422 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
3423 | globally visible when this function returns.\r | |
3424 | \r | |
3425 | **/\r | |
3426 | VOID\r | |
3427 | EFIAPI\r | |
3428 | MemoryFence (\r | |
3429 | VOID\r | |
3430 | );\r | |
3431 | \r | |
c7f33ca4 | 3432 | \r |
3eb9473e | 3433 | /**\r |
3434 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
3435 | and returns 0.\r | |
3436 | \r | |
3437 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
3438 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
3439 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
3440 | \r | |
3441 | If JumpBuffer is NULL, then ASSERT().\r | |
3442 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
3443 | \r | |
3444 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3445 | \r | |
3446 | @retval 0 Indicates a return from SetJump().\r | |
3447 | \r | |
3448 | **/\r | |
3449 | UINTN\r | |
3450 | EFIAPI\r | |
3451 | SetJump (\r | |
3452 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
3453 | );\r | |
3454 | \r | |
c7f33ca4 | 3455 | \r |
3eb9473e | 3456 | /**\r |
3457 | Restores the CPU context that was saved with SetJump().\r | |
3458 | \r | |
3459 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
3460 | function never returns to the caller. Instead is resumes execution based on\r | |
3461 | the state of JumpBuffer.\r | |
3462 | \r | |
3463 | If JumpBuffer is NULL, then ASSERT().\r | |
3464 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
3465 | If Value is 0, then ASSERT().\r | |
3466 | \r | |
3467 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3468 | @param Value The value to return when the SetJump() context is\r | |
3469 | restored and must be non-zero.\r | |
3470 | \r | |
3471 | **/\r | |
3472 | VOID\r | |
3473 | EFIAPI\r | |
3474 | LongJump (\r | |
3475 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
3476 | IN UINTN Value\r | |
3477 | );\r | |
3478 | \r | |
c7f33ca4 | 3479 | \r |
3eb9473e | 3480 | /**\r |
3481 | Enables CPU interrupts.\r | |
3482 | \r | |
3483 | Enables CPU interrupts.\r | |
3484 | \r | |
3485 | **/\r | |
3486 | VOID\r | |
3487 | EFIAPI\r | |
3488 | EnableInterrupts (\r | |
3489 | VOID\r | |
3490 | );\r | |
3491 | \r | |
c7f33ca4 | 3492 | \r |
3eb9473e | 3493 | /**\r |
3494 | Disables CPU interrupts.\r | |
3495 | \r | |
3496 | Disables CPU interrupts.\r | |
3497 | \r | |
3498 | **/\r | |
3499 | VOID\r | |
3500 | EFIAPI\r | |
3501 | DisableInterrupts (\r | |
3502 | VOID\r | |
3503 | );\r | |
3504 | \r | |
c7f33ca4 | 3505 | \r |
3eb9473e | 3506 | /**\r |
3507 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
3508 | operation.\r | |
3509 | \r | |
3510 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
3511 | operation.\r | |
3512 | \r | |
3513 | @retval TRUE CPU interrupts were enabled on entry to this call.\r | |
3514 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
3515 | \r | |
3516 | **/\r | |
3517 | BOOLEAN\r | |
3518 | EFIAPI\r | |
3519 | SaveAndDisableInterrupts (\r | |
3520 | VOID\r | |
3521 | );\r | |
3522 | \r | |
c7f33ca4 | 3523 | \r |
3eb9473e | 3524 | /**\r |
3525 | Enables CPU interrupts for the smallest window required to capture any\r | |
3526 | pending interrupts.\r | |
3527 | \r | |
3528 | Enables CPU interrupts for the smallest window required to capture any\r | |
3529 | pending interrupts.\r | |
3530 | \r | |
3531 | **/\r | |
3532 | VOID\r | |
3533 | EFIAPI\r | |
3534 | EnableDisableInterrupts (\r | |
3535 | VOID\r | |
3536 | );\r | |
3537 | \r | |
c7f33ca4 | 3538 | \r |
3eb9473e | 3539 | /**\r |
3540 | Retrieves the current CPU interrupt state.\r | |
3541 | \r | |
3542 | Retrieves the current CPU interrupt state. Returns TRUE is interrupts are\r | |
3543 | currently enabled. Otherwise returns FALSE.\r | |
3544 | \r | |
3545 | @retval TRUE CPU interrupts are enabled.\r | |
3546 | @retval FALSE CPU interrupts are disabled.\r | |
3547 | \r | |
3548 | **/\r | |
3549 | BOOLEAN\r | |
3550 | EFIAPI\r | |
3551 | GlueGetInterruptState (\r | |
3552 | VOID\r | |
3553 | );\r | |
3554 | \r | |
c7f33ca4 | 3555 | \r |
3eb9473e | 3556 | /**\r |
3557 | Set the current CPU interrupt state.\r | |
3558 | \r | |
3559 | Sets the current CPU interrupt state to the state specified by\r | |
3560 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
3561 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
3562 | returned.\r | |
3563 | \r | |
3564 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
3565 | interrupts should be disabled.\r | |
3566 | \r | |
3567 | @return InterruptState\r | |
3568 | \r | |
3569 | **/\r | |
3570 | BOOLEAN\r | |
3571 | EFIAPI\r | |
3572 | SetInterruptState (\r | |
3573 | IN BOOLEAN InterruptState\r | |
3574 | );\r | |
3575 | \r | |
c7f33ca4 | 3576 | \r |
3eb9473e | 3577 | /**\r |
3578 | Places the CPU in a sleep state until an interrupt is received.\r | |
3579 | \r | |
3580 | Places the CPU in a sleep state until an interrupt is received. If interrupts\r | |
3581 | are disabled prior to calling this function, then the CPU will be placed in a\r | |
3582 | sleep state indefinitely.\r | |
3583 | \r | |
3584 | **/\r | |
3585 | VOID\r | |
3586 | EFIAPI\r | |
3587 | CpuSleep (\r | |
3588 | VOID\r | |
3589 | );\r | |
3590 | \r | |
c7f33ca4 | 3591 | \r |
3eb9473e | 3592 | /**\r |
3593 | Requests CPU to pause for a short period of time.\r | |
3594 | \r | |
3595 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
3596 | systems to prevent memory starvation while waiting for a spin lock.\r | |
3597 | \r | |
3598 | **/\r | |
3599 | VOID\r | |
3600 | EFIAPI\r | |
3601 | CpuPause (\r | |
3602 | VOID\r | |
3603 | );\r | |
3604 | \r | |
c7f33ca4 | 3605 | \r |
3eb9473e | 3606 | /**\r |
3607 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
3608 | \r | |
3609 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
3610 | \r | |
3611 | **/\r | |
3612 | VOID\r | |
3613 | EFIAPI\r | |
3614 | CpuFlushTlb (\r | |
3615 | VOID\r | |
3616 | );\r | |
3617 | \r | |
c7f33ca4 | 3618 | \r |
3eb9473e | 3619 | /**\r |
3620 | Transfers control to a function starting with a new stack.\r | |
3621 | \r | |
c7f33ca4 | 3622 | Transfers control to the function specified by EntryPoint using the\r |
3623 | new stack specified by NewStack and passing in the parameters specified\r | |
3624 | by Context1 and Context2. Context1 and Context2 are optional and may\r | |
3625 | be NULL. The function EntryPoint must never return. This function\r | |
3626 | supports a variable number of arguments following the NewStack parameter.\r | |
3627 | These additional arguments are ignored on IA-32, x64, and EBC.\r | |
3628 | IPF CPUs expect one additional parameter of type VOID * that specifies\r | |
3629 | the new backing store pointer.\r | |
3eb9473e | 3630 | \r |
3631 | If EntryPoint is NULL, then ASSERT().\r | |
3632 | If NewStack is NULL, then ASSERT().\r | |
3633 | \r | |
3634 | @param EntryPoint A pointer to function to call with the new stack.\r | |
3635 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
3636 | function.\r | |
3637 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
3638 | function.\r | |
3639 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
3640 | function.\r | |
3641 | \r | |
3642 | **/\r | |
3643 | VOID\r | |
3644 | EFIAPI\r | |
3645 | SwitchStack (\r | |
3646 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
3647 | IN VOID *Context1, OPTIONAL\r | |
3648 | IN VOID *Context2, OPTIONAL\r | |
c7f33ca4 | 3649 | IN VOID *NewStack,\r |
3650 | ...\r | |
3eb9473e | 3651 | );\r |
3652 | \r | |
c7f33ca4 | 3653 | \r |
3eb9473e | 3654 | /**\r |
3655 | Generates a breakpoint on the CPU.\r | |
3656 | \r | |
3657 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
3658 | that code can resume normal execution after the breakpoint.\r | |
3659 | \r | |
3660 | **/\r | |
3661 | VOID\r | |
3662 | EFIAPI\r | |
3663 | CpuBreakpoint (\r | |
3664 | VOID\r | |
3665 | );\r | |
3666 | \r | |
c7f33ca4 | 3667 | \r |
3eb9473e | 3668 | /**\r |
3669 | Executes an infinite loop.\r | |
3670 | \r | |
3671 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
3672 | past the loop and the code that follows the loop must execute properly. This\r | |
3673 | implies that the infinite loop must not cause the code that follow it to be\r | |
3674 | optimized away.\r | |
3675 | \r | |
3676 | **/\r | |
3677 | VOID\r | |
3678 | EFIAPI\r | |
3679 | CpuDeadLoop (\r | |
3680 | VOID\r | |
3681 | );\r | |
3682 | \r | |
c7f33ca4 | 3683 | \r |
3684 | #if defined (MDE_CPU_IPF)\r | |
3685 | \r | |
3686 | /**\r | |
3687 | Flush a range of cache lines in the cache coherency domain of the calling\r | |
3688 | CPU.\r | |
3689 | \r | |
3690 | Invalidates the cache lines specified by Address and Length. If Address is\r | |
3691 | not aligned on a cache line boundary, then entire cache line containing\r | |
3692 | Address is invalidated. If Address + Length is not aligned on a cache line\r | |
3693 | boundary, then the entire instruction cache line containing Address + Length\r | |
3694 | -1 is invalidated. This function may choose to invalidate the entire\r | |
3695 | instruction cache if that is more efficient than invalidating the specified\r | |
3696 | range. If Length is 0, the no instruction cache lines are invalidated.\r | |
9e21d6d0 | 3697 | Address is returned. This function is only available on IPF.\r |
c7f33ca4 | 3698 | \r |
3699 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r | |
3700 | \r | |
3701 | @param Address The base address of the instruction lines to invalidate. If\r | |
3702 | the CPU is in a physical addressing mode, then Address is a\r | |
3703 | physical address. If the CPU is in a virtual addressing mode,\r | |
3704 | then Address is a virtual address.\r | |
3705 | \r | |
3706 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
3707 | \r | |
3708 | @return Address\r | |
3709 | \r | |
3710 | **/\r | |
3711 | VOID *\r | |
3712 | EFIAPI\r | |
9e21d6d0 | 3713 | AsmFlushCacheRange (\r |
c7f33ca4 | 3714 | IN VOID *Address,\r |
3715 | IN UINTN Length\r | |
3716 | );\r | |
3717 | \r | |
3718 | \r | |
3719 | /**\r | |
3720 | Executes a FC instruction\r | |
3721 | Executes a FC instruction on the cache line specified by Address.\r | |
3722 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r | |
3723 | An implementation may flush a larger region. This function is only available on IPF.\r | |
3724 | \r | |
9e21d6d0 | 3725 | @param Address The Address of cache line to be flushed.\r |
c7f33ca4 | 3726 | \r |
3727 | @return The address of FC instruction executed.\r | |
3728 | \r | |
3729 | **/\r | |
3730 | UINT64\r | |
3731 | EFIAPI\r | |
3732 | AsmFc (\r | |
3733 | IN UINT64 Address\r | |
3734 | );\r | |
3735 | \r | |
3736 | \r | |
3737 | /**\r | |
3738 | Executes a FC.I instruction.\r | |
3739 | Executes a FC.I instruction on the cache line specified by Address.\r | |
3740 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r | |
3741 | An implementation may flush a larger region. This function is only available on IPF.\r | |
3742 | \r | |
9e21d6d0 | 3743 | @param Address The Address of cache line to be flushed.\r |
c7f33ca4 | 3744 | \r |
3745 | @return The address of FC.I instruction executed.\r | |
3746 | \r | |
3747 | **/\r | |
3748 | UINT64\r | |
3749 | EFIAPI\r | |
3750 | AsmFci (\r | |
3751 | IN UINT64 Address\r | |
3752 | );\r | |
3753 | \r | |
3754 | \r | |
3755 | /**\r | |
3756 | Reads the current value of a Processor Identifier Register (CPUID).\r | |
3757 | The Index of largest implemented CPUID (One less than the number of implemented CPUID\r | |
3758 | registers) is determined by CPUID [3] bits {7:0}.\r | |
3759 | No parameter checking is performed on Index. If the Index value is beyond the\r | |
3760 | implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r | |
3761 | must either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
3762 | catch the faults. This function is only available on IPF.\r | |
3763 | \r | |
9e21d6d0 | 3764 | @param Index The 8-bit Processor Identifier Register index to read.\r |
c7f33ca4 | 3765 | \r |
3766 | @return The current value of Processor Identifier Register specified by Index.\r | |
3767 | \r | |
3768 | **/\r | |
3769 | UINT64\r | |
3770 | EFIAPI\r | |
3771 | AsmReadCpuid (\r | |
3772 | IN UINT8 Index\r | |
3773 | );\r | |
3774 | \r | |
3775 | \r | |
3776 | /**\r | |
3777 | Reads the current value of 64-bit Processor Status Register (PSR).\r | |
3778 | This function is only available on IPF.\r | |
3779 | \r | |
3780 | @return The current value of PSR.\r | |
3781 | \r | |
3782 | **/\r | |
3783 | UINT64\r | |
3784 | EFIAPI\r | |
3785 | AsmReadPsr (\r | |
3786 | VOID\r | |
3787 | );\r | |
3788 | \r | |
3789 | \r | |
3790 | /**\r | |
3791 | Writes the current value of 64-bit Processor Status Register (PSR).\r | |
3792 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
3793 | reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur. The caller must either guarantee that Value is valid, or the caller must set up fault handlers to catch the faults.\r | |
3794 | This function is only available on IPF.\r | |
3795 | \r | |
3796 | @param Value The 64-bit value to write to PSR.\r | |
3797 | \r | |
3798 | @return The 64-bit value written to the PSR.\r | |
3799 | \r | |
3800 | **/\r | |
3801 | UINT64\r | |
3802 | EFIAPI\r | |
3803 | AsmWritePsr (\r | |
3804 | IN UINT64 Value\r | |
3805 | );\r | |
3806 | \r | |
3807 | \r | |
3808 | /**\r | |
3809 | Reads the current value of 64-bit Kernel Register #0 (KR0).\r | |
3810 | This function is only available on IPF.\r | |
3811 | \r | |
3812 | @return The current value of KR0.\r | |
3813 | \r | |
3814 | **/\r | |
3815 | UINT64\r | |
3816 | EFIAPI\r | |
3817 | AsmReadKr0 (\r | |
3818 | VOID\r | |
3819 | );\r | |
3820 | \r | |
3821 | \r | |
3822 | /**\r | |
3823 | Reads the current value of 64-bit Kernel Register #1 (KR1).\r | |
3824 | This function is only available on IPF.\r | |
3825 | \r | |
3826 | @return The current value of KR1.\r | |
3827 | \r | |
3828 | **/\r | |
3829 | UINT64\r | |
3830 | EFIAPI\r | |
3831 | AsmReadKr1 (\r | |
3832 | VOID\r | |
3833 | );\r | |
3834 | \r | |
3835 | \r | |
3836 | /**\r | |
3837 | Reads the current value of 64-bit Kernel Register #2 (KR2).\r | |
3838 | This function is only available on IPF.\r | |
3839 | \r | |
3840 | @return The current value of KR2.\r | |
3841 | \r | |
3842 | **/\r | |
3843 | UINT64\r | |
3844 | EFIAPI\r | |
3845 | AsmReadKr2 (\r | |
3846 | VOID\r | |
3847 | );\r | |
3848 | \r | |
3849 | \r | |
3850 | /**\r | |
3851 | Reads the current value of 64-bit Kernel Register #3 (KR3).\r | |
3852 | This function is only available on IPF.\r | |
3853 | \r | |
3854 | @return The current value of KR3.\r | |
3855 | \r | |
3856 | **/\r | |
3857 | UINT64\r | |
3858 | EFIAPI\r | |
3859 | AsmReadKr3 (\r | |
3860 | VOID\r | |
3861 | );\r | |
3862 | \r | |
3863 | \r | |
3864 | /**\r | |
3865 | Reads the current value of 64-bit Kernel Register #4 (KR4).\r | |
3866 | This function is only available on IPF.\r | |
3867 | \r | |
3868 | @return The current value of KR4.\r | |
3869 | \r | |
3870 | **/\r | |
3871 | UINT64\r | |
3872 | EFIAPI\r | |
3873 | AsmReadKr4 (\r | |
3874 | VOID\r | |
3875 | );\r | |
3876 | \r | |
3877 | \r | |
3878 | /**\r | |
3879 | Reads the current value of 64-bit Kernel Register #5 (KR5).\r | |
3880 | This function is only available on IPF.\r | |
3881 | \r | |
3882 | @return The current value of KR5.\r | |
3883 | \r | |
3884 | **/\r | |
3885 | UINT64\r | |
3886 | EFIAPI\r | |
3887 | AsmReadKr5 (\r | |
3888 | VOID\r | |
3889 | );\r | |
3890 | \r | |
3891 | \r | |
3892 | /**\r | |
3893 | Reads the current value of 64-bit Kernel Register #6 (KR6).\r | |
3894 | This function is only available on IPF.\r | |
3895 | \r | |
3896 | @return The current value of KR6.\r | |
3897 | \r | |
3898 | **/\r | |
3899 | UINT64\r | |
3900 | EFIAPI\r | |
3901 | AsmReadKr6 (\r | |
3902 | VOID\r | |
3903 | );\r | |
3904 | \r | |
3905 | \r | |
3906 | /**\r | |
3907 | Reads the current value of 64-bit Kernel Register #7 (KR7).\r | |
3908 | This function is only available on IPF.\r | |
3909 | \r | |
3910 | @return The current value of KR7.\r | |
3911 | \r | |
3912 | **/\r | |
3913 | UINT64\r | |
3914 | EFIAPI\r | |
3915 | AsmReadKr7 (\r | |
3916 | VOID\r | |
3917 | );\r | |
3918 | \r | |
3919 | \r | |
3920 | /**\r | |
3921 | Write the current value of 64-bit Kernel Register #0 (KR0).\r | |
3922 | This function is only available on IPF.\r | |
3923 | \r | |
3924 | @param Value The 64-bit value to write to KR0.\r | |
3925 | \r | |
3926 | @return The 64-bit value written to the KR0.\r | |
3927 | \r | |
3928 | **/\r | |
3929 | UINT64\r | |
3930 | EFIAPI\r | |
3931 | AsmWriteKr0 (\r | |
3932 | IN UINT64 Value\r | |
3933 | );\r | |
3934 | \r | |
3935 | \r | |
3936 | /**\r | |
3937 | Write the current value of 64-bit Kernel Register #1 (KR1).\r | |
3938 | This function is only available on IPF.\r | |
3939 | \r | |
3940 | @param Value The 64-bit value to write to KR1.\r | |
3941 | \r | |
3942 | @return The 64-bit value written to the KR1.\r | |
3943 | \r | |
3944 | **/\r | |
3945 | UINT64\r | |
3946 | EFIAPI\r | |
3947 | AsmWriteKr1 (\r | |
3948 | IN UINT64 Value\r | |
3949 | );\r | |
3950 | \r | |
3951 | \r | |
3952 | /**\r | |
3953 | Write the current value of 64-bit Kernel Register #2 (KR2).\r | |
3954 | This function is only available on IPF.\r | |
3955 | \r | |
3956 | @param Value The 64-bit value to write to KR2.\r | |
3957 | \r | |
3958 | @return The 64-bit value written to the KR2.\r | |
3959 | \r | |
3960 | **/\r | |
3961 | UINT64\r | |
3962 | EFIAPI\r | |
3963 | AsmWriteKr2 (\r | |
3964 | IN UINT64 Value\r | |
3965 | );\r | |
3966 | \r | |
3967 | \r | |
3968 | /**\r | |
3969 | Write the current value of 64-bit Kernel Register #3 (KR3).\r | |
3970 | This function is only available on IPF.\r | |
3971 | \r | |
3972 | @param Value The 64-bit value to write to KR3.\r | |
3973 | \r | |
3974 | @return The 64-bit value written to the KR3.\r | |
3975 | \r | |
3976 | **/\r | |
3977 | UINT64\r | |
3978 | EFIAPI\r | |
3979 | AsmWriteKr3 (\r | |
3980 | IN UINT64 Value\r | |
3981 | );\r | |
3982 | \r | |
3983 | \r | |
3984 | /**\r | |
3985 | Write the current value of 64-bit Kernel Register #4 (KR4).\r | |
3986 | This function is only available on IPF.\r | |
3987 | \r | |
3988 | @param Value The 64-bit value to write to KR4.\r | |
3989 | \r | |
3990 | @return The 64-bit value written to the KR4.\r | |
3991 | \r | |
3992 | **/\r | |
3993 | UINT64\r | |
3994 | EFIAPI\r | |
3995 | AsmWriteKr4 (\r | |
3996 | IN UINT64 Value\r | |
3997 | );\r | |
3998 | \r | |
3999 | \r | |
4000 | /**\r | |
4001 | Write the current value of 64-bit Kernel Register #5 (KR5).\r | |
4002 | This function is only available on IPF.\r | |
4003 | \r | |
4004 | @param Value The 64-bit value to write to KR5.\r | |
4005 | \r | |
4006 | @return The 64-bit value written to the KR5.\r | |
4007 | \r | |
4008 | **/\r | |
4009 | UINT64\r | |
4010 | EFIAPI\r | |
4011 | AsmWriteKr5 (\r | |
4012 | IN UINT64 Value\r | |
4013 | );\r | |
4014 | \r | |
4015 | \r | |
4016 | /**\r | |
4017 | Write the current value of 64-bit Kernel Register #6 (KR6).\r | |
4018 | This function is only available on IPF.\r | |
4019 | \r | |
4020 | @param Value The 64-bit value to write to KR6.\r | |
4021 | \r | |
4022 | @return The 64-bit value written to the KR6.\r | |
4023 | \r | |
4024 | **/\r | |
4025 | UINT64\r | |
4026 | EFIAPI\r | |
4027 | AsmWriteKr6 (\r | |
4028 | IN UINT64 Value\r | |
4029 | );\r | |
4030 | \r | |
4031 | \r | |
4032 | /**\r | |
4033 | Write the current value of 64-bit Kernel Register #7 (KR7).\r | |
4034 | This function is only available on IPF.\r | |
4035 | \r | |
4036 | @param Value The 64-bit value to write to KR7.\r | |
4037 | \r | |
4038 | @return The 64-bit value written to the KR7.\r | |
4039 | \r | |
4040 | **/\r | |
4041 | UINT64\r | |
4042 | EFIAPI\r | |
4043 | AsmWriteKr7 (\r | |
4044 | IN UINT64 Value\r | |
4045 | );\r | |
4046 | \r | |
4047 | \r | |
4048 | /**\r | |
4049 | Reads the current value of Interval Timer Counter Register (ITC).\r | |
4050 | This function is only available on IPF.\r | |
4051 | \r | |
4052 | @return The current value of ITC.\r | |
4053 | \r | |
4054 | **/\r | |
4055 | UINT64\r | |
4056 | EFIAPI\r | |
4057 | AsmReadItc (\r | |
4058 | VOID\r | |
4059 | );\r | |
4060 | \r | |
4061 | \r | |
4062 | /**\r | |
4063 | Reads the current value of Interval Timer Vector Register (ITV).\r | |
4064 | This function is only available on IPF.\r | |
4065 | \r | |
4066 | @return The current value of ITV.\r | |
4067 | \r | |
4068 | **/\r | |
4069 | UINT64\r | |
4070 | EFIAPI\r | |
4071 | AsmReadItv (\r | |
4072 | VOID\r | |
4073 | );\r | |
4074 | \r | |
4075 | \r | |
4076 | /**\r | |
4077 | Reads the current value of Interval Timer Match Register (ITM).\r | |
4078 | This function is only available on IPF.\r | |
4079 | \r | |
4080 | @return The current value of ITM.\r | |
4081 | **/\r | |
4082 | UINT64\r | |
4083 | EFIAPI\r | |
4084 | AsmReadItm (\r | |
4085 | VOID\r | |
4086 | );\r | |
4087 | \r | |
4088 | \r | |
4089 | /**\r | |
4090 | Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r | |
4091 | This function is only available on IPF.\r | |
4092 | \r | |
4093 | @param Value The 64-bit value to write to ITC.\r | |
4094 | \r | |
4095 | @return The 64-bit value written to the ITC.\r | |
4096 | \r | |
4097 | **/\r | |
4098 | UINT64\r | |
4099 | EFIAPI\r | |
4100 | AsmWriteItc (\r | |
4101 | IN UINT64 Value\r | |
4102 | );\r | |
4103 | \r | |
4104 | \r | |
4105 | /**\r | |
4106 | Writes the current value of 64-bit Interval Timer Match Register (ITM).\r | |
4107 | This function is only available on IPF.\r | |
4108 | \r | |
4109 | @param Value The 64-bit value to write to ITM.\r | |
4110 | \r | |
4111 | @return The 64-bit value written to the ITM.\r | |
4112 | \r | |
4113 | **/\r | |
4114 | UINT64\r | |
4115 | EFIAPI\r | |
4116 | AsmWriteItm (\r | |
4117 | IN UINT64 Value\r | |
4118 | );\r | |
4119 | \r | |
4120 | \r | |
4121 | /**\r | |
4122 | Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r | |
4123 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4124 | reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r | |
4125 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4126 | fault handlers to catch the faults.\r | |
4127 | This function is only available on IPF.\r | |
4128 | \r | |
4129 | @param Value The 64-bit value to write to ITV.\r | |
4130 | \r | |
4131 | @return The 64-bit value written to the ITV.\r | |
4132 | \r | |
4133 | **/\r | |
4134 | UINT64\r | |
4135 | EFIAPI\r | |
4136 | AsmWriteItv (\r | |
4137 | IN UINT64 Value\r | |
4138 | );\r | |
4139 | \r | |
4140 | \r | |
4141 | /**\r | |
4142 | Reads the current value of Default Control Register (DCR).\r | |
4143 | This function is only available on IPF.\r | |
4144 | \r | |
4145 | @return The current value of DCR.\r | |
4146 | \r | |
4147 | **/\r | |
4148 | UINT64\r | |
4149 | EFIAPI\r | |
4150 | AsmReadDcr (\r | |
4151 | VOID\r | |
4152 | );\r | |
4153 | \r | |
4154 | \r | |
4155 | /**\r | |
4156 | Reads the current value of Interruption Vector Address Register (IVA).\r | |
4157 | This function is only available on IPF.\r | |
4158 | \r | |
4159 | @return The current value of IVA.\r | |
4160 | **/\r | |
4161 | UINT64\r | |
4162 | EFIAPI\r | |
4163 | AsmReadIva (\r | |
4164 | VOID\r | |
4165 | );\r | |
4166 | \r | |
4167 | \r | |
4168 | /**\r | |
4169 | Reads the current value of Page Table Address Register (PTA).\r | |
4170 | This function is only available on IPF.\r | |
4171 | \r | |
4172 | @return The current value of PTA.\r | |
4173 | \r | |
4174 | **/\r | |
4175 | UINT64\r | |
4176 | EFIAPI\r | |
4177 | AsmReadPta (\r | |
4178 | VOID\r | |
4179 | );\r | |
4180 | \r | |
4181 | \r | |
4182 | /**\r | |
4183 | Writes the current value of 64-bit Default Control Register (DCR).\r | |
4184 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4185 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4186 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4187 | fault handlers to catch the faults.\r | |
4188 | This function is only available on IPF.\r | |
4189 | \r | |
4190 | @param Value The 64-bit value to write to DCR.\r | |
4191 | \r | |
4192 | @return The 64-bit value written to the DCR.\r | |
4193 | \r | |
4194 | **/\r | |
4195 | UINT64\r | |
4196 | EFIAPI\r | |
4197 | AsmWriteDcr (\r | |
4198 | IN UINT64 Value\r | |
4199 | );\r | |
4200 | \r | |
4201 | \r | |
4202 | /**\r | |
4203 | Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r | |
4204 | The size of vector table is 32 K bytes and is 32 K bytes aligned\r | |
4205 | the low 15 bits of Value is ignored when written.\r | |
4206 | This function is only available on IPF.\r | |
4207 | \r | |
4208 | @param Value The 64-bit value to write to IVA.\r | |
4209 | \r | |
4210 | @return The 64-bit value written to the IVA.\r | |
4211 | \r | |
4212 | **/\r | |
4213 | UINT64\r | |
4214 | EFIAPI\r | |
4215 | AsmWriteIva (\r | |
4216 | IN UINT64 Value\r | |
4217 | );\r | |
4218 | \r | |
4219 | \r | |
4220 | /**\r | |
4221 | Writes the current value of 64-bit Page Table Address Register (PTA).\r | |
4222 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4223 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4224 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4225 | fault handlers to catch the faults.\r | |
4226 | This function is only available on IPF.\r | |
4227 | \r | |
4228 | @param Value The 64-bit value to write to PTA.\r | |
4229 | \r | |
4230 | @return The 64-bit value written to the PTA.\r | |
4231 | **/\r | |
4232 | UINT64\r | |
4233 | EFIAPI\r | |
4234 | AsmWritePta (\r | |
4235 | IN UINT64 Value\r | |
4236 | );\r | |
4237 | \r | |
4238 | \r | |
4239 | /**\r | |
4240 | Reads the current value of Local Interrupt ID Register (LID).\r | |
4241 | This function is only available on IPF.\r | |
4242 | \r | |
4243 | @return The current value of LID.\r | |
4244 | \r | |
4245 | **/\r | |
4246 | UINT64\r | |
4247 | EFIAPI\r | |
4248 | AsmReadLid (\r | |
4249 | VOID\r | |
4250 | );\r | |
4251 | \r | |
4252 | \r | |
4253 | /**\r | |
4254 | Reads the current value of External Interrupt Vector Register (IVR).\r | |
4255 | This function is only available on IPF.\r | |
4256 | \r | |
4257 | @return The current value of IVR.\r | |
4258 | \r | |
4259 | **/\r | |
4260 | UINT64\r | |
4261 | EFIAPI\r | |
4262 | AsmReadIvr (\r | |
4263 | VOID\r | |
4264 | );\r | |
4265 | \r | |
4266 | \r | |
4267 | /**\r | |
4268 | Reads the current value of Task Priority Register (TPR).\r | |
4269 | This function is only available on IPF.\r | |
4270 | \r | |
4271 | @return The current value of TPR.\r | |
4272 | \r | |
4273 | **/\r | |
4274 | UINT64\r | |
4275 | EFIAPI\r | |
4276 | AsmReadTpr (\r | |
4277 | VOID\r | |
4278 | );\r | |
4279 | \r | |
4280 | \r | |
4281 | /**\r | |
4282 | Reads the current value of External Interrupt Request Register #0 (IRR0).\r | |
4283 | This function is only available on IPF.\r | |
4284 | \r | |
4285 | @return The current value of IRR0.\r | |
4286 | \r | |
4287 | **/\r | |
4288 | UINT64\r | |
4289 | EFIAPI\r | |
4290 | AsmReadIrr0 (\r | |
4291 | VOID\r | |
4292 | );\r | |
4293 | \r | |
4294 | \r | |
4295 | /**\r | |
4296 | Reads the current value of External Interrupt Request Register #1 (IRR1).\r | |
4297 | This function is only available on IPF.\r | |
4298 | \r | |
4299 | @return The current value of IRR1.\r | |
4300 | \r | |
4301 | **/\r | |
4302 | UINT64\r | |
4303 | EFIAPI\r | |
4304 | AsmReadIrr1 (\r | |
4305 | VOID\r | |
4306 | );\r | |
4307 | \r | |
4308 | \r | |
4309 | /**\r | |
4310 | Reads the current value of External Interrupt Request Register #2 (IRR2).\r | |
4311 | This function is only available on IPF.\r | |
4312 | \r | |
4313 | @return The current value of IRR2.\r | |
4314 | \r | |
4315 | **/\r | |
4316 | UINT64\r | |
4317 | EFIAPI\r | |
4318 | AsmReadIrr2 (\r | |
4319 | VOID\r | |
4320 | );\r | |
4321 | \r | |
4322 | \r | |
4323 | /**\r | |
4324 | Reads the current value of External Interrupt Request Register #3 (IRR3).\r | |
4325 | This function is only available on IPF.\r | |
4326 | \r | |
4327 | @return The current value of IRR3.\r | |
4328 | \r | |
4329 | **/\r | |
4330 | UINT64\r | |
4331 | EFIAPI\r | |
4332 | AsmReadIrr3 (\r | |
4333 | VOID\r | |
4334 | );\r | |
4335 | \r | |
4336 | \r | |
4337 | /**\r | |
4338 | Reads the current value of Performance Monitor Vector Register (PMV).\r | |
4339 | This function is only available on IPF.\r | |
4340 | \r | |
4341 | @return The current value of PMV.\r | |
4342 | \r | |
4343 | **/\r | |
4344 | UINT64\r | |
4345 | EFIAPI\r | |
4346 | AsmReadPmv (\r | |
4347 | VOID\r | |
4348 | );\r | |
4349 | \r | |
4350 | \r | |
4351 | /**\r | |
4352 | Reads the current value of Corrected Machine Check Vector Register (CMCV).\r | |
4353 | This function is only available on IPF.\r | |
4354 | \r | |
4355 | @return The current value of CMCV.\r | |
4356 | \r | |
4357 | **/\r | |
4358 | UINT64\r | |
4359 | EFIAPI\r | |
4360 | AsmReadCmcv (\r | |
4361 | VOID\r | |
4362 | );\r | |
4363 | \r | |
4364 | \r | |
4365 | /**\r | |
4366 | Reads the current value of Local Redirection Register #0 (LRR0).\r | |
4367 | This function is only available on IPF.\r | |
4368 | \r | |
4369 | @return The current value of LRR0.\r | |
4370 | \r | |
4371 | **/\r | |
4372 | UINT64\r | |
4373 | EFIAPI\r | |
4374 | AsmReadLrr0 (\r | |
4375 | VOID\r | |
4376 | );\r | |
4377 | \r | |
4378 | \r | |
4379 | /**\r | |
4380 | Reads the current value of Local Redirection Register #1 (LRR1).\r | |
4381 | This function is only available on IPF.\r | |
4382 | \r | |
4383 | @return The current value of LRR1.\r | |
4384 | \r | |
4385 | **/\r | |
4386 | UINT64\r | |
4387 | EFIAPI\r | |
4388 | AsmReadLrr1 (\r | |
4389 | VOID\r | |
4390 | );\r | |
4391 | \r | |
4392 | \r | |
4393 | /**\r | |
4394 | Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r | |
4395 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4396 | reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r | |
4397 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4398 | fault handlers to catch the faults.\r | |
4399 | This function is only available on IPF.\r | |
4400 | \r | |
4401 | @param Value The 64-bit value to write to LID.\r | |
4402 | \r | |
4403 | @return The 64-bit value written to the LID.\r | |
4404 | \r | |
4405 | **/\r | |
4406 | UINT64\r | |
4407 | EFIAPI\r | |
4408 | AsmWriteLid (\r | |
4409 | IN UINT64 Value\r | |
4410 | );\r | |
4411 | \r | |
4412 | \r | |
4413 | /**\r | |
4414 | Writes the current value of 64-bit Task Priority Register (TPR).\r | |
4415 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4416 | reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r | |
4417 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4418 | fault handlers to catch the faults.\r | |
4419 | This function is only available on IPF.\r | |
4420 | \r | |
4421 | @param Value The 64-bit value to write to TPR.\r | |
4422 | \r | |
4423 | @return The 64-bit value written to the TPR.\r | |
4424 | \r | |
4425 | **/\r | |
4426 | UINT64\r | |
4427 | EFIAPI\r | |
4428 | AsmWriteTpr (\r | |
4429 | IN UINT64 Value\r | |
4430 | );\r | |
4431 | \r | |
4432 | \r | |
4433 | /**\r | |
4434 | Performs a write operation on End OF External Interrupt Register (EOI).\r | |
4435 | Writes a value of 0 to the EOI Register. This function is only available on IPF.\r | |
4436 | \r | |
4437 | **/\r | |
4438 | VOID\r | |
4439 | EFIAPI\r | |
4440 | AsmWriteEoi (\r | |
4441 | VOID\r | |
4442 | );\r | |
4443 | \r | |
4444 | \r | |
4445 | /**\r | |
4446 | Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r | |
4447 | No parameter checking is performed on Value. All bits of Value corresponding\r | |
4448 | to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r | |
4449 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4450 | fault handlers to catch the faults.\r | |
4451 | This function is only available on IPF.\r | |
4452 | \r | |
4453 | @param Value The 64-bit value to write to PMV.\r | |
4454 | \r | |
4455 | @return The 64-bit value written to the PMV.\r | |
4456 | \r | |
4457 | **/\r | |
4458 | UINT64\r | |
4459 | EFIAPI\r | |
4460 | AsmWritePmv (\r | |
4461 | IN UINT64 Value\r | |
4462 | );\r | |
4463 | \r | |
4464 | \r | |
4465 | /**\r | |
4466 | Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r | |
4467 | No parameter checking is performed on Value. All bits of Value corresponding\r | |
4468 | to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r | |
4469 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4470 | fault handlers to catch the faults.\r | |
4471 | This function is only available on IPF.\r | |
4472 | \r | |
4473 | @param Value The 64-bit value to write to CMCV.\r | |
4474 | \r | |
4475 | @return The 64-bit value written to the CMCV.\r | |
4476 | \r | |
4477 | **/\r | |
4478 | UINT64\r | |
4479 | EFIAPI\r | |
4480 | AsmWriteCmcv (\r | |
4481 | IN UINT64 Value\r | |
4482 | );\r | |
4483 | \r | |
4484 | \r | |
4485 | /**\r | |
4486 | Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r | |
4487 | No parameter checking is performed on Value. All bits of Value corresponding\r | |
4488 | to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r | |
4489 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4490 | fault handlers to catch the faults.\r | |
4491 | This function is only available on IPF.\r | |
4492 | \r | |
4493 | @param Value The 64-bit value to write to LRR0.\r | |
4494 | \r | |
4495 | @return The 64-bit value written to the LRR0.\r | |
4496 | \r | |
4497 | **/\r | |
4498 | UINT64\r | |
4499 | EFIAPI\r | |
4500 | AsmWriteLrr0 (\r | |
4501 | IN UINT64 Value\r | |
4502 | );\r | |
4503 | \r | |
4504 | \r | |
4505 | /**\r | |
4506 | Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r | |
4507 | No parameter checking is performed on Value. All bits of Value corresponding\r | |
4508 | to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r | |
4509 | The caller must either guarantee that Value is valid, or the caller must\r | |
4510 | set up fault handlers to catch the faults.\r | |
4511 | This function is only available on IPF.\r | |
4512 | \r | |
4513 | @param Value The 64-bit value to write to LRR1.\r | |
4514 | \r | |
4515 | @return The 64-bit value written to the LRR1.\r | |
4516 | \r | |
4517 | **/\r | |
4518 | UINT64\r | |
4519 | EFIAPI\r | |
4520 | AsmWriteLrr1 (\r | |
4521 | IN UINT64 Value\r | |
4522 | );\r | |
4523 | \r | |
4524 | \r | |
4525 | /**\r | |
4526 | Reads the current value of Instruction Breakpoint Register (IBR).\r | |
4527 | \r | |
4528 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4529 | registers contain breakpoint addresses, and the odd numbered registers contain\r | |
4530 | breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r | |
4531 | on all processor models. Implemented registers are contiguous starting with\r | |
4532 | register 0. No parameter checking is performed on Index, and if the Index value\r | |
4533 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4534 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4535 | set up fault handlers to catch the faults.\r | |
4536 | This function is only available on IPF.\r | |
4537 | \r | |
4538 | @param Index The 8-bit Instruction Breakpoint Register index to read.\r | |
4539 | \r | |
4540 | @return The current value of Instruction Breakpoint Register specified by Index.\r | |
4541 | \r | |
4542 | **/\r | |
4543 | UINT64\r | |
4544 | EFIAPI\r | |
4545 | AsmReadIbr (\r | |
4546 | IN UINT8 Index\r | |
4547 | );\r | |
4548 | \r | |
4549 | \r | |
4550 | /**\r | |
4551 | Reads the current value of Data Breakpoint Register (DBR).\r | |
4552 | \r | |
4553 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4554 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
4555 | mask conditions. At least 4 data registers pairs are implemented on all processor\r | |
4556 | models. Implemented registers are contiguous starting with register 0.\r | |
4557 | No parameter checking is performed on Index. If the Index value is beyond\r | |
4558 | the implemented DBR register range, a Reserved Register/Field fault may occur.\r | |
4559 | The caller must either guarantee that Index is valid, or the caller must set up\r | |
4560 | fault handlers to catch the faults.\r | |
4561 | This function is only available on IPF.\r | |
4562 | \r | |
4563 | @param Index The 8-bit Data Breakpoint Register index to read.\r | |
4564 | \r | |
4565 | @return The current value of Data Breakpoint Register specified by Index.\r | |
4566 | \r | |
4567 | **/\r | |
4568 | UINT64\r | |
4569 | EFIAPI\r | |
4570 | AsmReadDbr (\r | |
4571 | IN UINT8 Index\r | |
4572 | );\r | |
4573 | \r | |
4574 | \r | |
4575 | /**\r | |
4576 | Reads the current value of Performance Monitor Configuration Register (PMC).\r | |
4577 | \r | |
4578 | All processor implementations provide at least 4 performance counters\r | |
4579 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r | |
fd0d281b | 4580 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
c7f33ca4 | 4581 | additional implementation-dependent PMC and PMD to increase the number of\r |
fd0d281b | 4582 | 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r |
c7f33ca4 | 4583 | register set is implementation dependent. No parameter checking is performed\r |
4584 | on Index. If the Index value is beyond the implemented PMC register range,\r | |
4585 | zero value will be returned.\r | |
4586 | This function is only available on IPF.\r | |
4587 | \r | |
4588 | @param Index The 8-bit Performance Monitor Configuration Register index to read.\r | |
4589 | \r | |
4590 | @return The current value of Performance Monitor Configuration Register\r | |
4591 | specified by Index.\r | |
4592 | \r | |
4593 | **/\r | |
4594 | UINT64\r | |
4595 | EFIAPI\r | |
4596 | AsmReadPmc (\r | |
4597 | IN UINT8 Index\r | |
4598 | );\r | |
4599 | \r | |
4600 | \r | |
4601 | /**\r | |
4602 | Reads the current value of Performance Monitor Data Register (PMD).\r | |
4603 | \r | |
4604 | All processor implementations provide at least 4 performance counters\r | |
4605 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r | |
fd0d281b | 4606 | overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r |
c7f33ca4 | 4607 | provide additional implementation-dependent PMC and PMD to increase the number\r |
fd0d281b | 4608 | of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r |
c7f33ca4 | 4609 | register set is implementation dependent. No parameter checking is performed\r |
4610 | on Index. If the Index value is beyond the implemented PMD register range,\r | |
4611 | zero value will be returned.\r | |
4612 | This function is only available on IPF.\r | |
4613 | \r | |
4614 | @param Index The 8-bit Performance Monitor Data Register index to read.\r | |
4615 | \r | |
4616 | @return The current value of Performance Monitor Data Register specified by Index.\r | |
4617 | \r | |
4618 | **/\r | |
4619 | UINT64\r | |
4620 | EFIAPI\r | |
4621 | AsmReadPmd (\r | |
4622 | IN UINT8 Index\r | |
4623 | );\r | |
4624 | \r | |
4625 | \r | |
4626 | /**\r | |
4627 | Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r | |
4628 | \r | |
4629 | Writes current value of Instruction Breakpoint Register specified by Index.\r | |
4630 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4631 | registers contain breakpoint addresses, and odd numbered registers contain\r | |
4632 | breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r | |
4633 | on all processor models. Implemented registers are contiguous starting with\r | |
4634 | register 0. No parameter checking is performed on Index. If the Index value\r | |
4635 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4636 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4637 | set up fault handlers to catch the faults.\r | |
4638 | This function is only available on IPF.\r | |
4639 | \r | |
4640 | @param Index The 8-bit Instruction Breakpoint Register index to write.\r | |
4641 | @param Value The 64-bit value to write to IBR.\r | |
4642 | \r | |
4643 | @return The 64-bit value written to the IBR.\r | |
4644 | \r | |
4645 | **/\r | |
4646 | UINT64\r | |
4647 | EFIAPI\r | |
4648 | AsmWriteIbr (\r | |
4649 | IN UINT8 Index,\r | |
4650 | IN UINT64 Value\r | |
4651 | );\r | |
4652 | \r | |
4653 | \r | |
4654 | /**\r | |
4655 | Writes the current value of 64-bit Data Breakpoint Register (DBR).\r | |
4656 | \r | |
4657 | Writes current value of Data Breakpoint Register specified by Index.\r | |
4658 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4659 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
4660 | mask conditions. At least 4 data registers pairs are implemented on all processor\r | |
4661 | models. Implemented registers are contiguous starting with register 0. No parameter\r | |
4662 | checking is performed on Index. If the Index value is beyond the implemented\r | |
4663 | DBR register range, a Reserved Register/Field fault may occur. The caller must\r | |
4664 | either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
4665 | catch the faults.\r | |
4666 | This function is only available on IPF.\r | |
4667 | \r | |
4668 | @param Index The 8-bit Data Breakpoint Register index to write.\r | |
4669 | @param Value The 64-bit value to write to DBR.\r | |
4670 | \r | |
4671 | @return The 64-bit value written to the DBR.\r | |
4672 | \r | |
4673 | **/\r | |
4674 | UINT64\r | |
4675 | EFIAPI\r | |
4676 | AsmWriteDbr (\r | |
4677 | IN UINT8 Index,\r | |
4678 | IN UINT64 Value\r | |
4679 | );\r | |
4680 | \r | |
4681 | \r | |
4682 | /**\r | |
4683 | Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r | |
4684 | \r | |
4685 | Writes current value of Performance Monitor Configuration Register specified by Index.\r | |
4686 | All processor implementations provide at least 4 performance counters\r | |
4687 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status\r | |
fd0d281b | 4688 | registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r |
4689 | implementation-dependent PMC and PMD to increase the number of 'generic' performance\r | |
c7f33ca4 | 4690 | counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r |
4691 | dependent. No parameter checking is performed on Index. If the Index value is\r | |
4692 | beyond the implemented PMC register range, the write is ignored.\r | |
4693 | This function is only available on IPF.\r | |
4694 | \r | |
4695 | @param Index The 8-bit Performance Monitor Configuration Register index to write.\r | |
4696 | @param Value The 64-bit value to write to PMC.\r | |
4697 | \r | |
4698 | @return The 64-bit value written to the PMC.\r | |
4699 | \r | |
4700 | **/\r | |
4701 | UINT64\r | |
4702 | EFIAPI\r | |
4703 | AsmWritePmc (\r | |
4704 | IN UINT8 Index,\r | |
4705 | IN UINT64 Value\r | |
4706 | );\r | |
4707 | \r | |
4708 | \r | |
4709 | /**\r | |
4710 | Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r | |
4711 | \r | |
4712 | Writes current value of Performance Monitor Data Register specified by Index.\r | |
4713 | All processor implementations provide at least 4 performance counters\r | |
4714 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r | |
fd0d281b | 4715 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
4716 | additional implementation-dependent PMC and PMD to increase the number of 'generic'\r | |
c7f33ca4 | 4717 | performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r |
4718 | is implementation dependent. No parameter checking is performed on Index. If the\r | |
4719 | Index value is beyond the implemented PMD register range, the write is ignored.\r | |
4720 | This function is only available on IPF.\r | |
4721 | \r | |
4722 | @param Index The 8-bit Performance Monitor Data Register index to write.\r | |
4723 | @param Value The 64-bit value to write to PMD.\r | |
4724 | \r | |
4725 | @return The 64-bit value written to the PMD.\r | |
4726 | \r | |
4727 | **/\r | |
4728 | UINT64\r | |
4729 | EFIAPI\r | |
4730 | AsmWritePmd (\r | |
4731 | IN UINT8 Index,\r | |
4732 | IN UINT64 Value\r | |
4733 | );\r | |
4734 | \r | |
4735 | \r | |
4736 | /**\r | |
4737 | Reads the current value of 64-bit Global Pointer (GP).\r | |
4738 | \r | |
4739 | Reads and returns the current value of GP.\r | |
4740 | This function is only available on IPF.\r | |
4741 | \r | |
4742 | @return The current value of GP.\r | |
4743 | \r | |
4744 | **/\r | |
4745 | UINT64\r | |
4746 | EFIAPI\r | |
4747 | AsmReadGp (\r | |
4748 | VOID\r | |
4749 | );\r | |
4750 | \r | |
4751 | \r | |
4752 | /**\r | |
4753 | Write the current value of 64-bit Global Pointer (GP).\r | |
4754 | \r | |
4755 | Writes the current value of GP. The 64-bit value written to the GP is returned.\r | |
4756 | No parameter checking is performed on Value.\r | |
4757 | This function is only available on IPF.\r | |
4758 | \r | |
4759 | @param Value The 64-bit value to write to GP.\r | |
4760 | \r | |
4761 | @return The 64-bit value written to the GP.\r | |
4762 | \r | |
4763 | **/\r | |
4764 | UINT64\r | |
4765 | EFIAPI\r | |
4766 | AsmWriteGp (\r | |
4767 | IN UINT64 Value\r | |
4768 | );\r | |
4769 | \r | |
4770 | \r | |
4771 | /**\r | |
4772 | Reads the current value of 64-bit Stack Pointer (SP).\r | |
4773 | \r | |
4774 | Reads and returns the current value of SP.\r | |
4775 | This function is only available on IPF.\r | |
4776 | \r | |
4777 | @return The current value of SP.\r | |
4778 | \r | |
4779 | **/\r | |
4780 | UINT64\r | |
4781 | EFIAPI\r | |
4782 | AsmReadSp (\r | |
4783 | VOID\r | |
4784 | );\r | |
4785 | \r | |
4786 | \r | |
4787 | /**\r | |
4788 | Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r | |
4789 | \r | |
4790 | Determines the current execution mode of the CPU.\r | |
4791 | If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r | |
4792 | If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r | |
4793 | If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r | |
4794 | and -1 is returned.\r | |
4795 | This function is only available on IPF.\r | |
4796 | \r | |
4797 | @return 1 The CPU is in virtual mode.\r | |
4798 | @return 0 The CPU is in physical mode.\r | |
4799 | @return -1 The CPU is in mixed mode.\r | |
4800 | \r | |
4801 | **/\r | |
4802 | INT64\r | |
4803 | EFIAPI\r | |
4804 | AsmCpuVirtual (\r | |
4805 | VOID\r | |
4806 | );\r | |
4807 | \r | |
4808 | \r | |
4809 | /**\r | |
4810 | Makes a PAL procedure call.\r | |
4811 | \r | |
4812 | This is a wrapper function to make a PAL procedure call. Based on the Index\r | |
4813 | value this API will make static or stacked PAL call. The following table\r | |
4814 | describes the usage of PAL Procedure Index Assignment. Architected procedures\r | |
4815 | may be designated as required or optional. If a PAL procedure is specified\r | |
4816 | as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r | |
4817 | Status field of the PAL_CALL_RETURN structure.\r | |
4818 | This indicates that the procedure is not present in this PAL implementation.\r | |
fd0d281b | 4819 | It is the caller's responsibility to check for this return code after calling\r |
c7f33ca4 | 4820 | any optional PAL procedure.\r |
4821 | No parameter checking is performed on the 5 input parameters, but there are\r | |
4822 | some common rules that the caller should follow when making a PAL call. Any\r | |
4823 | address passed to PAL as buffers for return parameters must be 8-byte aligned.\r | |
4824 | Unaligned addresses may cause undefined results. For those parameters defined\r | |
4825 | as reserved or some fields defined as reserved must be zero filled or the invalid\r | |
4826 | argument return value may be returned or undefined result may occur during the\r | |
4827 | execution of the procedure. If the PalEntryPoint does not point to a valid\r | |
4828 | PAL entry point then the system behavior is undefined. This function is only\r | |
4829 | available on IPF.\r | |
4830 | \r | |
4831 | @param PalEntryPoint The PAL procedure calls entry point.\r | |
4832 | @param Index The PAL procedure Index number.\r | |
4833 | @param Arg2 The 2nd parameter for PAL procedure calls.\r | |
4834 | @param Arg3 The 3rd parameter for PAL procedure calls.\r | |
4835 | @param Arg4 The 4th parameter for PAL procedure calls.\r | |
4836 | \r | |
4837 | @return structure returned from the PAL Call procedure, including the status and return value.\r | |
4838 | \r | |
4839 | **/\r | |
4840 | PAL_CALL_RETURN\r | |
4841 | EFIAPI\r | |
4842 | AsmPalCall (\r | |
4843 | IN UINT64 PalEntryPoint,\r | |
4844 | IN UINT64 Index,\r | |
4845 | IN UINT64 Arg2,\r | |
4846 | IN UINT64 Arg3,\r | |
4847 | IN UINT64 Arg4\r | |
4848 | );\r | |
4849 | \r | |
4850 | \r | |
4851 | /**\r | |
4852 | Transfers control to a function starting with a new stack.\r | |
4853 | \r | |
4854 | Transfers control to the function specified by EntryPoint using the new stack\r | |
4855 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
4856 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
4857 | EntryPoint must never return.\r | |
4858 | \r | |
4859 | If EntryPoint is NULL, then ASSERT().\r | |
4860 | If NewStack is NULL, then ASSERT().\r | |
4861 | \r | |
4862 | @param EntryPoint A pointer to function to call with the new stack.\r | |
4863 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
4864 | function.\r | |
4865 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
4866 | function.\r | |
4867 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
4868 | function.\r | |
4869 | @param NewBsp A pointer to the new memory location for RSE backing\r | |
4870 | store.\r | |
4871 | \r | |
4872 | **/\r | |
4873 | VOID\r | |
4874 | EFIAPI\r | |
4875 | AsmSwitchStackAndBackingStore (\r | |
4876 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
4877 | IN VOID *Context1, OPTIONAL\r | |
4878 | IN VOID *Context2, OPTIONAL\r | |
4879 | IN VOID *NewStack,\r | |
4880 | IN VOID *NewBsp\r | |
4881 | );\r | |
4882 | \r | |
4883 | \r | |
4884 | //\r | |
4885 | // Bugbug: This call should be removed after\r | |
4886 | // the PalCall Instance issue has been fixed.\r | |
4887 | //\r | |
4888 | /**\r | |
4889 | Performs a PAL call using static calling convention.\r | |
4890 | \r | |
4891 | An internal function to perform a PAL call using static calling convention.\r | |
4892 | \r | |
4893 | @param PalEntryPoint The entry point address of PAL. The address in ar.kr5\r | |
4894 | would be used if this parameter were NULL on input.\r | |
4895 | @param Arg1 The first argument of a PAL call.\r | |
4896 | @param Arg1 The second argument of a PAL call.\r | |
4897 | @param Arg1 The third argument of a PAL call.\r | |
4898 | @param Arg1 The fourth argument of a PAL call.\r | |
4899 | \r | |
4900 | @return The values returned in r8, r9, r10 and r11.\r | |
4901 | \r | |
4902 | **/\r | |
4903 | PAL_CALL_RETURN\r | |
4904 | PalCallStatic (\r | |
4905 | IN CONST VOID *PalEntryPoint,\r | |
4906 | IN UINT64 Arg1,\r | |
4907 | IN UINT64 Arg2,\r | |
4908 | IN UINT64 Arg3,\r | |
4909 | IN UINT64 Arg4\r | |
4910 | );\r | |
4911 | \r | |
4912 | \r | |
4913 | #elif defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r | |
4914 | //\r | |
4915 | // IA32 and X64 Specific Functions\r | |
4916 | //\r | |
4917 | //\r | |
4918 | // Byte packed structure for 16-bit Real Mode EFLAGS\r | |
4919 | //\r | |
4920 | typedef union {\r | |
4921 | struct {\r | |
4922 | UINT32 CF:1; // Carry Flag\r | |
4923 | UINT32 Reserved_0:1; // Reserved\r | |
4924 | UINT32 PF:1; // Parity Flag\r | |
4925 | UINT32 Reserved_1:1; // Reserved\r | |
4926 | UINT32 AF:1; // Auxiliary Carry Flag\r | |
4927 | UINT32 Reserved_2:1; // Reserved\r | |
4928 | UINT32 ZF:1; // Zero Flag\r | |
4929 | UINT32 SF:1; // Sign Flag\r | |
4930 | UINT32 TF:1; // Trap Flag\r | |
4931 | UINT32 IF:1; // Interrupt Enable Flag\r | |
4932 | UINT32 DF:1; // Direction Flag\r | |
4933 | UINT32 OF:1; // Overflow Flag\r | |
4934 | UINT32 IOPL:2; // I/O Privilege Level\r | |
4935 | UINT32 NT:1; // Nested Task\r | |
4936 | UINT32 Reserved_3:1; // Reserved\r | |
4937 | } Bits;\r | |
3eb9473e | 4938 | UINT16 Uint16;\r |
4939 | } IA32_FLAGS16;\r | |
4940 | \r | |
4941 | //\r | |
4942 | // Byte packed structure for EFLAGS/RFLAGS\r | |
4943 | // 32-bits on IA-32\r | |
4944 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
4945 | //\r | |
4946 | typedef union {\r | |
4947 | struct {\r | |
4948 | UINT32 CF:1; // Carry Flag\r | |
4949 | UINT32 Reserved_0:1; // Reserved\r | |
4950 | UINT32 PF:1; // Parity Flag\r | |
4951 | UINT32 Reserved_1:1; // Reserved\r | |
4952 | UINT32 AF:1; // Auxiliary Carry Flag\r | |
4953 | UINT32 Reserved_2:1; // Reserved\r | |
4954 | UINT32 ZF:1; // Zero Flag\r | |
4955 | UINT32 SF:1; // Sign Flag\r | |
4956 | UINT32 TF:1; // Trap Flag\r | |
4957 | UINT32 IF:1; // Interrupt Enable Flag\r | |
4958 | UINT32 DF:1; // Direction Flag\r | |
4959 | UINT32 OF:1; // Overflow Flag\r | |
4960 | UINT32 IOPL:2; // I/O Privilege Level\r | |
4961 | UINT32 NT:1; // Nested Task\r | |
4962 | UINT32 Reserved_3:1; // Reserved\r | |
4963 | UINT32 RF:1; // Resume Flag\r | |
4964 | UINT32 VM:1; // Virtual 8086 Mode\r | |
4965 | UINT32 AC:1; // Alignment Check\r | |
4966 | UINT32 VIF:1; // Virtual Interrupt Flag\r | |
4967 | UINT32 VIP:1; // Virtual Interrupt Pending\r | |
4968 | UINT32 ID:1; // ID Flag\r | |
4969 | UINT32 Reserved_4:10; // Reserved\r | |
4970 | } Bits;\r | |
4971 | UINTN UintN;\r | |
4972 | } IA32_EFLAGS32;\r | |
4973 | \r | |
4974 | //\r | |
4975 | // Byte packed structure for Control Register 0 (CR0)\r | |
4976 | // 32-bits on IA-32\r | |
4977 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
4978 | //\r | |
4979 | typedef union {\r | |
4980 | struct {\r | |
4981 | UINT32 PE:1; // Protection Enable\r | |
4982 | UINT32 MP:1; // Monitor Coprocessor\r | |
4983 | UINT32 EM:1; // Emulation\r | |
4984 | UINT32 TS:1; // Task Switched\r | |
4985 | UINT32 ET:1; // Extension Type\r | |
4986 | UINT32 NE:1; // Numeric Error\r | |
4987 | UINT32 Reserved_0:10; // Reserved\r | |
4988 | UINT32 WP:1; // Write Protect\r | |
4989 | UINT32 Reserved_1:1; // Reserved\r | |
4990 | UINT32 AM:1; // Alignment Mask\r | |
4991 | UINT32 Reserved_2:10; // Reserved\r | |
4992 | UINT32 NW:1; // Mot Write-through\r | |
4993 | UINT32 CD:1; // Cache Disable\r | |
4994 | UINT32 PG:1; // Paging\r | |
4995 | } Bits;\r | |
4996 | UINTN UintN;\r | |
4997 | } IA32_CR0;\r | |
4998 | \r | |
4999 | //\r | |
5000 | // Byte packed structure for Control Register 4 (CR4)\r | |
5001 | // 32-bits on IA-32\r | |
5002 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
5003 | //\r | |
5004 | typedef union {\r | |
5005 | struct {\r | |
5006 | UINT32 VME:1; // Virtual-8086 Mode Extensions\r | |
5007 | UINT32 PVI:1; // Protected-Mode Virtual Interrupts\r | |
5008 | UINT32 TSD:1; // Time Stamp Disable\r | |
5009 | UINT32 DE:1; // Debugging Extensions\r | |
5010 | UINT32 PSE:1; // Page Size Extensions\r | |
5011 | UINT32 PAE:1; // Physical Address Extension\r | |
5012 | UINT32 MCE:1; // Machine Check Enable\r | |
5013 | UINT32 PGE:1; // Page Global Enable\r | |
5014 | UINT32 PCE:1; // Performance Monitoring Counter\r | |
5015 | // Enable\r | |
5016 | UINT32 OSFXSR:1; // Operating System Support for\r | |
5017 | // FXSAVE and FXRSTOR instructions\r | |
5018 | UINT32 OSXMMEXCPT:1; // Operating System Support for\r | |
5019 | // Unmasked SIMD Floating Point\r | |
5020 | // Exceptions\r | |
5021 | UINT32 Reserved_0:2; // Reserved\r | |
5022 | UINT32 VMXE:1; // VMX Enable\r | |
5023 | UINT32 Reserved_1:18; // Reseved\r | |
5024 | } Bits;\r | |
5025 | UINTN UintN;\r | |
5026 | } IA32_CR4;\r | |
5027 | \r | |
5028 | //\r | |
5029 | // Byte packed structure for an IDTR, GDTR, LDTR descriptor\r | |
5030 | /// @bug How to make this structure byte-packed in a compiler independent way?\r | |
5031 | //\r | |
5032 | #pragma pack (1)\r | |
5033 | typedef struct {\r | |
5034 | UINT16 Limit;\r | |
5035 | UINTN Base;\r | |
5036 | } IA32_DESCRIPTOR;\r | |
5037 | #pragma pack ()\r | |
5038 | \r | |
5039 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
5040 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
5041 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
5042 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
5043 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
5044 | \r | |
5045 | //\r | |
5046 | // Byte packed structure for an Interrupt Gate Descriptor\r | |
5047 | //\r | |
5048 | typedef union {\r | |
5049 | struct {\r | |
5050 | UINT32 OffsetLow:16; // Offset bits 15..0\r | |
5051 | UINT32 Selector:16; // Selector\r | |
5052 | UINT32 Reserved_0:8; // Reserved\r | |
5053 | UINT32 GateType:8; // Gate Type. See #defines above\r | |
5054 | UINT32 OffsetHigh:16; // Offset bits 31..16\r | |
5055 | } Bits;\r | |
5056 | UINT64 Uint64;\r | |
5057 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
5058 | \r | |
5059 | //\r | |
5060 | // Byte packed structure for an FP/SSE/SSE2 context\r | |
5061 | //\r | |
5062 | typedef struct {\r | |
5063 | UINT8 Buffer[512];\r | |
5064 | } IA32_FX_BUFFER;\r | |
5065 | \r | |
5066 | //\r | |
5067 | // Structures for the 16-bit real mode thunks\r | |
5068 | //\r | |
5069 | typedef struct {\r | |
5070 | UINT32 Reserved1;\r | |
5071 | UINT32 Reserved2;\r | |
5072 | UINT32 Reserved3;\r | |
5073 | UINT32 Reserved4;\r | |
5074 | UINT8 BL;\r | |
5075 | UINT8 BH;\r | |
5076 | UINT16 Reserved5;\r | |
5077 | UINT8 DL;\r | |
5078 | UINT8 DH;\r | |
5079 | UINT16 Reserved6;\r | |
5080 | UINT8 CL;\r | |
5081 | UINT8 CH;\r | |
5082 | UINT16 Reserved7;\r | |
5083 | UINT8 AL;\r | |
5084 | UINT8 AH;\r | |
5085 | UINT16 Reserved8;\r | |
5086 | } IA32_BYTE_REGS;\r | |
5087 | \r | |
5088 | typedef struct {\r | |
5089 | UINT16 DI;\r | |
5090 | UINT16 Reserved1;\r | |
5091 | UINT16 SI;\r | |
5092 | UINT16 Reserved2;\r | |
5093 | UINT16 BP;\r | |
5094 | UINT16 Reserved3;\r | |
5095 | UINT16 SP;\r | |
5096 | UINT16 Reserved4;\r | |
5097 | UINT16 BX;\r | |
5098 | UINT16 Reserved5;\r | |
5099 | UINT16 DX;\r | |
5100 | UINT16 Reserved6;\r | |
5101 | UINT16 CX;\r | |
5102 | UINT16 Reserved7;\r | |
5103 | UINT16 AX;\r | |
5104 | UINT16 Reserved8;\r | |
5105 | } IA32_WORD_REGS;\r | |
5106 | \r | |
5107 | typedef struct {\r | |
5108 | UINT32 EDI;\r | |
5109 | UINT32 ESI;\r | |
5110 | UINT32 EBP;\r | |
5111 | UINT32 ESP;\r | |
5112 | UINT32 EBX;\r | |
5113 | UINT32 EDX;\r | |
5114 | UINT32 ECX;\r | |
5115 | UINT32 EAX;\r | |
5116 | UINT16 DS;\r | |
5117 | UINT16 ES;\r | |
5118 | UINT16 FS;\r | |
5119 | UINT16 GS;\r | |
5120 | IA32_EFLAGS32 EFLAGS;\r | |
5121 | UINT32 Eip;\r | |
5122 | UINT16 CS;\r | |
5123 | UINT16 SS;\r | |
5124 | } IA32_DWORD_REGS;\r | |
5125 | \r | |
5126 | typedef union {\r | |
5127 | IA32_DWORD_REGS E;\r | |
5128 | IA32_WORD_REGS X;\r | |
5129 | IA32_BYTE_REGS H;\r | |
5130 | } IA32_REGISTER_SET;\r | |
5131 | \r | |
5132 | //\r | |
5133 | // Byte packed structure for an 16-bit real mode thunks\r | |
5134 | //\r | |
5135 | typedef struct {\r | |
5136 | IA32_REGISTER_SET *RealModeState;\r | |
5137 | VOID *RealModeBuffer;\r | |
5138 | UINT32 RealModeBufferSize;\r | |
5139 | UINT32 ThunkAttributes;\r | |
5140 | } THUNK_CONTEXT;\r | |
5141 | \r | |
5142 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r | |
5143 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
5144 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
5145 | \r | |
5146 | /**\r | |
5147 | Retrieves CPUID information.\r | |
5148 | \r | |
5149 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
5150 | This function always returns Index.\r | |
5151 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5152 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5153 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5154 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
5155 | This function is only available on IA-32 and X64.\r | |
5156 | \r | |
5157 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
5158 | instruction.\r | |
5159 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r | |
5160 | instruction. This is an optional parameter that may be NULL.\r | |
5161 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r | |
5162 | instruction. This is an optional parameter that may be NULL.\r | |
5163 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r | |
5164 | instruction. This is an optional parameter that may be NULL.\r | |
5165 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r | |
5166 | instruction. This is an optional parameter that may be NULL.\r | |
5167 | \r | |
5168 | @return Index\r | |
5169 | \r | |
5170 | **/\r | |
5171 | UINT32\r | |
5172 | EFIAPI\r | |
5173 | AsmCpuid (\r | |
5174 | IN UINT32 Index,\r | |
5175 | OUT UINT32 *Eax, OPTIONAL\r | |
5176 | OUT UINT32 *Ebx, OPTIONAL\r | |
5177 | OUT UINT32 *Ecx, OPTIONAL\r | |
5178 | OUT UINT32 *Edx OPTIONAL\r | |
5179 | );\r | |
5180 | \r | |
c7f33ca4 | 5181 | \r |
3eb9473e | 5182 | /**\r |
5183 | Retrieves CPUID information using an extended leaf identifier.\r | |
5184 | \r | |
5185 | Executes the CPUID instruction with EAX set to the value specified by Index\r | |
5186 | and ECX set to the value specified by SubIndex. This function always returns\r | |
5187 | Index. This function is only available on IA-32 and x64.\r | |
5188 | \r | |
5189 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5190 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5191 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5192 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
5193 | \r | |
5194 | @param Index The 32-bit value to load into EAX prior to invoking the\r | |
5195 | CPUID instruction.\r | |
5196 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r | |
5197 | CPUID instruction.\r | |
5198 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r | |
5199 | instruction. This is an optional parameter that may be\r | |
5200 | NULL.\r | |
5201 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r | |
5202 | instruction. This is an optional parameter that may be\r | |
5203 | NULL.\r | |
5204 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r | |
5205 | instruction. This is an optional parameter that may be\r | |
5206 | NULL.\r | |
5207 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r | |
5208 | instruction. This is an optional parameter that may be\r | |
5209 | NULL.\r | |
5210 | \r | |
5211 | @return Index\r | |
5212 | \r | |
5213 | **/\r | |
5214 | UINT32\r | |
5215 | EFIAPI\r | |
5216 | AsmCpuidEx (\r | |
5217 | IN UINT32 Index,\r | |
5218 | IN UINT32 SubIndex,\r | |
5219 | OUT UINT32 *Eax, OPTIONAL\r | |
5220 | OUT UINT32 *Ebx, OPTIONAL\r | |
5221 | OUT UINT32 *Ecx, OPTIONAL\r | |
5222 | OUT UINT32 *Edx OPTIONAL\r | |
5223 | );\r | |
5224 | \r | |
c7f33ca4 | 5225 | \r |
3eb9473e | 5226 | /**\r |
5227 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
5228 | \r | |
5229 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
5230 | No parameter checking is performed on Index, and some Index values may cause\r | |
5231 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
5232 | caller must set up exception handlers to catch the exceptions. This function\r | |
5233 | is only available on IA-32 and X64.\r | |
5234 | \r | |
5235 | @param Index The 32-bit MSR index to read.\r | |
5236 | \r | |
5237 | @return The lower 32 bits of the MSR identified by Index.\r | |
5238 | \r | |
5239 | **/\r | |
5240 | UINT32\r | |
5241 | EFIAPI\r | |
5242 | AsmReadMsr32 (\r | |
5243 | IN UINT32 Index\r | |
5244 | );\r | |
5245 | \r | |
c7f33ca4 | 5246 | \r |
3eb9473e | 5247 | /**\r |
5248 | Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).\r | |
5249 | \r | |
5250 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
5251 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
5252 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
5253 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
5254 | that Index and Value are valid, or the caller must establish proper exception\r | |
5255 | handlers. This function is only available on IA-32 and X64.\r | |
5256 | \r | |
5257 | @param Index The 32-bit MSR index to write.\r | |
5258 | @param Value The 32-bit value to write to the MSR.\r | |
5259 | \r | |
5260 | @return Value\r | |
5261 | \r | |
5262 | **/\r | |
5263 | UINT32\r | |
5264 | EFIAPI\r | |
5265 | AsmWriteMsr32 (\r | |
5266 | IN UINT32 Index,\r | |
5267 | IN UINT32 Value\r | |
5268 | );\r | |
5269 | \r | |
c7f33ca4 | 5270 | \r |
3eb9473e | 5271 | /**\r |
5272 | Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r | |
5273 | writes the result back to the 64-bit MSR.\r | |
5274 | \r | |
5275 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
5276 | between the lower 32-bits of the read result and the value specified by\r | |
5277 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
5278 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
5279 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
5280 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
5281 | must establish proper exception handlers. This function is only available on\r | |
5282 | IA-32 and X64.\r | |
5283 | \r | |
5284 | @param Index The 32-bit MSR index to write.\r | |
5285 | @param OrData The value to OR with the read value from the MSR.\r | |
5286 | \r | |
5287 | @return The lower 32-bit value written to the MSR.\r | |
5288 | \r | |
5289 | **/\r | |
5290 | UINT32\r | |
5291 | EFIAPI\r | |
5292 | AsmMsrOr32 (\r | |
5293 | IN UINT32 Index,\r | |
5294 | IN UINT32 OrData\r | |
5295 | );\r | |
5296 | \r | |
c7f33ca4 | 5297 | \r |
3eb9473e | 5298 | /**\r |
5299 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
5300 | the result back to the 64-bit MSR.\r | |
5301 | \r | |
5302 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5303 | lower 32-bits of the read result and the value specified by AndData, and\r | |
5304 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
5305 | the value written to the MSR is returned. No parameter checking is performed\r | |
5306 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
5307 | must either guarantee that Index and AndData are valid, or the caller must\r | |
5308 | establish proper exception handlers. This function is only available on IA-32\r | |
5309 | and X64.\r | |
5310 | \r | |
5311 | @param Index The 32-bit MSR index to write.\r | |
5312 | @param AndData The value to AND with the read value from the MSR.\r | |
5313 | \r | |
5314 | @return The lower 32-bit value written to the MSR.\r | |
5315 | \r | |
5316 | **/\r | |
5317 | UINT32\r | |
5318 | EFIAPI\r | |
5319 | AsmMsrAnd32 (\r | |
5320 | IN UINT32 Index,\r | |
5321 | IN UINT32 AndData\r | |
5322 | );\r | |
5323 | \r | |
c7f33ca4 | 5324 | \r |
3eb9473e | 5325 | /**\r |
5326 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r | |
5327 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r | |
5328 | \r | |
5329 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5330 | lower 32-bits of the read result and the value specified by AndData\r | |
5331 | preserving the upper 32-bits, performs a bitwise inclusive OR between the\r | |
5332 | result of the AND operation and the value specified by OrData, and writes the\r | |
5333 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
5334 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
5335 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
5336 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
5337 | caller must establish proper exception handlers. This function is only\r | |
5338 | available on IA-32 and X64.\r | |
5339 | \r | |
5340 | @param Index The 32-bit MSR index to write.\r | |
5341 | @param AndData The value to AND with the read value from the MSR.\r | |
5342 | @param OrData The value to OR with the result of the AND operation.\r | |
5343 | \r | |
5344 | @return The lower 32-bit value written to the MSR.\r | |
5345 | \r | |
5346 | **/\r | |
5347 | UINT32\r | |
5348 | EFIAPI\r | |
5349 | AsmMsrAndThenOr32 (\r | |
5350 | IN UINT32 Index,\r | |
5351 | IN UINT32 AndData,\r | |
5352 | IN UINT32 OrData\r | |
5353 | );\r | |
5354 | \r | |
c7f33ca4 | 5355 | \r |
3eb9473e | 5356 | /**\r |
5357 | Reads a bit field of an MSR.\r | |
5358 | \r | |
5359 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
5360 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
5361 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
5362 | must set up exception handlers to catch the exceptions. This function is only\r | |
5363 | available on IA-32 and X64.\r | |
5364 | \r | |
5365 | If StartBit is greater than 31, then ASSERT().\r | |
5366 | If EndBit is greater than 31, then ASSERT().\r | |
5367 | If EndBit is less than StartBit, then ASSERT().\r | |
5368 | \r | |
5369 | @param Index The 32-bit MSR index to read.\r | |
5370 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5371 | Range 0..31.\r | |
5372 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5373 | Range 0..31.\r | |
5374 | \r | |
5375 | @return The bit field read from the MSR.\r | |
5376 | \r | |
5377 | **/\r | |
5378 | UINT32\r | |
5379 | EFIAPI\r | |
5380 | AsmMsrBitFieldRead32 (\r | |
5381 | IN UINT32 Index,\r | |
5382 | IN UINTN StartBit,\r | |
5383 | IN UINTN EndBit\r | |
5384 | );\r | |
5385 | \r | |
c7f33ca4 | 5386 | \r |
3eb9473e | 5387 | /**\r |
5388 | Writes a bit field to an MSR.\r | |
5389 | \r | |
5390 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r | |
5391 | field is specified by the StartBit and the EndBit. All other bits in the\r | |
5392 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
5393 | returned. Extra left bits in Value are stripped. The caller must either\r | |
5394 | guarantee that Index and the data written is valid, or the caller must set up\r | |
5395 | exception handlers to catch the exceptions. This function is only available\r | |
5396 | on IA-32 and X64.\r | |
5397 | \r | |
5398 | If StartBit is greater than 31, then ASSERT().\r | |
5399 | If EndBit is greater than 31, then ASSERT().\r | |
5400 | If EndBit is less than StartBit, then ASSERT().\r | |
5401 | \r | |
5402 | @param Index The 32-bit MSR index to write.\r | |
5403 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5404 | Range 0..31.\r | |
5405 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5406 | Range 0..31.\r | |
5407 | @param Value New value of the bit field.\r | |
5408 | \r | |
5409 | @return The lower 32-bit of the value written to the MSR.\r | |
5410 | \r | |
5411 | **/\r | |
5412 | UINT32\r | |
5413 | EFIAPI\r | |
5414 | AsmMsrBitFieldWrite32 (\r | |
5415 | IN UINT32 Index,\r | |
5416 | IN UINTN StartBit,\r | |
5417 | IN UINTN EndBit,\r | |
5418 | IN UINT32 Value\r | |
5419 | );\r | |
5420 | \r | |
c7f33ca4 | 5421 | \r |
3eb9473e | 5422 | /**\r |
5423 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
5424 | result back to the bit field in the 64-bit MSR.\r | |
5425 | \r | |
5426 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
5427 | between the read result and the value specified by OrData, and writes the\r | |
5428 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
5429 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
5430 | caller must either guarantee that Index and the data written is valid, or\r | |
5431 | the caller must set up exception handlers to catch the exceptions. This\r | |
5432 | function is only available on IA-32 and X64.\r | |
5433 | \r | |
5434 | If StartBit is greater than 31, then ASSERT().\r | |
5435 | If EndBit is greater than 31, then ASSERT().\r | |
5436 | If EndBit is less than StartBit, then ASSERT().\r | |
5437 | \r | |
5438 | @param Index The 32-bit MSR index to write.\r | |
5439 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5440 | Range 0..31.\r | |
5441 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5442 | Range 0..31.\r | |
5443 | @param OrData The value to OR with the read value from the MSR.\r | |
5444 | \r | |
5445 | @return The lower 32-bit of the value written to the MSR.\r | |
5446 | \r | |
5447 | **/\r | |
5448 | UINT32\r | |
5449 | EFIAPI\r | |
5450 | AsmMsrBitFieldOr32 (\r | |
5451 | IN UINT32 Index,\r | |
5452 | IN UINTN StartBit,\r | |
5453 | IN UINTN EndBit,\r | |
5454 | IN UINT32 OrData\r | |
5455 | );\r | |
5456 | \r | |
c7f33ca4 | 5457 | \r |
3eb9473e | 5458 | /**\r |
5459 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5460 | result back to the bit field in the 64-bit MSR.\r | |
5461 | \r | |
5462 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5463 | read result and the value specified by AndData, and writes the result to the\r | |
5464 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
5465 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
5466 | either guarantee that Index and the data written is valid, or the caller must\r | |
5467 | set up exception handlers to catch the exceptions. This function is only\r | |
5468 | available on IA-32 and X64.\r | |
5469 | \r | |
5470 | If StartBit is greater than 31, then ASSERT().\r | |
5471 | If EndBit is greater than 31, then ASSERT().\r | |
5472 | If EndBit is less than StartBit, then ASSERT().\r | |
5473 | \r | |
5474 | @param Index The 32-bit MSR index to write.\r | |
5475 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5476 | Range 0..31.\r | |
5477 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5478 | Range 0..31.\r | |
5479 | @param AndData The value to AND with the read value from the MSR.\r | |
5480 | \r | |
5481 | @return The lower 32-bit of the value written to the MSR.\r | |
5482 | \r | |
5483 | **/\r | |
5484 | UINT32\r | |
5485 | EFIAPI\r | |
5486 | AsmMsrBitFieldAnd32 (\r | |
5487 | IN UINT32 Index,\r | |
5488 | IN UINTN StartBit,\r | |
5489 | IN UINTN EndBit,\r | |
5490 | IN UINT32 AndData\r | |
5491 | );\r | |
5492 | \r | |
c7f33ca4 | 5493 | \r |
3eb9473e | 5494 | /**\r |
5495 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
5496 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
5497 | 64-bit MSR.\r | |
5498 | \r | |
5499 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
5500 | bitwise inclusive OR between the read result and the value specified by\r | |
5501 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r | |
5502 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
5503 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
5504 | that Index and the data written is valid, or the caller must set up exception\r | |
5505 | handlers to catch the exceptions. This function is only available on IA-32\r | |
5506 | and X64.\r | |
5507 | \r | |
5508 | If StartBit is greater than 31, then ASSERT().\r | |
5509 | If EndBit is greater than 31, then ASSERT().\r | |
5510 | If EndBit is less than StartBit, then ASSERT().\r | |
5511 | \r | |
5512 | @param Index The 32-bit MSR index to write.\r | |
5513 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5514 | Range 0..31.\r | |
5515 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5516 | Range 0..31.\r | |
5517 | @param AndData The value to AND with the read value from the MSR.\r | |
5518 | @param OrData The value to OR with the result of the AND operation.\r | |
5519 | \r | |
5520 | @return The lower 32-bit of the value written to the MSR.\r | |
5521 | \r | |
5522 | **/\r | |
5523 | UINT32\r | |
5524 | EFIAPI\r | |
5525 | AsmMsrBitFieldAndThenOr32 (\r | |
5526 | IN UINT32 Index,\r | |
5527 | IN UINTN StartBit,\r | |
5528 | IN UINTN EndBit,\r | |
5529 | IN UINT32 AndData,\r | |
5530 | IN UINT32 OrData\r | |
5531 | );\r | |
5532 | \r | |
c7f33ca4 | 5533 | \r |
3eb9473e | 5534 | /**\r |
5535 | Returns a 64-bit Machine Specific Register(MSR).\r | |
5536 | \r | |
5537 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
5538 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
5539 | caller must either guarantee that Index is valid, or the caller must set up\r | |
5540 | exception handlers to catch the exceptions. This function is only available\r | |
5541 | on IA-32 and X64.\r | |
5542 | \r | |
5543 | @param Index The 32-bit MSR index to read.\r | |
5544 | \r | |
5545 | @return The value of the MSR identified by Index.\r | |
5546 | \r | |
5547 | **/\r | |
5548 | UINT64\r | |
5549 | EFIAPI\r | |
5550 | AsmReadMsr64 (\r | |
5551 | IN UINT32 Index\r | |
5552 | );\r | |
5553 | \r | |
c7f33ca4 | 5554 | \r |
3eb9473e | 5555 | /**\r |
5556 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
5557 | value.\r | |
5558 | \r | |
5559 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
5560 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
5561 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
5562 | caller must either guarantee that Index and Value are valid, or the caller\r | |
5563 | must establish proper exception handlers. This function is only available on\r | |
5564 | IA-32 and X64.\r | |
5565 | \r | |
5566 | @param Index The 32-bit MSR index to write.\r | |
5567 | @param Value The 64-bit value to write to the MSR.\r | |
5568 | \r | |
5569 | @return Value\r | |
5570 | \r | |
5571 | **/\r | |
5572 | UINT64\r | |
5573 | EFIAPI\r | |
5574 | AsmWriteMsr64 (\r | |
5575 | IN UINT32 Index,\r | |
5576 | IN UINT64 Value\r | |
5577 | );\r | |
5578 | \r | |
c7f33ca4 | 5579 | \r |
3eb9473e | 5580 | /**\r |
5581 | Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r | |
5582 | back to the 64-bit MSR.\r | |
5583 | \r | |
5584 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
5585 | between the read result and the value specified by OrData, and writes the\r | |
5586 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5587 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
5588 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
5589 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
5590 | This function is only available on IA-32 and X64.\r | |
5591 | \r | |
5592 | @param Index The 32-bit MSR index to write.\r | |
5593 | @param OrData The value to OR with the read value from the MSR.\r | |
5594 | \r | |
5595 | @return The value written back to the MSR.\r | |
5596 | \r | |
5597 | **/\r | |
5598 | UINT64\r | |
5599 | EFIAPI\r | |
5600 | AsmMsrOr64 (\r | |
5601 | IN UINT32 Index,\r | |
5602 | IN UINT64 OrData\r | |
5603 | );\r | |
5604 | \r | |
c7f33ca4 | 5605 | \r |
3eb9473e | 5606 | /**\r |
5607 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
5608 | 64-bit MSR.\r | |
5609 | \r | |
5610 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5611 | read result and the value specified by OrData, and writes the result to the\r | |
5612 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
5613 | parameter checking is performed on Index or OrData, and some of these may\r | |
5614 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
5615 | are valid, or the caller must establish proper exception handlers. This\r | |
5616 | function is only available on IA-32 and X64.\r | |
5617 | \r | |
5618 | @param Index The 32-bit MSR index to write.\r | |
5619 | @param AndData The value to AND with the read value from the MSR.\r | |
5620 | \r | |
5621 | @return The value written back to the MSR.\r | |
5622 | \r | |
5623 | **/\r | |
5624 | UINT64\r | |
5625 | EFIAPI\r | |
5626 | AsmMsrAnd64 (\r | |
5627 | IN UINT32 Index,\r | |
5628 | IN UINT64 AndData\r | |
5629 | );\r | |
5630 | \r | |
c7f33ca4 | 5631 | \r |
3eb9473e | 5632 | /**\r |
5633 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r | |
5634 | OR, and writes the result back to the 64-bit MSR.\r | |
5635 | \r | |
5636 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
5637 | result and the value specified by AndData, performs a bitwise inclusive OR\r | |
5638 | between the result of the AND operation and the value specified by OrData,\r | |
5639 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
5640 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
5641 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
5642 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
5643 | establish proper exception handlers. This function is only available on IA-32\r | |
5644 | and X64.\r | |
5645 | \r | |
5646 | @param Index The 32-bit MSR index to write.\r | |
5647 | @param AndData The value to AND with the read value from the MSR.\r | |
5648 | @param OrData The value to OR with the result of the AND operation.\r | |
5649 | \r | |
5650 | @return The value written back to the MSR.\r | |
5651 | \r | |
5652 | **/\r | |
5653 | UINT64\r | |
5654 | EFIAPI\r | |
5655 | AsmMsrAndThenOr64 (\r | |
5656 | IN UINT32 Index,\r | |
5657 | IN UINT64 AndData,\r | |
5658 | IN UINT64 OrData\r | |
5659 | );\r | |
5660 | \r | |
c7f33ca4 | 5661 | \r |
3eb9473e | 5662 | /**\r |
5663 | Reads a bit field of an MSR.\r | |
5664 | \r | |
5665 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
5666 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
5667 | must either guarantee that Index is valid, or the caller must set up\r | |
5668 | exception handlers to catch the exceptions. This function is only available\r | |
5669 | on IA-32 and X64.\r | |
5670 | \r | |
5671 | If StartBit is greater than 63, then ASSERT().\r | |
5672 | If EndBit is greater than 63, then ASSERT().\r | |
5673 | If EndBit is less than StartBit, then ASSERT().\r | |
5674 | \r | |
5675 | @param Index The 32-bit MSR index to read.\r | |
5676 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5677 | Range 0..63.\r | |
5678 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5679 | Range 0..63.\r | |
5680 | \r | |
5681 | @return The value read from the MSR.\r | |
5682 | \r | |
5683 | **/\r | |
5684 | UINT64\r | |
5685 | EFIAPI\r | |
5686 | AsmMsrBitFieldRead64 (\r | |
5687 | IN UINT32 Index,\r | |
5688 | IN UINTN StartBit,\r | |
5689 | IN UINTN EndBit\r | |
5690 | );\r | |
5691 | \r | |
c7f33ca4 | 5692 | \r |
3eb9473e | 5693 | /**\r |
5694 | Writes a bit field to an MSR.\r | |
5695 | \r | |
5696 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
5697 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
5698 | preserved. The MSR written is returned. Extra left bits in Value are\r | |
5699 | stripped. The caller must either guarantee that Index and the data written is\r | |
5700 | valid, or the caller must set up exception handlers to catch the exceptions.\r | |
5701 | This function is only available on IA-32 and X64.\r | |
5702 | \r | |
5703 | If StartBit is greater than 63, then ASSERT().\r | |
5704 | If EndBit is greater than 63, then ASSERT().\r | |
5705 | If EndBit is less than StartBit, then ASSERT().\r | |
5706 | \r | |
5707 | @param Index The 32-bit MSR index to write.\r | |
5708 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5709 | Range 0..63.\r | |
5710 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5711 | Range 0..63.\r | |
5712 | @param Value New value of the bit field.\r | |
5713 | \r | |
5714 | @return The value written back to the MSR.\r | |
5715 | \r | |
5716 | **/\r | |
5717 | UINT64\r | |
5718 | EFIAPI\r | |
5719 | AsmMsrBitFieldWrite64 (\r | |
5720 | IN UINT32 Index,\r | |
5721 | IN UINTN StartBit,\r | |
5722 | IN UINTN EndBit,\r | |
5723 | IN UINT64 Value\r | |
5724 | );\r | |
5725 | \r | |
c7f33ca4 | 5726 | \r |
3eb9473e | 5727 | /**\r |
5728 | Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r | |
5729 | writes the result back to the bit field in the 64-bit MSR.\r | |
5730 | \r | |
5731 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
5732 | between the read result and the value specified by OrData, and writes the\r | |
5733 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5734 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
5735 | guarantee that Index and the data written is valid, or the caller must set up\r | |
5736 | exception handlers to catch the exceptions. This function is only available\r | |
5737 | on IA-32 and X64.\r | |
5738 | \r | |
5739 | If StartBit is greater than 63, then ASSERT().\r | |
5740 | If EndBit is greater than 63, then ASSERT().\r | |
5741 | If EndBit is less than StartBit, then ASSERT().\r | |
5742 | \r | |
5743 | @param Index The 32-bit MSR index to write.\r | |
5744 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5745 | Range 0..63.\r | |
5746 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5747 | Range 0..63.\r | |
5748 | @param OrData The value to OR with the read value from the bit field.\r | |
5749 | \r | |
5750 | @return The value written back to the MSR.\r | |
5751 | \r | |
5752 | **/\r | |
5753 | UINT64\r | |
5754 | EFIAPI\r | |
5755 | AsmMsrBitFieldOr64 (\r | |
5756 | IN UINT32 Index,\r | |
5757 | IN UINTN StartBit,\r | |
5758 | IN UINTN EndBit,\r | |
5759 | IN UINT64 OrData\r | |
5760 | );\r | |
5761 | \r | |
c7f33ca4 | 5762 | \r |
3eb9473e | 5763 | /**\r |
5764 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5765 | result back to the bit field in the 64-bit MSR.\r | |
5766 | \r | |
5767 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5768 | read result and the value specified by AndData, and writes the result to the\r | |
5769 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
5770 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
5771 | that Index and the data written is valid, or the caller must set up exception\r | |
5772 | handlers to catch the exceptions. This function is only available on IA-32\r | |
5773 | and X64.\r | |
5774 | \r | |
5775 | If StartBit is greater than 63, then ASSERT().\r | |
5776 | If EndBit is greater than 63, then ASSERT().\r | |
5777 | If EndBit is less than StartBit, then ASSERT().\r | |
5778 | \r | |
5779 | @param Index The 32-bit MSR index to write.\r | |
5780 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5781 | Range 0..63.\r | |
5782 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5783 | Range 0..63.\r | |
5784 | @param AndData The value to AND with the read value from the bit field.\r | |
5785 | \r | |
5786 | @return The value written back to the MSR.\r | |
5787 | \r | |
5788 | **/\r | |
5789 | UINT64\r | |
5790 | EFIAPI\r | |
5791 | AsmMsrBitFieldAnd64 (\r | |
5792 | IN UINT32 Index,\r | |
5793 | IN UINTN StartBit,\r | |
5794 | IN UINTN EndBit,\r | |
5795 | IN UINT64 AndData\r | |
5796 | );\r | |
5797 | \r | |
c7f33ca4 | 5798 | \r |
3eb9473e | 5799 | /**\r |
5800 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
5801 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
5802 | 64-bit MSR.\r | |
5803 | \r | |
5804 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
5805 | a bitwise inclusive OR between the read result and the value specified by\r | |
5806 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r | |
5807 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
5808 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
5809 | written is valid, or the caller must set up exception handlers to catch the\r | |
5810 | exceptions. This function is only available on IA-32 and X64.\r | |
5811 | \r | |
5812 | If StartBit is greater than 63, then ASSERT().\r | |
5813 | If EndBit is greater than 63, then ASSERT().\r | |
5814 | If EndBit is less than StartBit, then ASSERT().\r | |
5815 | \r | |
5816 | @param Index The 32-bit MSR index to write.\r | |
5817 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5818 | Range 0..63.\r | |
5819 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5820 | Range 0..63.\r | |
5821 | @param AndData The value to AND with the read value from the bit field.\r | |
5822 | @param OrData The value to OR with the result of the AND operation.\r | |
5823 | \r | |
5824 | @return The value written back to the MSR.\r | |
5825 | \r | |
5826 | **/\r | |
5827 | UINT64\r | |
5828 | EFIAPI\r | |
5829 | AsmMsrBitFieldAndThenOr64 (\r | |
5830 | IN UINT32 Index,\r | |
5831 | IN UINTN StartBit,\r | |
5832 | IN UINTN EndBit,\r | |
5833 | IN UINT64 AndData,\r | |
5834 | IN UINT64 OrData\r | |
5835 | );\r | |
5836 | \r | |
c7f33ca4 | 5837 | \r |
3eb9473e | 5838 | /**\r |
5839 | Reads the current value of the EFLAGS register.\r | |
5840 | \r | |
5841 | Reads and returns the current value of the EFLAGS register. This function is\r | |
5842 | only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a\r | |
5843 | 64-bit value on X64.\r | |
5844 | \r | |
5845 | @return EFLAGS on IA-32 or RFLAGS on X64.\r | |
5846 | \r | |
5847 | **/\r | |
5848 | UINTN\r | |
5849 | EFIAPI\r | |
5850 | AsmReadEflags (\r | |
5851 | VOID\r | |
5852 | );\r | |
5853 | \r | |
c7f33ca4 | 5854 | \r |
3eb9473e | 5855 | /**\r |
5856 | Reads the current value of the Control Register 0 (CR0).\r | |
5857 | \r | |
5858 | Reads and returns the current value of CR0. This function is only available\r | |
5859 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
5860 | X64.\r | |
5861 | \r | |
5862 | @return The value of the Control Register 0 (CR0).\r | |
5863 | \r | |
5864 | **/\r | |
5865 | UINTN\r | |
5866 | EFIAPI\r | |
5867 | AsmReadCr0 (\r | |
5868 | VOID\r | |
5869 | );\r | |
5870 | \r | |
c7f33ca4 | 5871 | \r |
3eb9473e | 5872 | /**\r |
5873 | Reads the current value of the Control Register 2 (CR2).\r | |
5874 | \r | |
5875 | Reads and returns the current value of CR2. This function is only available\r | |
5876 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
5877 | X64.\r | |
5878 | \r | |
5879 | @return The value of the Control Register 2 (CR2).\r | |
5880 | \r | |
5881 | **/\r | |
5882 | UINTN\r | |
5883 | EFIAPI\r | |
5884 | AsmReadCr2 (\r | |
5885 | VOID\r | |
5886 | );\r | |
5887 | \r | |
c7f33ca4 | 5888 | \r |
3eb9473e | 5889 | /**\r |
5890 | Reads the current value of the Control Register 3 (CR3).\r | |
5891 | \r | |
5892 | Reads and returns the current value of CR3. This function is only available\r | |
5893 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
5894 | X64.\r | |
5895 | \r | |
5896 | @return The value of the Control Register 3 (CR3).\r | |
5897 | \r | |
5898 | **/\r | |
5899 | UINTN\r | |
5900 | EFIAPI\r | |
5901 | AsmReadCr3 (\r | |
5902 | VOID\r | |
5903 | );\r | |
5904 | \r | |
c7f33ca4 | 5905 | \r |
3eb9473e | 5906 | /**\r |
5907 | Reads the current value of the Control Register 4 (CR4).\r | |
5908 | \r | |
5909 | Reads and returns the current value of CR4. This function is only available\r | |
5910 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
5911 | X64.\r | |
5912 | \r | |
5913 | @return The value of the Control Register 4 (CR4).\r | |
5914 | \r | |
5915 | **/\r | |
5916 | UINTN\r | |
5917 | EFIAPI\r | |
5918 | AsmReadCr4 (\r | |
5919 | VOID\r | |
5920 | );\r | |
5921 | \r | |
c7f33ca4 | 5922 | \r |
3eb9473e | 5923 | /**\r |
5924 | Writes a value to Control Register 0 (CR0).\r | |
5925 | \r | |
5926 | Writes and returns a new value to CR0. This function is only available on\r | |
5927 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
5928 | \r | |
5929 | @param Cr0 The value to write to CR0.\r | |
5930 | \r | |
5931 | @return The value written to CR0.\r | |
5932 | \r | |
5933 | **/\r | |
5934 | UINTN\r | |
5935 | EFIAPI\r | |
5936 | AsmWriteCr0 (\r | |
5937 | UINTN Cr0\r | |
5938 | );\r | |
5939 | \r | |
c7f33ca4 | 5940 | \r |
3eb9473e | 5941 | /**\r |
5942 | Writes a value to Control Register 2 (CR2).\r | |
5943 | \r | |
5944 | Writes and returns a new value to CR2. This function is only available on\r | |
5945 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
5946 | \r | |
5947 | @param Cr2 The value to write to CR2.\r | |
5948 | \r | |
5949 | @return The value written to CR2.\r | |
5950 | \r | |
5951 | **/\r | |
5952 | UINTN\r | |
5953 | EFIAPI\r | |
5954 | AsmWriteCr2 (\r | |
5955 | UINTN Cr2\r | |
5956 | );\r | |
5957 | \r | |
c7f33ca4 | 5958 | \r |
3eb9473e | 5959 | /**\r |
5960 | Writes a value to Control Register 3 (CR3).\r | |
5961 | \r | |
5962 | Writes and returns a new value to CR3. This function is only available on\r | |
5963 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
5964 | \r | |
5965 | @param Cr3 The value to write to CR3.\r | |
5966 | \r | |
5967 | @return The value written to CR3.\r | |
5968 | \r | |
5969 | **/\r | |
5970 | UINTN\r | |
5971 | EFIAPI\r | |
5972 | AsmWriteCr3 (\r | |
5973 | UINTN Cr3\r | |
5974 | );\r | |
5975 | \r | |
c7f33ca4 | 5976 | \r |
3eb9473e | 5977 | /**\r |
5978 | Writes a value to Control Register 4 (CR4).\r | |
5979 | \r | |
5980 | Writes and returns a new value to CR4. This function is only available on\r | |
5981 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
5982 | \r | |
5983 | @param Cr4 The value to write to CR4.\r | |
5984 | \r | |
5985 | @return The value written to CR4.\r | |
5986 | \r | |
5987 | **/\r | |
5988 | UINTN\r | |
5989 | EFIAPI\r | |
5990 | AsmWriteCr4 (\r | |
5991 | UINTN Cr4\r | |
5992 | );\r | |
5993 | \r | |
c7f33ca4 | 5994 | \r |
3eb9473e | 5995 | /**\r |
5996 | Reads the current value of Debug Register 0 (DR0).\r | |
5997 | \r | |
5998 | Reads and returns the current value of DR0. This function is only available\r | |
5999 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6000 | X64.\r | |
6001 | \r | |
6002 | @return The value of Debug Register 0 (DR0).\r | |
6003 | \r | |
6004 | **/\r | |
6005 | UINTN\r | |
6006 | EFIAPI\r | |
6007 | AsmReadDr0 (\r | |
6008 | VOID\r | |
6009 | );\r | |
6010 | \r | |
c7f33ca4 | 6011 | \r |
3eb9473e | 6012 | /**\r |
6013 | Reads the current value of Debug Register 1 (DR1).\r | |
6014 | \r | |
6015 | Reads and returns the current value of DR1. This function is only available\r | |
6016 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6017 | X64.\r | |
6018 | \r | |
6019 | @return The value of Debug Register 1 (DR1).\r | |
6020 | \r | |
6021 | **/\r | |
6022 | UINTN\r | |
6023 | EFIAPI\r | |
6024 | AsmReadDr1 (\r | |
6025 | VOID\r | |
6026 | );\r | |
6027 | \r | |
c7f33ca4 | 6028 | \r |
3eb9473e | 6029 | /**\r |
6030 | Reads the current value of Debug Register 2 (DR2).\r | |
6031 | \r | |
6032 | Reads and returns the current value of DR2. This function is only available\r | |
6033 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6034 | X64.\r | |
6035 | \r | |
6036 | @return The value of Debug Register 2 (DR2).\r | |
6037 | \r | |
6038 | **/\r | |
6039 | UINTN\r | |
6040 | EFIAPI\r | |
6041 | AsmReadDr2 (\r | |
6042 | VOID\r | |
6043 | );\r | |
6044 | \r | |
c7f33ca4 | 6045 | \r |
3eb9473e | 6046 | /**\r |
6047 | Reads the current value of Debug Register 3 (DR3).\r | |
6048 | \r | |
6049 | Reads and returns the current value of DR3. This function is only available\r | |
6050 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6051 | X64.\r | |
6052 | \r | |
6053 | @return The value of Debug Register 3 (DR3).\r | |
6054 | \r | |
6055 | **/\r | |
6056 | UINTN\r | |
6057 | EFIAPI\r | |
6058 | AsmReadDr3 (\r | |
6059 | VOID\r | |
6060 | );\r | |
6061 | \r | |
c7f33ca4 | 6062 | \r |
3eb9473e | 6063 | /**\r |
6064 | Reads the current value of Debug Register 4 (DR4).\r | |
6065 | \r | |
6066 | Reads and returns the current value of DR4. This function is only available\r | |
6067 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6068 | X64.\r | |
6069 | \r | |
6070 | @return The value of Debug Register 4 (DR4).\r | |
6071 | \r | |
6072 | **/\r | |
6073 | UINTN\r | |
6074 | EFIAPI\r | |
6075 | AsmReadDr4 (\r | |
6076 | VOID\r | |
6077 | );\r | |
6078 | \r | |
c7f33ca4 | 6079 | \r |
3eb9473e | 6080 | /**\r |
6081 | Reads the current value of Debug Register 5 (DR5).\r | |
6082 | \r | |
6083 | Reads and returns the current value of DR5. This function is only available\r | |
6084 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6085 | X64.\r | |
6086 | \r | |
6087 | @return The value of Debug Register 5 (DR5).\r | |
6088 | \r | |
6089 | **/\r | |
6090 | UINTN\r | |
6091 | EFIAPI\r | |
6092 | AsmReadDr5 (\r | |
6093 | VOID\r | |
6094 | );\r | |
6095 | \r | |
c7f33ca4 | 6096 | \r |
3eb9473e | 6097 | /**\r |
6098 | Reads the current value of Debug Register 6 (DR6).\r | |
6099 | \r | |
6100 | Reads and returns the current value of DR6. This function is only available\r | |
6101 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6102 | X64.\r | |
6103 | \r | |
6104 | @return The value of Debug Register 6 (DR6).\r | |
6105 | \r | |
6106 | **/\r | |
6107 | UINTN\r | |
6108 | EFIAPI\r | |
6109 | AsmReadDr6 (\r | |
6110 | VOID\r | |
6111 | );\r | |
6112 | \r | |
c7f33ca4 | 6113 | \r |
3eb9473e | 6114 | /**\r |
6115 | Reads the current value of Debug Register 7 (DR7).\r | |
6116 | \r | |
6117 | Reads and returns the current value of DR7. This function is only available\r | |
6118 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6119 | X64.\r | |
6120 | \r | |
6121 | @return The value of Debug Register 7 (DR7).\r | |
6122 | \r | |
6123 | **/\r | |
6124 | UINTN\r | |
6125 | EFIAPI\r | |
6126 | AsmReadDr7 (\r | |
6127 | VOID\r | |
6128 | );\r | |
6129 | \r | |
c7f33ca4 | 6130 | \r |
3eb9473e | 6131 | /**\r |
6132 | Writes a value to Debug Register 0 (DR0).\r | |
6133 | \r | |
6134 | Writes and returns a new value to DR0. This function is only available on\r | |
6135 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6136 | \r | |
6137 | @param Dr0 The value to write to Dr0.\r | |
6138 | \r | |
6139 | @return The value written to Debug Register 0 (DR0).\r | |
6140 | \r | |
6141 | **/\r | |
6142 | UINTN\r | |
6143 | EFIAPI\r | |
6144 | AsmWriteDr0 (\r | |
6145 | UINTN Dr0\r | |
6146 | );\r | |
6147 | \r | |
c7f33ca4 | 6148 | \r |
3eb9473e | 6149 | /**\r |
6150 | Writes a value to Debug Register 1 (DR1).\r | |
6151 | \r | |
6152 | Writes and returns a new value to DR1. This function is only available on\r | |
6153 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6154 | \r | |
6155 | @param Dr1 The value to write to Dr1.\r | |
6156 | \r | |
6157 | @return The value written to Debug Register 1 (DR1).\r | |
6158 | \r | |
6159 | **/\r | |
6160 | UINTN\r | |
6161 | EFIAPI\r | |
6162 | AsmWriteDr1 (\r | |
6163 | UINTN Dr1\r | |
6164 | );\r | |
6165 | \r | |
c7f33ca4 | 6166 | \r |
3eb9473e | 6167 | /**\r |
6168 | Writes a value to Debug Register 2 (DR2).\r | |
6169 | \r | |
6170 | Writes and returns a new value to DR2. This function is only available on\r | |
6171 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6172 | \r | |
6173 | @param Dr2 The value to write to Dr2.\r | |
6174 | \r | |
6175 | @return The value written to Debug Register 2 (DR2).\r | |
6176 | \r | |
6177 | **/\r | |
6178 | UINTN\r | |
6179 | EFIAPI\r | |
6180 | AsmWriteDr2 (\r | |
6181 | UINTN Dr2\r | |
6182 | );\r | |
6183 | \r | |
c7f33ca4 | 6184 | \r |
3eb9473e | 6185 | /**\r |
6186 | Writes a value to Debug Register 3 (DR3).\r | |
6187 | \r | |
6188 | Writes and returns a new value to DR3. This function is only available on\r | |
6189 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6190 | \r | |
6191 | @param Dr3 The value to write to Dr3.\r | |
6192 | \r | |
6193 | @return The value written to Debug Register 3 (DR3).\r | |
6194 | \r | |
6195 | **/\r | |
6196 | UINTN\r | |
6197 | EFIAPI\r | |
6198 | AsmWriteDr3 (\r | |
6199 | UINTN Dr3\r | |
6200 | );\r | |
6201 | \r | |
c7f33ca4 | 6202 | \r |
3eb9473e | 6203 | /**\r |
6204 | Writes a value to Debug Register 4 (DR4).\r | |
6205 | \r | |
6206 | Writes and returns a new value to DR4. This function is only available on\r | |
6207 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6208 | \r | |
6209 | @param Dr4 The value to write to Dr4.\r | |
6210 | \r | |
6211 | @return The value written to Debug Register 4 (DR4).\r | |
6212 | \r | |
6213 | **/\r | |
6214 | UINTN\r | |
6215 | EFIAPI\r | |
6216 | AsmWriteDr4 (\r | |
6217 | UINTN Dr4\r | |
6218 | );\r | |
6219 | \r | |
c7f33ca4 | 6220 | \r |
3eb9473e | 6221 | /**\r |
6222 | Writes a value to Debug Register 5 (DR5).\r | |
6223 | \r | |
6224 | Writes and returns a new value to DR5. This function is only available on\r | |
6225 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6226 | \r | |
6227 | @param Dr5 The value to write to Dr5.\r | |
6228 | \r | |
6229 | @return The value written to Debug Register 5 (DR5).\r | |
6230 | \r | |
6231 | **/\r | |
6232 | UINTN\r | |
6233 | EFIAPI\r | |
6234 | AsmWriteDr5 (\r | |
6235 | UINTN Dr5\r | |
6236 | );\r | |
6237 | \r | |
c7f33ca4 | 6238 | \r |
3eb9473e | 6239 | /**\r |
6240 | Writes a value to Debug Register 6 (DR6).\r | |
6241 | \r | |
6242 | Writes and returns a new value to DR6. This function is only available on\r | |
6243 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6244 | \r | |
6245 | @param Dr6 The value to write to Dr6.\r | |
6246 | \r | |
6247 | @return The value written to Debug Register 6 (DR6).\r | |
6248 | \r | |
6249 | **/\r | |
6250 | UINTN\r | |
6251 | EFIAPI\r | |
6252 | AsmWriteDr6 (\r | |
6253 | UINTN Dr6\r | |
6254 | );\r | |
6255 | \r | |
c7f33ca4 | 6256 | \r |
3eb9473e | 6257 | /**\r |
6258 | Writes a value to Debug Register 7 (DR7).\r | |
6259 | \r | |
6260 | Writes and returns a new value to DR7. This function is only available on\r | |
6261 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6262 | \r | |
6263 | @param Dr7 The value to write to Dr7.\r | |
6264 | \r | |
6265 | @return The value written to Debug Register 7 (DR7).\r | |
6266 | \r | |
6267 | **/\r | |
6268 | UINTN\r | |
6269 | EFIAPI\r | |
6270 | AsmWriteDr7 (\r | |
6271 | UINTN Dr7\r | |
6272 | );\r | |
6273 | \r | |
c7f33ca4 | 6274 | \r |
3eb9473e | 6275 | /**\r |
6276 | Reads the current value of Code Segment Register (CS).\r | |
6277 | \r | |
6278 | Reads and returns the current value of CS. This function is only available on\r | |
6279 | IA-32 and X64.\r | |
6280 | \r | |
6281 | @return The current value of CS.\r | |
6282 | \r | |
6283 | **/\r | |
6284 | UINT16\r | |
6285 | EFIAPI\r | |
6286 | AsmReadCs (\r | |
6287 | VOID\r | |
6288 | );\r | |
6289 | \r | |
c7f33ca4 | 6290 | \r |
3eb9473e | 6291 | /**\r |
6292 | Reads the current value of Data Segment Register (DS).\r | |
6293 | \r | |
6294 | Reads and returns the current value of DS. This function is only available on\r | |
6295 | IA-32 and X64.\r | |
6296 | \r | |
6297 | @return The current value of DS.\r | |
6298 | \r | |
6299 | **/\r | |
6300 | UINT16\r | |
6301 | EFIAPI\r | |
6302 | AsmReadDs (\r | |
6303 | VOID\r | |
6304 | );\r | |
6305 | \r | |
c7f33ca4 | 6306 | \r |
3eb9473e | 6307 | /**\r |
6308 | Reads the current value of Extra Segment Register (ES).\r | |
6309 | \r | |
6310 | Reads and returns the current value of ES. This function is only available on\r | |
6311 | IA-32 and X64.\r | |
6312 | \r | |
6313 | @return The current value of ES.\r | |
6314 | \r | |
6315 | **/\r | |
6316 | UINT16\r | |
6317 | EFIAPI\r | |
6318 | AsmReadEs (\r | |
6319 | VOID\r | |
6320 | );\r | |
6321 | \r | |
c7f33ca4 | 6322 | \r |
3eb9473e | 6323 | /**\r |
6324 | Reads the current value of FS Data Segment Register (FS).\r | |
6325 | \r | |
6326 | Reads and returns the current value of FS. This function is only available on\r | |
6327 | IA-32 and X64.\r | |
6328 | \r | |
6329 | @return The current value of FS.\r | |
6330 | \r | |
6331 | **/\r | |
6332 | UINT16\r | |
6333 | EFIAPI\r | |
6334 | AsmReadFs (\r | |
6335 | VOID\r | |
6336 | );\r | |
6337 | \r | |
c7f33ca4 | 6338 | \r |
3eb9473e | 6339 | /**\r |
6340 | Reads the current value of GS Data Segment Register (GS).\r | |
6341 | \r | |
6342 | Reads and returns the current value of GS. This function is only available on\r | |
6343 | IA-32 and X64.\r | |
6344 | \r | |
6345 | @return The current value of GS.\r | |
6346 | \r | |
6347 | **/\r | |
6348 | UINT16\r | |
6349 | EFIAPI\r | |
6350 | AsmReadGs (\r | |
6351 | VOID\r | |
6352 | );\r | |
6353 | \r | |
c7f33ca4 | 6354 | \r |
3eb9473e | 6355 | /**\r |
6356 | Reads the current value of Stack Segment Register (SS).\r | |
6357 | \r | |
6358 | Reads and returns the current value of SS. This function is only available on\r | |
6359 | IA-32 and X64.\r | |
6360 | \r | |
6361 | @return The current value of SS.\r | |
6362 | \r | |
6363 | **/\r | |
6364 | UINT16\r | |
6365 | EFIAPI\r | |
6366 | AsmReadSs (\r | |
6367 | VOID\r | |
6368 | );\r | |
6369 | \r | |
c7f33ca4 | 6370 | \r |
3eb9473e | 6371 | /**\r |
6372 | Reads the current value of Task Register (TR).\r | |
6373 | \r | |
6374 | Reads and returns the current value of TR. This function is only available on\r | |
6375 | IA-32 and X64.\r | |
6376 | \r | |
6377 | @return The current value of TR.\r | |
6378 | \r | |
6379 | **/\r | |
6380 | UINT16\r | |
6381 | EFIAPI\r | |
6382 | AsmReadTr (\r | |
6383 | VOID\r | |
6384 | );\r | |
6385 | \r | |
c7f33ca4 | 6386 | \r |
3eb9473e | 6387 | /**\r |
6388 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
6389 | \r | |
6390 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
6391 | function is only available on IA-32 and X64.\r | |
6392 | \r | |
6393 | If Gdtr is NULL, then ASSERT().\r | |
6394 | \r | |
6395 | @param Gdtr Pointer to a GDTR descriptor.\r | |
6396 | \r | |
6397 | **/\r | |
6398 | VOID\r | |
6399 | EFIAPI\r | |
6400 | AsmReadGdtr (\r | |
6401 | OUT IA32_DESCRIPTOR *Gdtr\r | |
6402 | );\r | |
6403 | \r | |
c7f33ca4 | 6404 | \r |
3eb9473e | 6405 | /**\r |
6406 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
6407 | \r | |
6408 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
6409 | only available on IA-32 and X64.\r | |
6410 | \r | |
6411 | If Gdtr is NULL, then ASSERT().\r | |
6412 | \r | |
6413 | @param Gdtr Pointer to a GDTR descriptor.\r | |
6414 | \r | |
6415 | **/\r | |
6416 | VOID\r | |
6417 | EFIAPI\r | |
6418 | AsmWriteGdtr (\r | |
6419 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
6420 | );\r | |
6421 | \r | |
c7f33ca4 | 6422 | \r |
3eb9473e | 6423 | /**\r |
6424 | Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r | |
6425 | \r | |
6426 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
6427 | function is only available on IA-32 and X64.\r | |
6428 | \r | |
6429 | If Idtr is NULL, then ASSERT().\r | |
6430 | \r | |
6431 | @param Idtr Pointer to a IDTR descriptor.\r | |
6432 | \r | |
6433 | **/\r | |
6434 | VOID\r | |
6435 | EFIAPI\r | |
6436 | AsmReadIdtr (\r | |
6437 | OUT IA32_DESCRIPTOR *Idtr\r | |
6438 | );\r | |
6439 | \r | |
c7f33ca4 | 6440 | \r |
3eb9473e | 6441 | /**\r |
6442 | Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r | |
6443 | \r | |
6444 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
6445 | only available on IA-32 and X64.\r | |
6446 | \r | |
6447 | If Idtr is NULL, then ASSERT().\r | |
6448 | \r | |
6449 | @param Idtr Pointer to a IDTR descriptor.\r | |
6450 | \r | |
6451 | **/\r | |
6452 | VOID\r | |
6453 | EFIAPI\r | |
6454 | AsmWriteIdtr (\r | |
6455 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
6456 | );\r | |
6457 | \r | |
c7f33ca4 | 6458 | \r |
3eb9473e | 6459 | /**\r |
6460 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
6461 | \r | |
6462 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
6463 | only available on IA-32 and X64.\r | |
6464 | \r | |
6465 | @return The current selector of LDT.\r | |
6466 | \r | |
6467 | **/\r | |
6468 | UINT16\r | |
6469 | EFIAPI\r | |
6470 | AsmReadLdtr (\r | |
6471 | VOID\r | |
6472 | );\r | |
6473 | \r | |
c7f33ca4 | 6474 | \r |
3eb9473e | 6475 | /**\r |
6476 | Writes the current Local Descriptor Table Register (GDTR) selector.\r | |
6477 | \r | |
6478 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
6479 | only available on IA-32 and X64.\r | |
6480 | \r | |
6481 | @param Ldtr 16-bit LDTR selector value.\r | |
6482 | \r | |
6483 | **/\r | |
6484 | VOID\r | |
6485 | EFIAPI\r | |
6486 | AsmWriteLdtr (\r | |
6487 | IN UINT16 Ldtr\r | |
6488 | );\r | |
6489 | \r | |
c7f33ca4 | 6490 | \r |
3eb9473e | 6491 | /**\r |
6492 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
6493 | \r | |
6494 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
6495 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
6496 | available on IA-32 and X64.\r | |
6497 | \r | |
6498 | If Buffer is NULL, then ASSERT().\r | |
6499 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6500 | \r | |
6501 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
6502 | \r | |
6503 | **/\r | |
6504 | VOID\r | |
6505 | EFIAPI\r | |
6506 | AsmFxSave (\r | |
6507 | OUT IA32_FX_BUFFER *Buffer\r | |
6508 | );\r | |
6509 | \r | |
c7f33ca4 | 6510 | \r |
3eb9473e | 6511 | /**\r |
6512 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
6513 | \r | |
6514 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
6515 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
6516 | only available on IA-32 and X64.\r | |
6517 | \r | |
6518 | If Buffer is NULL, then ASSERT().\r | |
6519 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6520 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
6521 | \r | |
6522 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
6523 | \r | |
6524 | **/\r | |
6525 | VOID\r | |
6526 | EFIAPI\r | |
6527 | AsmFxRestore (\r | |
6528 | IN CONST IA32_FX_BUFFER *Buffer\r | |
6529 | );\r | |
6530 | \r | |
c7f33ca4 | 6531 | \r |
3eb9473e | 6532 | /**\r |
6533 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
6534 | \r | |
6535 | Reads and returns the current value of MM0. This function is only available\r | |
6536 | on IA-32 and X64.\r | |
6537 | \r | |
6538 | @return The current value of MM0.\r | |
6539 | \r | |
6540 | **/\r | |
6541 | UINT64\r | |
6542 | EFIAPI\r | |
6543 | AsmReadMm0 (\r | |
6544 | VOID\r | |
6545 | );\r | |
6546 | \r | |
c7f33ca4 | 6547 | \r |
3eb9473e | 6548 | /**\r |
6549 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
6550 | \r | |
6551 | Reads and returns the current value of MM1. This function is only available\r | |
6552 | on IA-32 and X64.\r | |
6553 | \r | |
6554 | @return The current value of MM1.\r | |
6555 | \r | |
6556 | **/\r | |
6557 | UINT64\r | |
6558 | EFIAPI\r | |
6559 | AsmReadMm1 (\r | |
6560 | VOID\r | |
6561 | );\r | |
6562 | \r | |
c7f33ca4 | 6563 | \r |
3eb9473e | 6564 | /**\r |
6565 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
6566 | \r | |
6567 | Reads and returns the current value of MM2. This function is only available\r | |
6568 | on IA-32 and X64.\r | |
6569 | \r | |
6570 | @return The current value of MM2.\r | |
6571 | \r | |
6572 | **/\r | |
6573 | UINT64\r | |
6574 | EFIAPI\r | |
6575 | AsmReadMm2 (\r | |
6576 | VOID\r | |
6577 | );\r | |
6578 | \r | |
c7f33ca4 | 6579 | \r |
3eb9473e | 6580 | /**\r |
6581 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
6582 | \r | |
6583 | Reads and returns the current value of MM3. This function is only available\r | |
6584 | on IA-32 and X64.\r | |
6585 | \r | |
6586 | @return The current value of MM3.\r | |
6587 | \r | |
6588 | **/\r | |
6589 | UINT64\r | |
6590 | EFIAPI\r | |
6591 | AsmReadMm3 (\r | |
6592 | VOID\r | |
6593 | );\r | |
6594 | \r | |
c7f33ca4 | 6595 | \r |
3eb9473e | 6596 | /**\r |
6597 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
6598 | \r | |
6599 | Reads and returns the current value of MM4. This function is only available\r | |
6600 | on IA-32 and X64.\r | |
6601 | \r | |
6602 | @return The current value of MM4.\r | |
6603 | \r | |
6604 | **/\r | |
6605 | UINT64\r | |
6606 | EFIAPI\r | |
6607 | AsmReadMm4 (\r | |
6608 | VOID\r | |
6609 | );\r | |
6610 | \r | |
c7f33ca4 | 6611 | \r |
3eb9473e | 6612 | /**\r |
6613 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
6614 | \r | |
6615 | Reads and returns the current value of MM5. This function is only available\r | |
6616 | on IA-32 and X64.\r | |
6617 | \r | |
6618 | @return The current value of MM5.\r | |
6619 | \r | |
6620 | **/\r | |
6621 | UINT64\r | |
6622 | EFIAPI\r | |
6623 | AsmReadMm5 (\r | |
6624 | VOID\r | |
6625 | );\r | |
6626 | \r | |
c7f33ca4 | 6627 | \r |
3eb9473e | 6628 | /**\r |
6629 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
6630 | \r | |
6631 | Reads and returns the current value of MM6. This function is only available\r | |
6632 | on IA-32 and X64.\r | |
6633 | \r | |
6634 | @return The current value of MM6.\r | |
6635 | \r | |
6636 | **/\r | |
6637 | UINT64\r | |
6638 | EFIAPI\r | |
6639 | AsmReadMm6 (\r | |
6640 | VOID\r | |
6641 | );\r | |
6642 | \r | |
c7f33ca4 | 6643 | \r |
3eb9473e | 6644 | /**\r |
6645 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
6646 | \r | |
6647 | Reads and returns the current value of MM7. This function is only available\r | |
6648 | on IA-32 and X64.\r | |
6649 | \r | |
6650 | @return The current value of MM7.\r | |
6651 | \r | |
6652 | **/\r | |
6653 | UINT64\r | |
6654 | EFIAPI\r | |
6655 | AsmReadMm7 (\r | |
6656 | VOID\r | |
6657 | );\r | |
6658 | \r | |
c7f33ca4 | 6659 | \r |
3eb9473e | 6660 | /**\r |
6661 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
6662 | \r | |
6663 | Writes the current value of MM0. This function is only available on IA32 and\r | |
6664 | X64.\r | |
6665 | \r | |
6666 | @param Value The 64-bit value to write to MM0.\r | |
6667 | \r | |
6668 | **/\r | |
6669 | VOID\r | |
6670 | EFIAPI\r | |
6671 | AsmWriteMm0 (\r | |
6672 | IN UINT64 Value\r | |
6673 | );\r | |
6674 | \r | |
c7f33ca4 | 6675 | \r |
3eb9473e | 6676 | /**\r |
6677 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
6678 | \r | |
6679 | Writes the current value of MM1. This function is only available on IA32 and\r | |
6680 | X64.\r | |
6681 | \r | |
6682 | @param Value The 64-bit value to write to MM1.\r | |
6683 | \r | |
6684 | **/\r | |
6685 | VOID\r | |
6686 | EFIAPI\r | |
6687 | AsmWriteMm1 (\r | |
6688 | IN UINT64 Value\r | |
6689 | );\r | |
6690 | \r | |
c7f33ca4 | 6691 | \r |
3eb9473e | 6692 | /**\r |
6693 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
6694 | \r | |
6695 | Writes the current value of MM2. This function is only available on IA32 and\r | |
6696 | X64.\r | |
6697 | \r | |
6698 | @param Value The 64-bit value to write to MM2.\r | |
6699 | \r | |
6700 | **/\r | |
6701 | VOID\r | |
6702 | EFIAPI\r | |
6703 | AsmWriteMm2 (\r | |
6704 | IN UINT64 Value\r | |
6705 | );\r | |
6706 | \r | |
c7f33ca4 | 6707 | \r |
3eb9473e | 6708 | /**\r |
6709 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
6710 | \r | |
6711 | Writes the current value of MM3. This function is only available on IA32 and\r | |
6712 | X64.\r | |
6713 | \r | |
6714 | @param Value The 64-bit value to write to MM3.\r | |
6715 | \r | |
6716 | **/\r | |
6717 | VOID\r | |
6718 | EFIAPI\r | |
6719 | AsmWriteMm3 (\r | |
6720 | IN UINT64 Value\r | |
6721 | );\r | |
6722 | \r | |
c7f33ca4 | 6723 | \r |
3eb9473e | 6724 | /**\r |
6725 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
6726 | \r | |
6727 | Writes the current value of MM4. This function is only available on IA32 and\r | |
6728 | X64.\r | |
6729 | \r | |
6730 | @param Value The 64-bit value to write to MM4.\r | |
6731 | \r | |
6732 | **/\r | |
6733 | VOID\r | |
6734 | EFIAPI\r | |
6735 | AsmWriteMm4 (\r | |
6736 | IN UINT64 Value\r | |
6737 | );\r | |
6738 | \r | |
c7f33ca4 | 6739 | \r |
3eb9473e | 6740 | /**\r |
6741 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
6742 | \r | |
6743 | Writes the current value of MM5. This function is only available on IA32 and\r | |
6744 | X64.\r | |
6745 | \r | |
6746 | @param Value The 64-bit value to write to MM5.\r | |
6747 | \r | |
6748 | **/\r | |
6749 | VOID\r | |
6750 | EFIAPI\r | |
6751 | AsmWriteMm5 (\r | |
6752 | IN UINT64 Value\r | |
6753 | );\r | |
6754 | \r | |
c7f33ca4 | 6755 | \r |
3eb9473e | 6756 | /**\r |
6757 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
6758 | \r | |
6759 | Writes the current value of MM6. This function is only available on IA32 and\r | |
6760 | X64.\r | |
6761 | \r | |
6762 | @param Value The 64-bit value to write to MM6.\r | |
6763 | \r | |
6764 | **/\r | |
6765 | VOID\r | |
6766 | EFIAPI\r | |
6767 | AsmWriteMm6 (\r | |
6768 | IN UINT64 Value\r | |
6769 | );\r | |
6770 | \r | |
c7f33ca4 | 6771 | \r |
3eb9473e | 6772 | /**\r |
6773 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
6774 | \r | |
6775 | Writes the current value of MM7. This function is only available on IA32 and\r | |
6776 | X64.\r | |
6777 | \r | |
6778 | @param Value The 64-bit value to write to MM7.\r | |
6779 | \r | |
6780 | **/\r | |
6781 | VOID\r | |
6782 | EFIAPI\r | |
6783 | AsmWriteMm7 (\r | |
6784 | IN UINT64 Value\r | |
6785 | );\r | |
6786 | \r | |
c7f33ca4 | 6787 | \r |
3eb9473e | 6788 | /**\r |
6789 | Reads the current value of Time Stamp Counter (TSC).\r | |
6790 | \r | |
6791 | Reads and returns the current value of TSC. This function is only available\r | |
6792 | on IA-32 and X64.\r | |
6793 | \r | |
6794 | @return The current value of TSC\r | |
6795 | \r | |
6796 | **/\r | |
6797 | UINT64\r | |
6798 | EFIAPI\r | |
6799 | AsmReadTsc (\r | |
6800 | VOID\r | |
6801 | );\r | |
6802 | \r | |
c7f33ca4 | 6803 | \r |
3eb9473e | 6804 | /**\r |
6805 | Reads the current value of a Performance Counter (PMC).\r | |
6806 | \r | |
6807 | Reads and returns the current value of performance counter specified by\r | |
6808 | Index. This function is only available on IA-32 and X64.\r | |
6809 | \r | |
6810 | @param Index The 32-bit Performance Counter index to read.\r | |
6811 | \r | |
6812 | @return The value of the PMC specified by Index.\r | |
6813 | \r | |
6814 | **/\r | |
6815 | UINT64\r | |
6816 | EFIAPI\r | |
6817 | AsmReadPmc (\r | |
6818 | IN UINT32 Index\r | |
6819 | );\r | |
6820 | \r | |
c7f33ca4 | 6821 | \r |
3eb9473e | 6822 | /**\r |
6823 | Sets up a monitor buffer that is used by AsmMwait().\r | |
6824 | \r | |
6825 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
6826 | and Edx. Returns Eax. This function is only available on IA-32 and X64.\r | |
6827 | \r | |
6828 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6829 | instruction.\r | |
6830 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6831 | instruction.\r | |
6832 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
6833 | instruction.\r | |
6834 | \r | |
6835 | @return Eax\r | |
6836 | \r | |
6837 | **/\r | |
6838 | UINTN\r | |
6839 | EFIAPI\r | |
6840 | AsmMonitor (\r | |
6841 | IN UINTN Eax,\r | |
6842 | IN UINTN Ecx,\r | |
6843 | IN UINTN Edx\r | |
6844 | );\r | |
6845 | \r | |
c7f33ca4 | 6846 | \r |
3eb9473e | 6847 | /**\r |
6848 | Executes an MWAIT instruction.\r | |
6849 | \r | |
6850 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
6851 | Ecx. Returns Eax. This function is only available on IA-32 and X64.\r | |
6852 | \r | |
6853 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6854 | instruction.\r | |
6855 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6856 | instruction.\r | |
6857 | \r | |
6858 | @return Eax\r | |
6859 | \r | |
6860 | **/\r | |
6861 | UINTN\r | |
6862 | EFIAPI\r | |
6863 | AsmMwait (\r | |
6864 | IN UINTN Eax,\r | |
6865 | IN UINTN Ecx\r | |
6866 | );\r | |
6867 | \r | |
c7f33ca4 | 6868 | \r |
3eb9473e | 6869 | /**\r |
6870 | Executes a WBINVD instruction.\r | |
6871 | \r | |
6872 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
6873 | X64.\r | |
6874 | \r | |
6875 | **/\r | |
6876 | VOID\r | |
6877 | EFIAPI\r | |
6878 | AsmWbinvd (\r | |
6879 | VOID\r | |
6880 | );\r | |
6881 | \r | |
c7f33ca4 | 6882 | \r |
3eb9473e | 6883 | /**\r |
6884 | Executes a INVD instruction.\r | |
6885 | \r | |
6886 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
6887 | X64.\r | |
6888 | \r | |
6889 | **/\r | |
6890 | VOID\r | |
6891 | EFIAPI\r | |
6892 | AsmInvd (\r | |
6893 | VOID\r | |
6894 | );\r | |
6895 | \r | |
c7f33ca4 | 6896 | \r |
3eb9473e | 6897 | /**\r |
6898 | Flushes a cache line from all the instruction and data caches within the\r | |
6899 | coherency domain of the CPU.\r | |
6900 | \r | |
6901 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
6902 | This function is only available on IA-32 and X64.\r | |
6903 | \r | |
6904 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
6905 | in a physical addressing mode, then LinearAddress is a\r | |
6906 | physical address. If the CPU is in a virtual\r | |
6907 | addressing mode, then LinearAddress is a virtual\r | |
6908 | address.\r | |
6909 | \r | |
6910 | @return LinearAddress\r | |
6911 | **/\r | |
6912 | VOID *\r | |
6913 | EFIAPI\r | |
6914 | AsmFlushCacheLine (\r | |
6915 | IN VOID *LinearAddress\r | |
6916 | );\r | |
6917 | \r | |
c7f33ca4 | 6918 | \r |
3eb9473e | 6919 | /**\r |
6920 | Enables the 32-bit paging mode on the CPU.\r | |
6921 | \r | |
6922 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
6923 | must be properly initialized prior to calling this service. This function\r | |
6924 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
6925 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
6926 | transferred to the function specified by EntryPoint using the new stack\r | |
6927 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
6928 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
6929 | EntryPoint must never return.\r | |
6930 | \r | |
6931 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
6932 | If EntryPoint is NULL, then ASSERT().\r | |
6933 | If NewStack is NULL, then ASSERT().\r | |
6934 | \r | |
6935 | There are a number of constraints that must be followed before calling this\r | |
6936 | function:\r | |
6937 | 1) Interrupts must be disabled.\r | |
6938 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
6939 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
6940 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
6941 | descriptors.\r | |
6942 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
6943 | is complete, and those page tables must guarantee that the pages for this\r | |
6944 | function and the stack are identity mapped.\r | |
6945 | \r | |
6946 | @param EntryPoint A pointer to function to call with the new stack after\r | |
6947 | paging is enabled.\r | |
6948 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
6949 | function as the first parameter after paging is enabled.\r | |
6950 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
6951 | function as the second parameter after paging is enabled.\r | |
6952 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
6953 | function after paging is enabled.\r | |
6954 | \r | |
6955 | **/\r | |
6956 | VOID\r | |
6957 | EFIAPI\r | |
6958 | AsmEnablePaging32 (\r | |
6959 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
6960 | IN VOID *Context1, OPTIONAL\r | |
6961 | IN VOID *Context2, OPTIONAL\r | |
6962 | IN VOID *NewStack\r | |
6963 | );\r | |
6964 | \r | |
c7f33ca4 | 6965 | \r |
3eb9473e | 6966 | /**\r |
6967 | Disables the 32-bit paging mode on the CPU.\r | |
6968 | \r | |
6969 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
6970 | mode. This function assumes the current execution mode is 32-paged protected\r | |
6971 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
6972 | is disabled, control is transferred to the function specified by EntryPoint\r | |
6973 | using the new stack specified by NewStack and passing in the parameters\r | |
6974 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
6975 | may be NULL. The function EntryPoint must never return.\r | |
6976 | \r | |
6977 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
6978 | If EntryPoint is NULL, then ASSERT().\r | |
6979 | If NewStack is NULL, then ASSERT().\r | |
6980 | \r | |
6981 | There are a number of constraints that must be followed before calling this\r | |
6982 | function:\r | |
6983 | 1) Interrupts must be disabled.\r | |
6984 | 2) The caller must be in 32-bit paged mode.\r | |
6985 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
6986 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
6987 | this function and the stack are identity mapped.\r | |
6988 | \r | |
6989 | @param EntryPoint A pointer to function to call with the new stack after\r | |
6990 | paging is disabled.\r | |
6991 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
6992 | function as the first parameter after paging is disabled.\r | |
6993 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
6994 | function as the second parameter after paging is\r | |
6995 | disabled.\r | |
6996 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
6997 | function after paging is disabled.\r | |
6998 | \r | |
6999 | **/\r | |
7000 | VOID\r | |
7001 | EFIAPI\r | |
7002 | AsmDisablePaging32 (\r | |
7003 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
7004 | IN VOID *Context1, OPTIONAL\r | |
7005 | IN VOID *Context2, OPTIONAL\r | |
7006 | IN VOID *NewStack\r | |
7007 | );\r | |
7008 | \r | |
c7f33ca4 | 7009 | \r |
3eb9473e | 7010 | /**\r |
7011 | Enables the 64-bit paging mode on the CPU.\r | |
7012 | \r | |
7013 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
7014 | must be properly initialized prior to calling this service. This function\r | |
7015 | assumes the current execution mode is 32-bit protected mode with flat\r | |
7016 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
7017 | paging mode is enabled, control is transferred to the function specified by\r | |
7018 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
7019 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
7020 | optional and may be 0. The function EntryPoint must never return.\r | |
7021 | \r | |
7022 | If the current execution mode is not 32-bit protected mode with flat\r | |
7023 | descriptors, then ASSERT().\r | |
7024 | If EntryPoint is 0, then ASSERT().\r | |
7025 | If NewStack is 0, then ASSERT().\r | |
7026 | \r | |
7027 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r | |
7028 | is called. The descriptor in the GDT that this selector\r | |
7029 | references must be setup for long mode.\r | |
7030 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7031 | the new stack after paging is enabled.\r | |
7032 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7033 | the EntryPoint function as the first parameter after\r | |
7034 | paging is enabled.\r | |
7035 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7036 | the EntryPoint function as the second parameter after\r | |
7037 | paging is enabled.\r | |
7038 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7039 | the EntryPoint function after paging is enabled.\r | |
7040 | \r | |
7041 | **/\r | |
7042 | VOID\r | |
7043 | EFIAPI\r | |
7044 | AsmEnablePaging64 (\r | |
7045 | IN UINT16 CodeSelector,\r | |
7046 | IN UINT64 EntryPoint,\r | |
7047 | IN UINT64 Context1, OPTIONAL\r | |
7048 | IN UINT64 Context2, OPTIONAL\r | |
7049 | IN UINT64 NewStack\r | |
7050 | );\r | |
7051 | \r | |
c7f33ca4 | 7052 | \r |
3eb9473e | 7053 | /**\r |
7054 | Disables the 64-bit paging mode on the CPU.\r | |
7055 | \r | |
7056 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
7057 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
7058 | This function is only available on X64. After the 64-bit paging mode is\r | |
7059 | disabled, control is transferred to the function specified by EntryPoint\r | |
7060 | using the new stack specified by NewStack and passing in the parameters\r | |
7061 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7062 | may be 0. The function EntryPoint must never return.\r | |
7063 | \r | |
7064 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
7065 | If EntryPoint is 0, then ASSERT().\r | |
7066 | If NewStack is 0, then ASSERT().\r | |
7067 | \r | |
7068 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r | |
7069 | is called. The descriptor in the GDT that this selector\r | |
7070 | references must be setup for 32-bit protected mode.\r | |
7071 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7072 | the new stack after paging is disabled.\r | |
7073 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7074 | the EntryPoint function as the first parameter after\r | |
7075 | paging is disabled.\r | |
7076 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7077 | the EntryPoint function as the second parameter after\r | |
7078 | paging is disabled.\r | |
7079 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7080 | the EntryPoint function after paging is disabled.\r | |
7081 | \r | |
7082 | **/\r | |
7083 | VOID\r | |
7084 | EFIAPI\r | |
7085 | AsmDisablePaging64 (\r | |
7086 | IN UINT16 CodeSelector,\r | |
7087 | IN UINT32 EntryPoint,\r | |
7088 | IN UINT32 Context1, OPTIONAL\r | |
7089 | IN UINT32 Context2, OPTIONAL\r | |
7090 | IN UINT32 NewStack\r | |
7091 | );\r | |
7092 | \r | |
c7f33ca4 | 7093 | \r |
3eb9473e | 7094 | //\r |
7095 | // 16-bit thunking services\r | |
7096 | //\r | |
7097 | \r | |
7098 | /**\r | |
7099 | Retrieves the properties for 16-bit thunk functions.\r | |
7100 | \r | |
7101 | Computes the size of the buffer and stack below 1MB required to use the\r | |
7102 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
7103 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
7104 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
7105 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
7106 | of bytes that need to be passed to the 16-bit real mode code.\r | |
7107 | \r | |
7108 | If RealModeBufferSize is NULL, then ASSERT().\r | |
7109 | If ExtraStackSize is NULL, then ASSERT().\r | |
7110 | \r | |
7111 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
7112 | required to use the 16-bit thunk functions.\r | |
7113 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
7114 | that the 16-bit thunk functions require for\r | |
7115 | temporary storage in the transition to and from\r | |
7116 | 16-bit real mode.\r | |
7117 | \r | |
7118 | **/\r | |
7119 | VOID\r | |
7120 | EFIAPI\r | |
7121 | AsmGetThunk16Properties (\r | |
7122 | OUT UINT32 *RealModeBufferSize,\r | |
7123 | OUT UINT32 *ExtraStackSize\r | |
7124 | );\r | |
7125 | \r | |
c7f33ca4 | 7126 | \r |
3eb9473e | 7127 | /**\r |
7128 | Prepares all structures a code required to use AsmThunk16().\r | |
7129 | \r | |
7130 | Prepares all structures and code required to use AsmThunk16().\r | |
7131 | \r | |
7132 | If ThunkContext is NULL, then ASSERT().\r | |
7133 | \r | |
7134 | @param ThunkContext A pointer to the context structure that describes the\r | |
7135 | 16-bit real mode code to call.\r | |
7136 | \r | |
7137 | **/\r | |
7138 | VOID\r | |
7139 | EFIAPI\r | |
7140 | AsmPrepareThunk16 (\r | |
7141 | OUT THUNK_CONTEXT *ThunkContext\r | |
7142 | );\r | |
7143 | \r | |
c7f33ca4 | 7144 | \r |
3eb9473e | 7145 | /**\r |
7146 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
7147 | \r | |
7148 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
7149 | AsmPrepareThunk16() must be called with ThunkContext before this function is\r | |
7150 | used.\r | |
7151 | \r | |
7152 | If ThunkContext is NULL, then ASSERT().\r | |
7153 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
7154 | \r | |
7155 | @param ThunkContext A pointer to the context structure that describes the\r | |
7156 | 16-bit real mode code to call.\r | |
7157 | \r | |
7158 | **/\r | |
7159 | VOID\r | |
7160 | EFIAPI\r | |
7161 | AsmThunk16 (\r | |
7162 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7163 | );\r | |
7164 | \r | |
c7f33ca4 | 7165 | \r |
3eb9473e | 7166 | /**\r |
7167 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7168 | control to a 16-bit real mode entry point, and returns the results.\r | |
7169 | \r | |
7170 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7171 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
7172 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
7173 | service should be used. If the caller intends to make more than one 16-bit\r | |
7174 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
7175 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
7176 | \r | |
7177 | If ThunkContext is NULL, then ASSERT().\r | |
7178 | \r | |
7179 | @param ThunkContext A pointer to the context structure that describes the\r | |
7180 | 16-bit real mode code to call.\r | |
7181 | \r | |
7182 | **/\r | |
7183 | VOID\r | |
7184 | EFIAPI\r | |
7185 | AsmPrepareAndThunk16 (\r | |
7186 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7187 | );\r | |
7188 | \r | |
c7f33ca4 | 7189 | #else\r |
3eb9473e | 7190 | \r |
7191 | #endif\r | |
7192 | \r | |
c7f33ca4 | 7193 | #endif\r |