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b341712e | 1 | #*****************************************************************************\r |
2 | #*\r | |
0249feb8 | 3 | #* Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r |
4ea9375a | 4 | #* This program and the accompanying materials \r |
b341712e | 5 | #* are licensed and made available under the terms and conditions of the BSD License \r |
6 | #* which accompanies this distribution. The full text of the license may be found at \r | |
7 | #* http://opensource.org/licenses/bsd-license.php \r | |
8 | #* \r | |
9 | #* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | #* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | #* \r | |
12 | #* Module Name:\r | |
13 | #*\r | |
14 | #* Thunk.asm\r | |
15 | #* \r | |
16 | #* Abstract:\r | |
17 | #* \r | |
18 | #* Real mode thunk\r | |
19 | #* \r | |
20 | #*****************************************************************************\r | |
21 | #include <EfiBind.h>\r | |
22 | \r | |
23 | .686p: \r | |
24 | \r | |
25 | .globl ASM_PFX(mCode16Size)\r | |
26 | \r | |
27 | .data\r | |
28 | mCode16Size: .long _TEXT16SIZE\r | |
29 | \r | |
30 | .data\r | |
31 | \r | |
32 | NullSegSel: .quad 0\r | |
33 | _16BitCsSel: \r | |
34 | .word -1\r | |
35 | .word 0\r | |
36 | .byte 0\r | |
37 | .byte 0x9b\r | |
38 | .byte 0x8f # 16-bit segment\r | |
39 | .byte 0\r | |
40 | _16BitSsSel:\r | |
41 | .word -1\r | |
42 | .word 0\r | |
43 | .byte 0\r | |
44 | .byte 0x93\r | |
45 | .byte 0x8f # 16-bit segment\r | |
46 | .byte 0\r | |
47 | \r | |
48 | _16Gdtr:\r | |
49 | .word _16Gdtr - NullSegSel - 1\r | |
50 | .long NullSegSel\r | |
51 | \r | |
52 | \r | |
53 | .text\r | |
b341712e | 54 | \r |
55 | \r | |
56 | ASM_PFX(Thunk16):\r | |
57 | push %ebp\r | |
58 | push %ebx\r | |
59 | push %esi\r | |
60 | push %edi\r | |
61 | push %ds\r | |
62 | push %es\r | |
63 | push %fs\r | |
64 | push %gs\r | |
65 | mov 0x24(%esp),%esi\r | |
66 | movzwl 0x32(%esi),%edx\r | |
67 | mov 0xc(%esi),%edi\r | |
68 | add $0xffffffb0,%edi\r | |
69 | push %edi #; save stack offset\r | |
70 | imul $0x10,%edx,%eax #; eax <- edx*16\r | |
71 | add %eax,%edi #; edi <- linear address of 16-bit stack\r | |
72 | push $0xd\r | |
73 | pop %ecx\r | |
74 | rep movsl %ds:(%esi),%es:(%edi) #; copy context to 16-bit stack\r | |
3e99020d LG |
75 | #; copy eflags to stack frame\r |
76 | mov -12(%esi), %eax\r | |
77 | mov %eax, -72(%edi) \r | |
b341712e | 78 | pop %ebx #; ebx <- 16-bit stack offset\r |
e8de4680 | 79 | mov $L_Lable1,%eax\r |
b341712e | 80 | stos %eax,%es:(%edi)\r |
81 | movl %cs,%eax\r | |
82 | stos %ax,%es:(%edi)\r | |
83 | mov 0x28(%esp),%eax\r | |
84 | stos %ax,%es:(%edi)\r | |
85 | mov %esp,%eax\r | |
86 | stos %eax,%es:(%edi)\r | |
87 | movl %ss,%eax\r | |
88 | stos %ax,%es:(%edi)\r | |
89 | sgdtl (%edi)\r | |
90 | sidtl 0x24(%esp)\r | |
91 | mov %cr0,%esi\r | |
92 | mov %esi,0x6(%edi) #; save CR0\r | |
93 | and $0x7ffffffe,%esi #; esi <- CR0 to set\r | |
94 | mov %cr4,%eax\r | |
95 | mov %eax,0xa(%edi) #; save CR4\r | |
96 | and $0xcf,%al #; clear PAE & PSE\r | |
97 | mov %edx,%edi #; edi <- 16-bit stack segment\r | |
98 | mov 0x2c(%esp),%edx\r | |
99 | shl $0x10,%edx\r | |
100 | push %edx\r | |
101 | pop %edx\r | |
102 | mov $(_16BitSsSel - NullSegSel),%dx\r | |
103 | lgdtl _16Gdtr #bugbug mismatch.\r | |
104 | .byte 0xea\r | |
105 | .long L_16Bit #bugbug mismatch.\r | |
106 | .word _16BitCsSel - NullSegSel\r | |
107 | L_16Bit: \r | |
108 | .byte 0x66 \r | |
109 | movw %dx,%ss\r | |
110 | mov %esi,%cr0\r | |
111 | mov %eax,%cr4\r | |
112 | .byte 0x67\r | |
113 | .byte 0xff\r | |
114 | .byte 0x6c\r | |
115 | .byte 0x24\r | |
116 | .byte 0xfc\r | |
117 | \r | |
118 | L_Lable1:\r | |
0249feb8 LG |
119 | xor %eax,%eax\r |
120 | movw %ss,%ax\r | |
b341712e | 121 | shl $0x4,%eax\r |
122 | add %esp,%eax\r | |
123 | lss 0x3c(%esp),%esp\r | |
124 | lidtl 0x24(%esp)\r | |
125 | pop %gs\r | |
126 | pop %fs\r | |
127 | pop %es\r | |
128 | pop %ds\r | |
129 | pop %edi\r | |
130 | pop %esi\r | |
131 | pop %ebx\r | |
132 | pop %ebp\r | |
133 | ret \r | |
134 | \r | |
135 | .code16\r | |
136 | _Code16Addr:\r | |
137 | ASM_PFX(RealMode):\r | |
138 | movw %di, %ss # set up stack\r | |
139 | movl %ebx, %esp\r | |
140 | lidt %cs:_16Idtr - _Code16Addr #lidt fword ptr cs:[_16Idtr - _Code16Addr]\r | |
141 | .byte 0x66\r | |
142 | popaw\r | |
143 | popw %ds\r | |
144 | popw %es\r | |
145 | popw %fs\r | |
146 | popw %gs\r | |
3e99020d LG |
147 | sub 60, %esp\r |
148 | popfw\r | |
149 | testw $1, 74(%esp) #(_STK16 ptr [esp + STACK_PARAM_SIZE + sizeof(IA32_REGS)]).ThunkFlags, 1\r | |
150 | \r | |
b341712e | 151 | jz 1f\r |
3e99020d | 152 | pushf # push Flags when it's INT#\r |
b341712e | 153 | 1: \r |
154 | pushw %cs\r | |
155 | # push @FarCallRet - _Code16Addr\r | |
156 | .byte 0x68 # push /iw\r | |
157 | .word FarCallRet - _Code16Addr\r | |
158 | jz 2f\r | |
3e99020d | 159 | ljmp *66(%esp) #[esp + 6 + STACK_PARAM_SIZE + sizeof(IA32_REGS) - 8]\r |
b341712e | 160 | 2: \r |
3e99020d | 161 | ljmp *64(%esp) #[esp + 4 + STACK_PARAM_SIZE + sizeof(IA32_REGS) - 8]\r |
b341712e | 162 | FarCallRet: \r |
3e99020d | 163 | add 60, %esp\r |
b341712e | 164 | pushfl\r |
165 | pushw %gs\r | |
166 | pushw %fs\r | |
167 | pushw %es\r | |
168 | pushw %ds\r | |
169 | pushal\r | |
170 | cli\r | |
171 | .byte 0x66 # sizeof (IA32_REGS) = 13 * 4 = 52\r | |
172 | lgdt 66(%esp) #lgdt (_STK16 ptr [esp + sizeof (IA32_REGS)]).SavedGdtr\r | |
173 | mov 76(%esp), %eax\r | |
174 | movl %eax, %cr4\r | |
175 | mov 72(%esp), %eax\r | |
176 | movl %eax, %cr0 # restore CR0\r | |
177 | ljmpl *52(%esp) \r | |
178 | #RealMode ENDP\r | |
179 | \r | |
180 | .text\r | |
181 | _16Idtr:\r | |
182 | .word 0x3ff #_16Idtr FWORD (1 SHL 10) - 1\r | |
183 | .byte 0x00\r | |
184 | \r | |
185 | _TEXT16END: \r | |
186 | \r | |
187 | _TEXT16SIZE = _TEXT16END - _Code16Addr\r | |
188 | \r | |
189 | \r |