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949f388f | 1 | /*++ @file\r |
2 | \r | |
10d1be3e | 3 | Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r |
949f388f | 4 | Portions copyright (c) 2011, Apple Inc. All rights reserved.\r |
10d1be3e | 5 | \r |
d18d8a1d | 6 | This program and the accompanying materials\r |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
949f388f | 13 | \r |
14 | **/\r | |
15 | \r | |
16 | #ifndef _CPU_ARCHITECTURAL_PROTOCOL_DRIVER_H_\r | |
17 | #define _CPU_ARCHITECTURAL_PROTOCOL_DRIVER_H_\r | |
18 | \r | |
19 | \r | |
20 | #include <FrameworkDxe.h>\r | |
21 | #include <IndustryStandard/SmBios.h>\r | |
c4671a67 | 22 | \r |
949f388f | 23 | #include <Protocol/Cpu.h>\r |
24 | #include <Protocol/Smbios.h>\r | |
25 | #include <Protocol/FrameworkHii.h>\r | |
c4671a67 | 26 | #include <Protocol/MpService.h>\r |
10d1be3e | 27 | #include <Protocol/EmuThread.h>\r |
949f388f | 28 | #include <Protocol/CpuIo2.h>\r |
c4671a67 | 29 | \r |
30 | #include <Guid/DataHubRecords.h>\r | |
57c7d70f | 31 | #include <Guid/IdleLoopEvent.h>\r |
c4671a67 | 32 | \r |
949f388f | 33 | #include <Library/BaseLib.h>\r |
34 | #include <Library/DebugLib.h>\r | |
35 | #include <Library/HiiLib.h>\r | |
36 | #include <Library/UefiDriverEntryPoint.h>\r | |
37 | #include <Library/BaseMemoryLib.h>\r | |
38 | #include <Library/MemoryAllocationLib.h>\r | |
39 | #include <Library/UefiBootServicesTableLib.h>\r | |
40 | #include <Library/EmuThunkLib.h>\r | |
c4671a67 | 41 | #include <Library/UefiLib.h>\r |
42 | #include <Library/PcdLib.h>\r | |
949f388f | 43 | \r |
44 | \r | |
45 | extern UINT8 CpuStrings[];\r | |
46 | \r | |
47 | //\r | |
48 | // Internal Data Structures\r | |
49 | //\r | |
50 | #define CPU_ARCH_PROT_PRIVATE_SIGNATURE SIGNATURE_32 ('c', 'a', 'p', 'd')\r | |
51 | \r | |
52 | typedef struct {\r | |
53 | UINTN Signature;\r | |
54 | EFI_HANDLE Handle;\r | |
55 | \r | |
56 | EFI_CPU_ARCH_PROTOCOL Cpu;\r | |
57 | EFI_CPU_IO2_PROTOCOL CpuIo;\r | |
58 | \r | |
59 | //\r | |
60 | // Local Data for CPU interface goes here\r | |
61 | //\r | |
62 | BOOLEAN InterruptState;\r | |
63 | \r | |
64 | } CPU_ARCH_PROTOCOL_PRIVATE;\r | |
65 | \r | |
66 | #define CPU_ARCH_PROTOCOL_PRIVATE_DATA_FROM_THIS(a) \\r | |
67 | CR (a, \\r | |
68 | CPU_ARCH_PROTOCOL_PRIVATE, \\r | |
69 | Cpu, \\r | |
70 | CPU_ARCH_PROT_PRIVATE_SIGNATURE \\r | |
71 | )\r | |
72 | \r | |
c4671a67 | 73 | \r |
74 | \r | |
75 | typedef enum {\r | |
76 | CPU_STATE_IDLE,\r | |
77 | CPU_STATE_BLOCKED,\r | |
78 | CPU_STATE_READY,\r | |
79 | CPU_STATE_BUSY,\r | |
80 | CPU_STATE_FINISHED\r | |
81 | } PROCESSOR_STATE;\r | |
82 | \r | |
83 | \r | |
84 | //\r | |
85 | // Define Individual Processor Data block.\r | |
86 | //\r | |
87 | typedef struct {\r | |
88 | EFI_PROCESSOR_INFORMATION Info;\r | |
89 | EFI_AP_PROCEDURE Procedure;\r | |
90 | VOID *Parameter;\r | |
91 | VOID *StateLock;\r | |
92 | VOID *ProcedureLock;\r | |
93 | PROCESSOR_STATE State;\r | |
d18d8a1d | 94 | EFI_EVENT CheckThisAPEvent;\r |
c4671a67 | 95 | } PROCESSOR_DATA_BLOCK;\r |
96 | \r | |
97 | \r | |
98 | //\r | |
99 | // Define MP data block which consumes individual processor block.\r | |
100 | //\r | |
101 | typedef struct {\r | |
102 | UINTN NumberOfProcessors;\r | |
103 | UINTN NumberOfEnabledProcessors;\r | |
104 | EFI_EVENT CheckAllAPsEvent;\r | |
105 | EFI_EVENT WaitEvent;\r | |
106 | UINTN FinishCount;\r | |
107 | UINTN StartCount;\r | |
108 | EFI_AP_PROCEDURE Procedure;\r | |
109 | VOID *ProcedureArgument;\r | |
110 | BOOLEAN SingleThread;\r | |
111 | UINTN StartedNumber;\r | |
112 | PROCESSOR_DATA_BLOCK *ProcessorData;\r | |
8b6d0c05 | 113 | UINTN Timeout;\r |
114 | UINTN *FailedList;\r | |
115 | UINTN FailedListIndex;\r | |
116 | BOOLEAN TimeoutActive;\r | |
c4671a67 | 117 | } MP_SYSTEM_DATA;\r |
118 | \r | |
119 | \r | |
120 | \r | |
121 | \r | |
122 | \r | |
949f388f | 123 | EFI_STATUS\r |
124 | EFIAPI\r | |
125 | CpuMemoryServiceRead (\r | |
126 | IN EFI_CPU_IO2_PROTOCOL *This,\r | |
127 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
128 | IN UINT64 Address,\r | |
129 | IN UINTN Count,\r | |
130 | IN OUT VOID *Buffer\r | |
131 | );\r | |
132 | \r | |
133 | EFI_STATUS\r | |
134 | EFIAPI\r | |
135 | CpuMemoryServiceWrite (\r | |
136 | IN EFI_CPU_IO2_PROTOCOL *This,\r | |
137 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
138 | IN UINT64 Address,\r | |
139 | IN UINTN Count,\r | |
140 | IN OUT VOID *Buffer\r | |
141 | );\r | |
142 | \r | |
143 | EFI_STATUS\r | |
144 | EFIAPI\r | |
145 | CpuIoServiceRead (\r | |
146 | IN EFI_CPU_IO2_PROTOCOL *This,\r | |
147 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
148 | IN UINT64 UserAddress,\r | |
149 | IN UINTN Count,\r | |
150 | IN OUT VOID *UserBuffer\r | |
151 | );\r | |
152 | \r | |
153 | EFI_STATUS\r | |
154 | EFIAPI\r | |
155 | CpuIoServiceWrite (\r | |
156 | IN EFI_CPU_IO2_PROTOCOL *This,\r | |
157 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
158 | IN UINT64 UserAddress,\r | |
159 | IN UINTN Count,\r | |
160 | IN OUT VOID *UserBuffer\r | |
161 | );\r | |
162 | \r | |
163 | EFI_STATUS\r | |
164 | EFIAPI\r | |
165 | InitializeCpu (\r | |
166 | IN EFI_HANDLE ImageHandle,\r | |
167 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
168 | );\r | |
169 | \r | |
170 | EFI_STATUS\r | |
171 | EFIAPI\r | |
172 | EmuFlushCpuDataCache (\r | |
173 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
174 | IN EFI_PHYSICAL_ADDRESS Start,\r | |
175 | IN UINT64 Length,\r | |
176 | IN EFI_CPU_FLUSH_TYPE FlushType\r | |
177 | );\r | |
178 | \r | |
179 | EFI_STATUS\r | |
180 | EFIAPI\r | |
181 | EmuEnableInterrupt (\r | |
182 | IN EFI_CPU_ARCH_PROTOCOL *This\r | |
183 | );\r | |
184 | \r | |
185 | EFI_STATUS\r | |
186 | EFIAPI\r | |
187 | EmuDisableInterrupt (\r | |
188 | IN EFI_CPU_ARCH_PROTOCOL *This\r | |
189 | );\r | |
190 | \r | |
191 | EFI_STATUS\r | |
192 | EFIAPI\r | |
193 | EmuGetInterruptState (\r | |
194 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
195 | OUT BOOLEAN *State\r | |
196 | );\r | |
197 | \r | |
198 | EFI_STATUS\r | |
199 | EFIAPI\r | |
200 | EmuInit (\r | |
201 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
202 | IN EFI_CPU_INIT_TYPE InitType\r | |
203 | );\r | |
204 | \r | |
205 | EFI_STATUS\r | |
206 | EFIAPI\r | |
207 | EmuRegisterInterruptHandler (\r | |
208 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
209 | IN EFI_EXCEPTION_TYPE InterruptType,\r | |
210 | IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r | |
211 | );\r | |
212 | \r | |
213 | EFI_STATUS\r | |
214 | EFIAPI\r | |
215 | EmuGetTimerValue (\r | |
216 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
217 | IN UINT32 TimerIndex,\r | |
218 | OUT UINT64 *TimerValue,\r | |
219 | OUT UINT64 *TimerPeriod OPTIONAL\r | |
220 | );\r | |
221 | \r | |
222 | EFI_STATUS\r | |
223 | EFIAPI\r | |
224 | EmuSetMemoryAttributes (\r | |
225 | IN EFI_CPU_ARCH_PROTOCOL *This,\r | |
226 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
227 | IN UINT64 Length,\r | |
228 | IN UINT64 Attributes\r | |
229 | );\r | |
230 | \r | |
c4671a67 | 231 | EFI_STATUS\r |
232 | CpuMpServicesInit (\r | |
233 | VOID\r | |
234 | );\r | |
235 | \r | |
236 | EFI_STATUS\r | |
237 | EFIAPI\r | |
238 | CpuMpServicesWhoAmI (\r | |
239 | IN EFI_MP_SERVICES_PROTOCOL *This,\r | |
240 | OUT UINTN *ProcessorNumber\r | |
241 | );\r | |
242 | \r | |
243 | extern EFI_MP_SERVICES_PROTOCOL mMpSercicesTemplate;\r | |
244 | \r | |
245 | \r | |
949f388f | 246 | #endif\r |