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946bfba2 1/** @file\r
2 PEI Services Table Pointer Library.\r
d18d8a1d 3\r
bb89ec1a 4 Store PEI Services Table pointer via gEmulatorPkgTokenSpaceGuid.PcdPeiServicesTablePage.\r
946bfba2 5 This emulates a platform SRAM. The PI mechaism does not work in the emulator due to\r
6 lack of privledge.\r
7\r
8 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
d18d8a1d 9 Portiions copyrigth (c) 2011, Apple Inc. All rights reserved.\r
946bfba2 10 This program and the accompanying materials\r
11 are licensed and made available under the terms and conditions of the BSD License\r
12 which accompanies this distribution. The full text of the license may be found at\r
13 http://opensource.org/licenses/bsd-license.php.\r
14\r
15 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
16 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
17\r
18**/\r
19\r
20#include <PiPei.h>\r
21#include <Library/PeiServicesTablePointerLib.h>\r
22#include <Library/DebugLib.h>\r
23#include <Library/EmuMagicPageLib.h>\r
24\r
25\r
26/**\r
d18d8a1d 27 Caches a pointer PEI Services Table.\r
28\r
29 Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer\r
30 in a CPU specific manner as specified in the CPU binding section of the Platform Initialization\r
31 Pre-EFI Initialization Core Interface Specification.\r
32\r
946bfba2 33 If PeiServicesTablePointer is NULL, then ASSERT().\r
d18d8a1d 34\r
946bfba2 35 @param PeiServicesTablePointer The address of PeiServices pointer.\r
36**/\r
37VOID\r
38EFIAPI\r
39SetPeiServicesTablePointer (\r
40 IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer\r
41 )\r
42{\r
43 ASSERT (PeiServicesTablePointer != NULL);\r
44 ASSERT (*PeiServicesTablePointer != NULL);\r
45 EMU_MAGIC_PAGE()->PeiServicesTablePointer = PeiServicesTablePointer;\r
46}\r
47\r
48/**\r
49 Retrieves the cached value of the PEI Services Table pointer.\r
50\r
d18d8a1d 51 Returns the cached value of the PEI Services Table pointer in a CPU specific manner\r
52 as specified in the CPU binding section of the Platform Initialization Pre-EFI\r
946bfba2 53 Initialization Core Interface Specification.\r
d18d8a1d 54\r
946bfba2 55 If the cached PEI Services Table pointer is NULL, then ASSERT().\r
56\r
57 @return The pointer to PeiServices.\r
58\r
59**/\r
60CONST EFI_PEI_SERVICES **\r
61EFIAPI\r
62GetPeiServicesTablePointer (\r
63 VOID\r
64 )\r
65{\r
66 CONST EFI_PEI_SERVICES **PeiServicesTablePointer;\r
d18d8a1d 67\r
946bfba2 68 PeiServicesTablePointer = EMU_MAGIC_PAGE()->PeiServicesTablePointer;\r
69 ASSERT (PeiServicesTablePointer != NULL);\r
70 ASSERT (*PeiServicesTablePointer != NULL);\r
71 return PeiServicesTablePointer;\r
72}\r
73\r
95c2e69a 74/**\r
79e4f2a5 75 Perform CPU specific actions required to migrate the PEI Services Table\r
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76 pointer from temporary RAM to permanent RAM.\r
77\r
79e4f2a5 78 For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes\r
95c2e69a 79 immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
79e4f2a5 80 For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes\r
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81 immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
82 For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in\r
79e4f2a5
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83 a dedicated CPU register. This means that there is no memory storage\r
84 associated with storing the PEI Services Table pointer, so no additional\r
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85 migration actions are required for Itanium or ARM CPUs.\r
86\r
87**/\r
88VOID\r
89EFIAPI\r
90MigratePeiServicesTablePointer (\r
91 VOID\r
92 )\r
93{\r
94 //\r
79e4f2a5 95 // PEI Services Table pointer is cached in SRAM. No additional\r
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96 // migration actions are required.\r
97 //\r
98 return;\r
99}\r
946bfba2 100\r
101\r