]> git.proxmox.com Git - mirror_edk2.git/blame - InOsEmuPkg/CpuRuntimeDxe/CpuDriver.h
Update the comments to describe the purpose of Removable array.
[mirror_edk2.git] / InOsEmuPkg / CpuRuntimeDxe / CpuDriver.h
CommitLineData
949f388f 1/*++ @file\r
2\r
10d1be3e 3Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
949f388f 4Portions copyright (c) 2011, Apple Inc. All rights reserved.\r
10d1be3e 5\r
949f388f 6This program and the accompanying materials \r
7are licensed and made available under the terms and conditions of the BSD License \r
8which accompanies this distribution. The full text of the license may be found at \r
9http://opensource.org/licenses/bsd-license.php \r
10 \r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
13\r
14**/\r
15\r
16#ifndef _CPU_ARCHITECTURAL_PROTOCOL_DRIVER_H_\r
17#define _CPU_ARCHITECTURAL_PROTOCOL_DRIVER_H_\r
18\r
19\r
20#include <FrameworkDxe.h>\r
21#include <IndustryStandard/SmBios.h>\r
c4671a67 22\r
949f388f 23#include <Protocol/Cpu.h>\r
24#include <Protocol/Smbios.h>\r
25#include <Protocol/FrameworkHii.h>\r
c4671a67 26#include <Protocol/MpService.h>\r
10d1be3e 27#include <Protocol/EmuThread.h>\r
949f388f 28#include <Protocol/CpuIo2.h>\r
c4671a67 29\r
30#include <Guid/DataHubRecords.h>\r
31\r
949f388f 32#include <Library/BaseLib.h>\r
33#include <Library/DebugLib.h>\r
34#include <Library/HiiLib.h>\r
35#include <Library/UefiDriverEntryPoint.h>\r
36#include <Library/BaseMemoryLib.h>\r
37#include <Library/MemoryAllocationLib.h>\r
38#include <Library/UefiBootServicesTableLib.h>\r
39#include <Library/EmuThunkLib.h>\r
c4671a67 40#include <Library/UefiLib.h>\r
41#include <Library/PcdLib.h>\r
949f388f 42\r
43\r
44extern UINT8 CpuStrings[];\r
45\r
46//\r
47// Internal Data Structures\r
48//\r
49#define CPU_ARCH_PROT_PRIVATE_SIGNATURE SIGNATURE_32 ('c', 'a', 'p', 'd')\r
50\r
51typedef struct {\r
52 UINTN Signature;\r
53 EFI_HANDLE Handle;\r
54\r
55 EFI_CPU_ARCH_PROTOCOL Cpu;\r
56 EFI_CPU_IO2_PROTOCOL CpuIo;\r
57\r
58 //\r
59 // Local Data for CPU interface goes here\r
60 //\r
61 BOOLEAN InterruptState;\r
62\r
63} CPU_ARCH_PROTOCOL_PRIVATE;\r
64\r
65#define CPU_ARCH_PROTOCOL_PRIVATE_DATA_FROM_THIS(a) \\r
66 CR (a, \\r
67 CPU_ARCH_PROTOCOL_PRIVATE, \\r
68 Cpu, \\r
69 CPU_ARCH_PROT_PRIVATE_SIGNATURE \\r
70 )\r
71\r
c4671a67 72\r
73\r
74typedef enum {\r
75 CPU_STATE_IDLE,\r
76 CPU_STATE_BLOCKED,\r
77 CPU_STATE_READY,\r
78 CPU_STATE_BUSY,\r
79 CPU_STATE_FINISHED\r
80} PROCESSOR_STATE;\r
81\r
82\r
83//\r
84// Define Individual Processor Data block.\r
85//\r
86typedef struct {\r
87 EFI_PROCESSOR_INFORMATION Info;\r
88 EFI_AP_PROCEDURE Procedure;\r
89 VOID *Parameter;\r
90 VOID *StateLock;\r
91 VOID *ProcedureLock;\r
92 PROCESSOR_STATE State;\r
93 EFI_EVENT CheckThisAPEvent; \r
94} PROCESSOR_DATA_BLOCK;\r
95\r
96\r
97//\r
98// Define MP data block which consumes individual processor block.\r
99//\r
100typedef struct {\r
101 UINTN NumberOfProcessors;\r
102 UINTN NumberOfEnabledProcessors;\r
103 EFI_EVENT CheckAllAPsEvent;\r
104 EFI_EVENT WaitEvent;\r
105 UINTN FinishCount;\r
106 UINTN StartCount;\r
107 EFI_AP_PROCEDURE Procedure;\r
108 VOID *ProcedureArgument;\r
109 BOOLEAN SingleThread;\r
110 UINTN StartedNumber;\r
111 PROCESSOR_DATA_BLOCK *ProcessorData;\r
8b6d0c05 112 UINTN Timeout;\r
113 UINTN *FailedList;\r
114 UINTN FailedListIndex;\r
115 BOOLEAN TimeoutActive;\r
c4671a67 116} MP_SYSTEM_DATA;\r
117\r
118\r
119\r
120\r
121\r
949f388f 122EFI_STATUS\r
123EFIAPI\r
124CpuMemoryServiceRead (\r
125 IN EFI_CPU_IO2_PROTOCOL *This,\r
126 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
127 IN UINT64 Address,\r
128 IN UINTN Count,\r
129 IN OUT VOID *Buffer\r
130 );\r
131\r
132EFI_STATUS\r
133EFIAPI\r
134CpuMemoryServiceWrite (\r
135 IN EFI_CPU_IO2_PROTOCOL *This,\r
136 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
137 IN UINT64 Address,\r
138 IN UINTN Count,\r
139 IN OUT VOID *Buffer\r
140 );\r
141\r
142EFI_STATUS\r
143EFIAPI\r
144CpuIoServiceRead (\r
145 IN EFI_CPU_IO2_PROTOCOL *This,\r
146 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
147 IN UINT64 UserAddress,\r
148 IN UINTN Count,\r
149 IN OUT VOID *UserBuffer\r
150 );\r
151\r
152EFI_STATUS\r
153EFIAPI\r
154CpuIoServiceWrite (\r
155 IN EFI_CPU_IO2_PROTOCOL *This,\r
156 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
157 IN UINT64 UserAddress,\r
158 IN UINTN Count,\r
159 IN OUT VOID *UserBuffer\r
160 );\r
161\r
162EFI_STATUS\r
163EFIAPI\r
164InitializeCpu (\r
165 IN EFI_HANDLE ImageHandle,\r
166 IN EFI_SYSTEM_TABLE *SystemTable\r
167 );\r
168\r
169EFI_STATUS\r
170EFIAPI\r
171EmuFlushCpuDataCache (\r
172 IN EFI_CPU_ARCH_PROTOCOL *This,\r
173 IN EFI_PHYSICAL_ADDRESS Start,\r
174 IN UINT64 Length,\r
175 IN EFI_CPU_FLUSH_TYPE FlushType\r
176 );\r
177\r
178EFI_STATUS\r
179EFIAPI\r
180EmuEnableInterrupt (\r
181 IN EFI_CPU_ARCH_PROTOCOL *This\r
182 );\r
183\r
184EFI_STATUS\r
185EFIAPI\r
186EmuDisableInterrupt (\r
187 IN EFI_CPU_ARCH_PROTOCOL *This\r
188 );\r
189\r
190EFI_STATUS\r
191EFIAPI\r
192EmuGetInterruptState (\r
193 IN EFI_CPU_ARCH_PROTOCOL *This,\r
194 OUT BOOLEAN *State\r
195 );\r
196\r
197EFI_STATUS\r
198EFIAPI\r
199EmuInit (\r
200 IN EFI_CPU_ARCH_PROTOCOL *This,\r
201 IN EFI_CPU_INIT_TYPE InitType\r
202 );\r
203\r
204EFI_STATUS\r
205EFIAPI\r
206EmuRegisterInterruptHandler (\r
207 IN EFI_CPU_ARCH_PROTOCOL *This,\r
208 IN EFI_EXCEPTION_TYPE InterruptType,\r
209 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
210 );\r
211\r
212EFI_STATUS\r
213EFIAPI\r
214EmuGetTimerValue (\r
215 IN EFI_CPU_ARCH_PROTOCOL *This,\r
216 IN UINT32 TimerIndex,\r
217 OUT UINT64 *TimerValue,\r
218 OUT UINT64 *TimerPeriod OPTIONAL\r
219 );\r
220\r
221EFI_STATUS\r
222EFIAPI\r
223EmuSetMemoryAttributes (\r
224 IN EFI_CPU_ARCH_PROTOCOL *This,\r
225 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
226 IN UINT64 Length,\r
227 IN UINT64 Attributes\r
228 );\r
229\r
c4671a67 230EFI_STATUS\r
231CpuMpServicesInit (\r
232 VOID\r
233 );\r
234\r
235EFI_STATUS\r
236EFIAPI\r
237CpuMpServicesWhoAmI (\r
238 IN EFI_MP_SERVICES_PROTOCOL *This,\r
239 OUT UINTN *ProcessorNumber\r
240 );\r
241\r
242extern EFI_MP_SERVICES_PROTOCOL mMpSercicesTemplate;\r
243\r
244\r
949f388f 245#endif\r