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97404058 | 1 | /** @file\r |
ead42efc | 2 | \r |
8e6b0dcb | 3 | Copyright (c) 2006 - 2009, Intel Corporation \r |
3db51098 | 4 | All rights reserved. This program and the accompanying materials \r |
5 | are licensed and made available under the terms and conditions of the BSD License \r | |
6 | which accompanies this distribution. The full text of the license may be found at \r | |
7 | http://opensource.org/licenses/bsd-license.php \r | |
8 | \r | |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
ead42efc | 11 | \r |
3db51098 | 12 | **/\r |
ead42efc | 13 | \r |
ead42efc | 14 | \r |
19efd9ec | 15 | #include "PciBus.h"\r |
ead42efc | 16 | #include "PciDeviceSupport.h"\r |
17 | \r | |
18 | //\r | |
19 | // This device structure is serviced as a header.\r | |
20 | // Its Next field points to the first root bridge device node\r | |
21 | //\r | |
22 | LIST_ENTRY gPciDevicePool;\r | |
23 | \r | |
a3b8e257 | 24 | /**\r |
97404058 | 25 | Initialize the gPciDevicePool.\r |
a3b8e257 | 26 | **/\r |
ead42efc | 27 | EFI_STATUS\r |
28 | InitializePciDevicePool (\r | |
29 | VOID\r | |
30 | )\r | |
ead42efc | 31 | {\r |
32 | InitializeListHead (&gPciDevicePool);\r | |
33 | \r | |
34 | return EFI_SUCCESS;\r | |
35 | }\r | |
36 | \r | |
bcd70414 | 37 | /**\r |
ead42efc | 38 | Insert a root bridge into PCI device pool\r |
39 | \r | |
a3b8e257 | 40 | @param RootBridge - A pointer to the PCI_IO_DEVICE.\r |
ead42efc | 41 | \r |
bcd70414 | 42 | **/\r |
a3b8e257 | 43 | EFI_STATUS\r |
44 | InsertRootBridge (\r | |
45 | PCI_IO_DEVICE *RootBridge\r | |
46 | )\r | |
ead42efc | 47 | {\r |
48 | \r | |
49 | InsertTailList (&gPciDevicePool, &(RootBridge->Link));\r | |
50 | \r | |
51 | return EFI_SUCCESS;\r | |
52 | }\r | |
53 | \r | |
bcd70414 | 54 | /**\r |
ead42efc | 55 | This function is used to insert a PCI device node under\r |
56 | a bridge\r | |
57 | \r | |
a3b8e257 | 58 | @param Bridge A pointer to the PCI_IO_DEVICE.\r |
59 | @param PciDeviceNode A pointer to the PCI_IO_DEVICE.\r | |
ead42efc | 60 | \r |
bcd70414 | 61 | **/\r |
a3b8e257 | 62 | EFI_STATUS\r |
63 | InsertPciDevice (\r | |
64 | PCI_IO_DEVICE *Bridge,\r | |
65 | PCI_IO_DEVICE *PciDeviceNode\r | |
66 | )\r | |
ead42efc | 67 | {\r |
68 | \r | |
69 | InsertTailList (&Bridge->ChildList, &(PciDeviceNode->Link));\r | |
70 | PciDeviceNode->Parent = Bridge;\r | |
71 | \r | |
72 | return EFI_SUCCESS;\r | |
73 | }\r | |
74 | \r | |
a3b8e257 | 75 | /**\r |
76 | Destroy root bridge and remove it from deivce tree.\r | |
77 | \r | |
97404058 | 78 | @param RootBridge The bridge want to be removed.\r |
a3b8e257 | 79 | \r |
80 | **/\r | |
ead42efc | 81 | EFI_STATUS\r |
82 | DestroyRootBridge (\r | |
83 | IN PCI_IO_DEVICE *RootBridge\r | |
84 | )\r | |
ead42efc | 85 | {\r |
86 | DestroyPciDeviceTree (RootBridge);\r | |
87 | \r | |
88 | FreePciDevice (RootBridge);\r | |
89 | \r | |
90 | return EFI_SUCCESS;\r | |
91 | }\r | |
92 | \r | |
bcd70414 | 93 | /**\r |
ead42efc | 94 | Destroy a pci device node.\r |
95 | Also all direct or indirect allocated resource for this node will be freed.\r | |
96 | \r | |
a3b8e257 | 97 | @param PciIoDevice A pointer to the PCI_IO_DEVICE.\r |
ead42efc | 98 | \r |
bcd70414 | 99 | **/\r |
a3b8e257 | 100 | EFI_STATUS\r |
101 | FreePciDevice (\r | |
102 | IN PCI_IO_DEVICE *PciIoDevice\r | |
103 | )\r | |
ead42efc | 104 | {\r |
105 | \r | |
106 | //\r | |
107 | // Assume all children have been removed underneath this device\r | |
108 | //\r | |
109 | if (PciIoDevice->ResourcePaddingDescriptors != NULL) {\r | |
110 | gBS->FreePool (PciIoDevice->ResourcePaddingDescriptors);\r | |
111 | }\r | |
112 | \r | |
113 | if (PciIoDevice->DevicePath != NULL) {\r | |
114 | gBS->FreePool (PciIoDevice->DevicePath);\r | |
115 | }\r | |
116 | \r | |
117 | gBS->FreePool (PciIoDevice);\r | |
118 | \r | |
119 | return EFI_SUCCESS;\r | |
120 | }\r | |
121 | \r | |
bcd70414 | 122 | /**\r |
ead42efc | 123 | Destroy all the pci device node under the bridge.\r |
124 | Bridge itself is not included.\r | |
125 | \r | |
a3b8e257 | 126 | @param Bridge A pointer to the PCI_IO_DEVICE.\r |
ead42efc | 127 | \r |
bcd70414 | 128 | **/\r |
a3b8e257 | 129 | EFI_STATUS\r |
130 | DestroyPciDeviceTree (\r | |
131 | IN PCI_IO_DEVICE *Bridge\r | |
132 | )\r | |
ead42efc | 133 | {\r |
134 | LIST_ENTRY *CurrentLink;\r | |
135 | PCI_IO_DEVICE *Temp;\r | |
136 | \r | |
137 | while (!IsListEmpty (&Bridge->ChildList)) {\r | |
138 | \r | |
139 | CurrentLink = Bridge->ChildList.ForwardLink;\r | |
140 | \r | |
141 | //\r | |
142 | // Remove this node from the linked list\r | |
143 | //\r | |
144 | RemoveEntryList (CurrentLink);\r | |
145 | \r | |
146 | Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r | |
147 | \r | |
148 | if (!IsListEmpty (&Temp->ChildList)) {\r | |
149 | DestroyPciDeviceTree (Temp);\r | |
150 | }\r | |
151 | \r | |
152 | FreePciDevice (Temp);\r | |
153 | }\r | |
154 | \r | |
155 | return EFI_SUCCESS;\r | |
156 | }\r | |
157 | \r | |
bcd70414 | 158 | /**\r |
ead42efc | 159 | Destroy all device nodes under the root bridge\r |
160 | specified by Controller.\r | |
161 | The root bridge itself is also included.\r | |
162 | \r | |
a3b8e257 | 163 | @param Controller An efi handle.\r |
ead42efc | 164 | \r |
bcd70414 | 165 | **/\r |
a3b8e257 | 166 | EFI_STATUS\r |
167 | DestroyRootBridgeByHandle (\r | |
168 | EFI_HANDLE Controller\r | |
169 | )\r | |
ead42efc | 170 | {\r |
171 | \r | |
172 | LIST_ENTRY *CurrentLink;\r | |
173 | PCI_IO_DEVICE *Temp;\r | |
174 | \r | |
175 | CurrentLink = gPciDevicePool.ForwardLink;\r | |
176 | \r | |
97404058 | 177 | while (CurrentLink != NULL && CurrentLink != &gPciDevicePool) {\r |
ead42efc | 178 | Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r |
179 | \r | |
180 | if (Temp->Handle == Controller) {\r | |
181 | \r | |
182 | RemoveEntryList (CurrentLink);\r | |
183 | \r | |
184 | DestroyPciDeviceTree (Temp);\r | |
185 | \r | |
186 | FreePciDevice (Temp);\r | |
187 | \r | |
188 | return EFI_SUCCESS;\r | |
189 | }\r | |
190 | \r | |
191 | CurrentLink = CurrentLink->ForwardLink;\r | |
192 | }\r | |
193 | \r | |
194 | return EFI_NOT_FOUND;\r | |
195 | }\r | |
196 | \r | |
bcd70414 | 197 | /**\r |
ead42efc | 198 | This function registers the PCI IO device. It creates a handle for this PCI IO device\r |
199 | (if the handle does not exist), attaches appropriate protocols onto the handle, does\r | |
200 | necessary initialization, and sets up parent/child relationship with its bus controller.\r | |
201 | \r | |
a3b8e257 | 202 | @param Controller - An EFI handle for the PCI bus controller.\r |
203 | @param PciIoDevice - A PCI_IO_DEVICE pointer to the PCI IO device to be registered.\r | |
204 | @param Handle - A pointer to hold the EFI handle for the PCI IO device.\r | |
ead42efc | 205 | \r |
a3b8e257 | 206 | @retval EFI_SUCCESS - The PCI device is successfully registered.\r |
207 | @retval Others - An error occurred when registering the PCI device.\r | |
ead42efc | 208 | \r |
bcd70414 | 209 | **/\r |
a3b8e257 | 210 | EFI_STATUS\r |
211 | RegisterPciDevice (\r | |
212 | IN EFI_HANDLE Controller,\r | |
213 | IN PCI_IO_DEVICE *PciIoDevice,\r | |
214 | OUT EFI_HANDLE *Handle OPTIONAL\r | |
215 | )\r | |
ead42efc | 216 | {\r |
217 | EFI_STATUS Status;\r | |
218 | VOID *PlatformOpRomBuffer;\r | |
219 | UINTN PlatformOpRomSize;\r | |
220 | UINT8 PciExpressCapRegOffset;\r | |
221 | EFI_PCI_IO_PROTOCOL *PciIo;\r | |
222 | UINT8 Data8;\r | |
8e6b0dcb | 223 | BOOLEAN HasEfiImage;\r |
ead42efc | 224 | \r |
225 | //\r | |
226 | // Install the pciio protocol, device path protocol\r | |
227 | //\r | |
228 | Status = gBS->InstallMultipleProtocolInterfaces (\r | |
229 | &PciIoDevice->Handle,\r | |
230 | &gEfiDevicePathProtocolGuid,\r | |
231 | PciIoDevice->DevicePath,\r | |
232 | &gEfiPciIoProtocolGuid,\r | |
233 | &PciIoDevice->PciIo,\r | |
234 | NULL\r | |
235 | );\r | |
236 | if (EFI_ERROR (Status)) {\r | |
237 | return Status;\r | |
238 | }\r | |
239 | \r | |
240 | //\r | |
241 | // Detect if PCI Express Device\r | |
242 | //\r | |
243 | PciExpressCapRegOffset = 0;\r | |
244 | Status = LocateCapabilityRegBlock (\r | |
245 | PciIoDevice,\r | |
246 | EFI_PCI_CAPABILITY_ID_PCIEXP,\r | |
247 | &PciExpressCapRegOffset,\r | |
248 | NULL\r | |
249 | );\r | |
250 | if (!EFI_ERROR (Status)) {\r | |
251 | PciIoDevice->IsPciExp = TRUE;\r | |
252 | }\r | |
253 | \r | |
254 | //\r | |
255 | // Force Interrupt line to "Unknown" or "No Connection"\r | |
256 | //\r | |
257 | PciIo = &(PciIoDevice->PciIo);\r | |
258 | Data8 = PCI_INT_LINE_UNKNOWN;\r | |
259 | PciIoWrite (PciIo, EfiPciIoWidthUint8, 0x3C, 1, &Data8);\r | |
260 | \r | |
261 | //\r | |
eb9a9a5e | 262 | // Process OpRom\r |
ead42efc | 263 | //\r |
eb9a9a5e | 264 | if (!PciIoDevice->AllOpRomProcessed) {\r |
ead42efc | 265 | \r |
eb9a9a5e | 266 | //\r |
267 | // Get the OpRom provided by platform\r | |
268 | //\r | |
269 | if (gPciPlatformProtocol != NULL) {\r | |
270 | Status = gPciPlatformProtocol->GetPciRom (\r | |
271 | gPciPlatformProtocol,\r | |
272 | PciIoDevice->Handle,\r | |
273 | &PlatformOpRomBuffer,\r | |
274 | &PlatformOpRomSize\r | |
275 | );\r | |
276 | if (!EFI_ERROR (Status)) {\r | |
277 | PciIoDevice->RomSize = PlatformOpRomSize;\r | |
278 | PciIoDevice->PciIo.RomSize = PlatformOpRomSize;\r | |
279 | PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;\r | |
280 | //\r | |
281 | // For OpROM read from gPciPlatformProtocol:\r | |
8e6b0dcb | 282 | // Add the Rom Image to internal database for later PCI light enumeration\r |
eb9a9a5e | 283 | //\r |
284 | PciRomAddImageMapping (\r | |
285 | NULL,\r | |
286 | PciIoDevice->PciRootBridgeIo->SegmentNumber,\r | |
287 | PciIoDevice->BusNumber,\r | |
288 | PciIoDevice->DeviceNumber,\r | |
289 | PciIoDevice->FunctionNumber,\r | |
290 | (UINT64) (UINTN) PciIoDevice->PciIo.RomImage,\r | |
291 | PciIoDevice->PciIo.RomSize\r | |
292 | );\r | |
eb9a9a5e | 293 | }\r |
294 | }\r | |
8e6b0dcb | 295 | }\r |
296 | \r | |
297 | //\r | |
298 | // Determine if there are EFI images in the option rom\r | |
299 | //\r | |
300 | HasEfiImage = ContainEfiImage (PciIoDevice->PciIo.RomImage, PciIoDevice->PciIo.RomSize);\r | |
301 | \r | |
302 | if (HasEfiImage) {\r | |
303 | Status = gBS->InstallMultipleProtocolInterfaces (\r | |
304 | &PciIoDevice->Handle,\r | |
305 | &gEfiLoadFile2ProtocolGuid,\r | |
306 | &PciIoDevice->LoadFile2,\r | |
307 | NULL\r | |
308 | );\r | |
309 | if (EFI_ERROR (Status)) {\r | |
310 | gBS->UninstallMultipleProtocolInterfaces (\r | |
311 | &PciIoDevice->Handle,\r | |
312 | &gEfiDevicePathProtocolGuid,\r | |
313 | PciIoDevice->DevicePath,\r | |
314 | &gEfiPciIoProtocolGuid,\r | |
315 | &PciIoDevice->PciIo,\r | |
316 | NULL\r | |
317 | );\r | |
318 | return Status;\r | |
319 | }\r | |
320 | }\r | |
321 | \r | |
322 | \r | |
323 | if (!PciIoDevice->AllOpRomProcessed) {\r | |
324 | \r | |
325 | PciIoDevice->AllOpRomProcessed = TRUE;\r | |
96d1b172 | 326 | \r |
eb9a9a5e | 327 | //\r |
328 | // Dispatch the EFI OpRom for the PCI device.\r | |
329 | // The OpRom is got from platform in the above code\r | |
8e6b0dcb | 330 | // or loaded from device in the previous round of bus enumeration\r |
eb9a9a5e | 331 | //\r |
8e6b0dcb | 332 | if (HasEfiImage) {\r |
ead42efc | 333 | ProcessOpRomImage (PciIoDevice);\r |
334 | }\r | |
335 | }\r | |
336 | \r | |
337 | if (PciIoDevice->BusOverride) {\r | |
338 | //\r | |
339 | // Install BusSpecificDriverOverride Protocol\r | |
340 | //\r | |
341 | Status = gBS->InstallMultipleProtocolInterfaces (\r | |
342 | &PciIoDevice->Handle,\r | |
343 | &gEfiBusSpecificDriverOverrideProtocolGuid,\r | |
344 | &PciIoDevice->PciDriverOverride,\r | |
345 | NULL\r | |
346 | );\r | |
347 | if (EFI_ERROR (Status)) {\r | |
348 | gBS->UninstallMultipleProtocolInterfaces (\r | |
349 | &PciIoDevice->Handle,\r | |
350 | &gEfiDevicePathProtocolGuid,\r | |
351 | PciIoDevice->DevicePath,\r | |
352 | &gEfiPciIoProtocolGuid,\r | |
353 | &PciIoDevice->PciIo,\r | |
354 | NULL\r | |
355 | );\r | |
8e6b0dcb | 356 | if (HasEfiImage) {\r |
357 | gBS->UninstallMultipleProtocolInterfaces (\r | |
358 | &PciIoDevice->Handle,\r | |
359 | &gEfiLoadFile2ProtocolGuid,\r | |
360 | &PciIoDevice->LoadFile2,\r | |
361 | NULL\r | |
362 | );\r | |
363 | }\r | |
ead42efc | 364 | \r |
365 | return Status;\r | |
366 | }\r | |
367 | }\r | |
368 | \r | |
369 | Status = gBS->OpenProtocol (\r | |
370 | Controller,\r | |
371 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
372 | (VOID **) &(PciIoDevice->PciRootBridgeIo),\r | |
373 | gPciBusDriverBinding.DriverBindingHandle,\r | |
374 | PciIoDevice->Handle,\r | |
375 | EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER\r | |
376 | );\r | |
377 | if (EFI_ERROR (Status)) {\r | |
378 | return Status;\r | |
379 | }\r | |
380 | \r | |
ead42efc | 381 | if (Handle != NULL) {\r |
382 | *Handle = PciIoDevice->Handle;\r | |
383 | }\r | |
384 | \r | |
385 | //\r | |
386 | // Indicate the pci device is registered\r | |
387 | //\r | |
388 | PciIoDevice->Registered = TRUE;\r | |
389 | \r | |
390 | return EFI_SUCCESS;\r | |
391 | }\r | |
392 | \r | |
a3b8e257 | 393 | /**\r |
394 | This function is used to remove the whole PCI devices from the bridge.\r | |
395 | \r | |
396 | @param RootBridgeHandle An efi handle.\r | |
397 | @param Bridge A pointer to the PCI_IO_DEVICE.\r | |
398 | \r | |
399 | @retval EFI_SUCCESS\r | |
400 | **/\r | |
ead42efc | 401 | EFI_STATUS\r |
402 | RemoveAllPciDeviceOnBridge (\r | |
403 | EFI_HANDLE RootBridgeHandle,\r | |
404 | PCI_IO_DEVICE *Bridge\r | |
405 | )\r | |
ead42efc | 406 | \r |
ead42efc | 407 | {\r |
408 | \r | |
409 | LIST_ENTRY *CurrentLink;\r | |
410 | PCI_IO_DEVICE *Temp;\r | |
411 | \r | |
412 | while (!IsListEmpty (&Bridge->ChildList)) {\r | |
413 | \r | |
414 | CurrentLink = Bridge->ChildList.ForwardLink;\r | |
415 | Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r | |
416 | \r | |
417 | //\r | |
418 | // Check if the current node has been deregistered before\r | |
419 | // If it is not, then deregister it\r | |
420 | //\r | |
421 | if (Temp->Registered) {\r | |
422 | DeRegisterPciDevice (RootBridgeHandle, Temp->Handle);\r | |
423 | }\r | |
424 | \r | |
425 | //\r | |
426 | // Remove this node from the linked list\r | |
427 | //\r | |
428 | RemoveEntryList (CurrentLink);\r | |
429 | \r | |
430 | if (!IsListEmpty (&Temp->ChildList)) {\r | |
431 | RemoveAllPciDeviceOnBridge (RootBridgeHandle, Temp);\r | |
432 | }\r | |
433 | \r | |
434 | FreePciDevice (Temp);\r | |
435 | }\r | |
436 | \r | |
437 | return EFI_SUCCESS;\r | |
438 | }\r | |
439 | \r | |
bcd70414 | 440 | /**\r |
ead42efc | 441 | \r |
ead42efc | 442 | This function is used to de-register the PCI device from the EFI,\r |
443 | That includes un-installing PciIo protocol from the specified PCI\r | |
444 | device handle.\r | |
445 | \r | |
a3b8e257 | 446 | @param Controller - controller handle\r |
447 | @param Handle - device handle\r | |
ead42efc | 448 | \r |
a3b8e257 | 449 | @return Status of de-register pci device\r |
bcd70414 | 450 | **/\r |
a3b8e257 | 451 | EFI_STATUS\r |
452 | DeRegisterPciDevice (\r | |
453 | IN EFI_HANDLE Controller,\r | |
454 | IN EFI_HANDLE Handle\r | |
455 | )\r | |
456 | \r | |
ead42efc | 457 | {\r |
458 | EFI_PCI_IO_PROTOCOL *PciIo;\r | |
459 | EFI_STATUS Status;\r | |
460 | PCI_IO_DEVICE *PciIoDevice;\r | |
461 | PCI_IO_DEVICE *Node;\r | |
462 | LIST_ENTRY *CurrentLink;\r | |
463 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r | |
464 | \r | |
465 | Status = gBS->OpenProtocol (\r | |
466 | Handle,\r | |
467 | &gEfiPciIoProtocolGuid,\r | |
468 | (VOID **) &PciIo,\r | |
469 | gPciBusDriverBinding.DriverBindingHandle,\r | |
470 | Controller,\r | |
471 | EFI_OPEN_PROTOCOL_GET_PROTOCOL\r | |
472 | );\r | |
473 | if (!EFI_ERROR (Status)) {\r | |
474 | PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (PciIo);\r | |
475 | \r | |
476 | //\r | |
477 | // If it is already de-registered\r | |
478 | //\r | |
479 | if (!PciIoDevice->Registered) {\r | |
480 | return EFI_SUCCESS;\r | |
481 | }\r | |
482 | \r | |
483 | //\r | |
484 | // If it is PPB, first de-register its children\r | |
485 | //\r | |
486 | \r | |
487 | if (!IsListEmpty (&PciIoDevice->ChildList)) {\r | |
488 | \r | |
489 | CurrentLink = PciIoDevice->ChildList.ForwardLink;\r | |
490 | \r | |
97404058 | 491 | while (CurrentLink != NULL && CurrentLink != &PciIoDevice->ChildList) {\r |
ead42efc | 492 | Node = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r |
493 | Status = DeRegisterPciDevice (Controller, Node->Handle);\r | |
494 | \r | |
495 | if (EFI_ERROR (Status)) {\r | |
496 | return Status;\r | |
497 | }\r | |
498 | \r | |
499 | CurrentLink = CurrentLink->ForwardLink;\r | |
500 | }\r | |
501 | }\r | |
ead42efc | 502 | \r |
503 | //\r | |
504 | // Close the child handle\r | |
505 | //\r | |
506 | Status = gBS->CloseProtocol (\r | |
507 | Controller,\r | |
508 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
509 | gPciBusDriverBinding.DriverBindingHandle,\r | |
510 | Handle\r | |
511 | );\r | |
512 | \r | |
513 | //\r | |
514 | // Un-install the device path protocol and pci io protocol\r | |
515 | //\r | |
516 | if (PciIoDevice->BusOverride) {\r | |
517 | Status = gBS->UninstallMultipleProtocolInterfaces (\r | |
518 | Handle,\r | |
519 | &gEfiDevicePathProtocolGuid,\r | |
520 | PciIoDevice->DevicePath,\r | |
521 | &gEfiPciIoProtocolGuid,\r | |
522 | &PciIoDevice->PciIo,\r | |
523 | &gEfiBusSpecificDriverOverrideProtocolGuid,\r | |
524 | &PciIoDevice->PciDriverOverride,\r | |
525 | NULL\r | |
526 | );\r | |
527 | } else {\r | |
528 | Status = gBS->UninstallMultipleProtocolInterfaces (\r | |
529 | Handle,\r | |
530 | &gEfiDevicePathProtocolGuid,\r | |
531 | PciIoDevice->DevicePath,\r | |
532 | &gEfiPciIoProtocolGuid,\r | |
533 | &PciIoDevice->PciIo,\r | |
534 | NULL\r | |
535 | );\r | |
536 | }\r | |
537 | \r | |
8e6b0dcb | 538 | if (!EFI_ERROR (Status)) {\r |
539 | //\r | |
540 | // Try to uninstall LoadFile2 protocol if exists\r | |
541 | //\r | |
542 | Status = gBS->OpenProtocol (\r | |
543 | Handle,\r | |
544 | &gEfiLoadFile2ProtocolGuid,\r | |
545 | NULL,\r | |
546 | gPciBusDriverBinding.DriverBindingHandle,\r | |
547 | Controller,\r | |
548 | EFI_OPEN_PROTOCOL_TEST_PROTOCOL\r | |
549 | );\r | |
550 | if (!EFI_ERROR (Status)) {\r | |
551 | Status = gBS->UninstallMultipleProtocolInterfaces (\r | |
552 | Handle,\r | |
553 | &gEfiLoadFile2ProtocolGuid,\r | |
554 | &PciIoDevice->LoadFile2,\r | |
555 | NULL\r | |
556 | );\r | |
557 | }\r | |
558 | //\r | |
559 | // Restore Status\r | |
560 | //\r | |
561 | Status = EFI_SUCCESS;\r | |
562 | }\r | |
563 | \r | |
564 | \r | |
ead42efc | 565 | if (EFI_ERROR (Status)) {\r |
566 | gBS->OpenProtocol (\r | |
567 | Controller,\r | |
568 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
569 | (VOID **) &PciRootBridgeIo,\r | |
570 | gPciBusDriverBinding.DriverBindingHandle,\r | |
571 | Handle,\r | |
572 | EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER\r | |
573 | );\r | |
574 | return Status;\r | |
575 | }\r | |
576 | \r | |
577 | //\r | |
578 | // The Device Driver should disable this device after disconnect\r | |
579 | // so the Pci Bus driver will not touch this device any more.\r | |
580 | // Restore the register field to the original value\r | |
581 | //\r | |
582 | PciIoDevice->Registered = FALSE;\r | |
583 | PciIoDevice->Handle = NULL;\r | |
584 | } else {\r | |
585 | \r | |
586 | //\r | |
587 | // Handle may be closed before\r | |
588 | //\r | |
589 | return EFI_SUCCESS;\r | |
590 | }\r | |
591 | \r | |
592 | return EFI_SUCCESS;\r | |
593 | }\r | |
594 | \r | |
a3b8e257 | 595 | /**\r |
596 | Start to manage the PCI device on specified the root bridge or PCI-PCI Bridge\r | |
597 | \r | |
598 | @param Controller An efi handle.\r | |
599 | @param RootBridge A pointer to the PCI_IO_DEVICE.\r | |
600 | @param RemainingDevicePath A pointer to the EFI_DEVICE_PATH_PROTOCOL.\r | |
601 | @param NumberOfChildren Children number.\r | |
602 | @param ChildHandleBuffer A pointer to the child handle buffer.\r | |
603 | \r | |
604 | @retval EFI_NOT_READY Device is not allocated\r | |
605 | @retval EFI_UNSUPPORTED Device only support PCI-PCI bridge.\r | |
606 | @retval EFI_NOT_FOUND Can not find the specific device\r | |
607 | @retval EFI_SUCCESS Success to start Pci device on bridge\r | |
608 | \r | |
609 | **/\r | |
ead42efc | 610 | EFI_STATUS\r |
611 | StartPciDevicesOnBridge (\r | |
612 | IN EFI_HANDLE Controller,\r | |
613 | IN PCI_IO_DEVICE *RootBridge,\r | |
614 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,\r | |
615 | IN OUT UINT8 *NumberOfChildren,\r | |
616 | IN OUT EFI_HANDLE *ChildHandleBuffer\r | |
617 | )\r | |
ead42efc | 618 | \r |
ead42efc | 619 | {\r |
ead42efc | 620 | PCI_IO_DEVICE *PciIoDevice;\r |
621 | EFI_DEV_PATH_PTR Node;\r | |
622 | EFI_DEVICE_PATH_PROTOCOL *CurrentDevicePath;\r | |
623 | EFI_STATUS Status;\r | |
624 | LIST_ENTRY *CurrentLink;\r | |
625 | UINT64 Supports;\r | |
626 | \r | |
627 | CurrentLink = RootBridge->ChildList.ForwardLink;\r | |
628 | \r | |
97404058 | 629 | while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) {\r |
ead42efc | 630 | \r |
eb9a9a5e | 631 | PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r |
ead42efc | 632 | if (RemainingDevicePath != NULL) {\r |
633 | \r | |
634 | Node.DevPath = RemainingDevicePath;\r | |
635 | \r | |
eb9a9a5e | 636 | if (Node.Pci->Device != PciIoDevice->DeviceNumber || \r |
637 | Node.Pci->Function != PciIoDevice->FunctionNumber) {\r | |
ead42efc | 638 | CurrentLink = CurrentLink->ForwardLink;\r |
639 | continue;\r | |
640 | }\r | |
641 | \r | |
642 | //\r | |
643 | // Check if the device has been assigned with required resource\r | |
644 | //\r | |
eb9a9a5e | 645 | if (!PciIoDevice->Allocated) {\r |
ead42efc | 646 | return EFI_NOT_READY;\r |
647 | }\r | |
eb9a9a5e | 648 | \r |
ead42efc | 649 | //\r |
650 | // Check if the current node has been registered before\r | |
651 | // If it is not, register it\r | |
652 | //\r | |
eb9a9a5e | 653 | if (!PciIoDevice->Registered) {\r |
ead42efc | 654 | Status = RegisterPciDevice (\r |
eb9a9a5e | 655 | Controller,\r |
656 | PciIoDevice,\r | |
657 | NULL\r | |
658 | );\r | |
ead42efc | 659 | \r |
660 | }\r | |
661 | \r | |
eb9a9a5e | 662 | if (NumberOfChildren != NULL && ChildHandleBuffer != NULL && PciIoDevice->Registered) {\r |
663 | ChildHandleBuffer[*NumberOfChildren] = PciIoDevice->Handle;\r | |
ead42efc | 664 | (*NumberOfChildren)++;\r |
665 | }\r | |
eb9a9a5e | 666 | \r |
ead42efc | 667 | //\r |
668 | // Get the next device path\r | |
669 | //\r | |
2067710d | 670 | CurrentDevicePath = NextDevicePathNode (RemainingDevicePath);\r |
671 | if (IsDevicePathEnd (CurrentDevicePath)) {\r | |
ead42efc | 672 | return EFI_SUCCESS;\r |
673 | }\r | |
674 | \r | |
675 | //\r | |
676 | // If it is a PPB\r | |
677 | //\r | |
eb9a9a5e | 678 | if (!IsListEmpty (&PciIoDevice->ChildList)) {\r |
ead42efc | 679 | Status = StartPciDevicesOnBridge (\r |
eb9a9a5e | 680 | Controller,\r |
681 | PciIoDevice,\r | |
682 | CurrentDevicePath,\r | |
683 | NumberOfChildren,\r | |
684 | ChildHandleBuffer\r | |
685 | );\r | |
686 | \r | |
687 | PciIoDevice->PciIo.Attributes (\r | |
688 | &(PciIoDevice->PciIo),\r | |
689 | EfiPciIoAttributeOperationSupported,\r | |
690 | 0,\r | |
691 | &Supports\r | |
692 | );\r | |
ead42efc | 693 | Supports &= EFI_PCI_DEVICE_ENABLE;\r |
eb9a9a5e | 694 | PciIoDevice->PciIo.Attributes (\r |
695 | &(PciIoDevice->PciIo),\r | |
696 | EfiPciIoAttributeOperationEnable,\r | |
697 | Supports,\r | |
698 | NULL\r | |
699 | );\r | |
ead42efc | 700 | \r |
701 | return Status;\r | |
702 | } else {\r | |
703 | \r | |
704 | //\r | |
705 | // Currently, the PCI bus driver only support PCI-PCI bridge\r | |
706 | //\r | |
707 | return EFI_UNSUPPORTED;\r | |
708 | }\r | |
709 | \r | |
710 | } else {\r | |
711 | \r | |
712 | //\r | |
713 | // If remaining device path is NULL,\r | |
714 | // try to enable all the pci devices under this bridge\r | |
715 | //\r | |
716 | \r | |
eb9a9a5e | 717 | if (!PciIoDevice->Registered && PciIoDevice->Allocated) {\r |
ead42efc | 718 | Status = RegisterPciDevice (\r |
eb9a9a5e | 719 | Controller,\r |
720 | PciIoDevice,\r | |
721 | NULL\r | |
722 | );\r | |
ead42efc | 723 | \r |
724 | }\r | |
725 | \r | |
eb9a9a5e | 726 | if (NumberOfChildren != NULL && ChildHandleBuffer != NULL && PciIoDevice->Registered) {\r |
727 | ChildHandleBuffer[*NumberOfChildren] = PciIoDevice->Handle;\r | |
ead42efc | 728 | (*NumberOfChildren)++;\r |
729 | }\r | |
730 | \r | |
eb9a9a5e | 731 | if (!IsListEmpty (&PciIoDevice->ChildList)) {\r |
ead42efc | 732 | Status = StartPciDevicesOnBridge (\r |
eb9a9a5e | 733 | Controller,\r |
734 | PciIoDevice,\r | |
735 | RemainingDevicePath,\r | |
736 | NumberOfChildren,\r | |
737 | ChildHandleBuffer\r | |
738 | );\r | |
739 | \r | |
740 | PciIoDevice->PciIo.Attributes (\r | |
741 | &(PciIoDevice->PciIo),\r | |
742 | EfiPciIoAttributeOperationSupported,\r | |
743 | 0,\r | |
744 | &Supports\r | |
745 | );\r | |
ead42efc | 746 | Supports &= EFI_PCI_DEVICE_ENABLE;\r |
eb9a9a5e | 747 | PciIoDevice->PciIo.Attributes (\r |
748 | &(PciIoDevice->PciIo),\r | |
749 | EfiPciIoAttributeOperationEnable,\r | |
750 | Supports,\r | |
751 | NULL\r | |
752 | );\r | |
ead42efc | 753 | \r |
754 | }\r | |
755 | \r | |
756 | CurrentLink = CurrentLink->ForwardLink;\r | |
ead42efc | 757 | }\r |
758 | }\r | |
759 | \r | |
760 | return EFI_NOT_FOUND;\r | |
761 | }\r | |
762 | \r | |
bcd70414 | 763 | /**\r |
eb9a9a5e | 764 | Start to manage all the PCI devices it found previously under \r |
765 | the entire host bridge.\r | |
ead42efc | 766 | \r |
a3b8e257 | 767 | @param Controller - root bridge handle.\r |
ead42efc | 768 | \r |
bcd70414 | 769 | **/\r |
a3b8e257 | 770 | EFI_STATUS\r |
771 | StartPciDevices (\r | |
772 | IN EFI_HANDLE Controller\r | |
773 | )\r | |
774 | \r | |
ead42efc | 775 | {\r |
ead42efc | 776 | PCI_IO_DEVICE *RootBridge;\r |
eb9a9a5e | 777 | EFI_HANDLE ThisHostBridge;\r |
ead42efc | 778 | LIST_ENTRY *CurrentLink;\r |
779 | \r | |
eb9a9a5e | 780 | RootBridge = GetRootBridgeByHandle (Controller);\r |
781 | ASSERT (RootBridge != NULL);\r | |
782 | ThisHostBridge = RootBridge->PciRootBridgeIo->ParentHandle;\r | |
ead42efc | 783 | \r |
784 | CurrentLink = gPciDevicePool.ForwardLink;\r | |
785 | \r | |
97404058 | 786 | while (CurrentLink != NULL && CurrentLink != &gPciDevicePool) {\r |
ead42efc | 787 | \r |
788 | RootBridge = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r | |
789 | //\r | |
790 | // Locate the right root bridge to start\r | |
791 | //\r | |
eb9a9a5e | 792 | if (RootBridge->PciRootBridgeIo->ParentHandle == ThisHostBridge) {\r |
ead42efc | 793 | StartPciDevicesOnBridge (\r |
eb9a9a5e | 794 | RootBridge->Handle,\r |
ead42efc | 795 | RootBridge,\r |
eb9a9a5e | 796 | NULL,\r |
ead42efc | 797 | NULL,\r |
798 | NULL\r | |
799 | );\r | |
800 | }\r | |
801 | \r | |
802 | CurrentLink = CurrentLink->ForwardLink;\r | |
803 | }\r | |
804 | \r | |
805 | return EFI_SUCCESS;\r | |
806 | }\r | |
807 | \r | |
bcd70414 | 808 | /**\r |
a3b8e257 | 809 | Create root bridge device\r |
ead42efc | 810 | \r |
a3b8e257 | 811 | @param RootBridgeHandle - Parent bridge handle.\r |
ead42efc | 812 | \r |
a3b8e257 | 813 | @return pointer to new root bridge \r |
bcd70414 | 814 | **/\r |
a3b8e257 | 815 | PCI_IO_DEVICE *\r |
816 | CreateRootBridge (\r | |
817 | IN EFI_HANDLE RootBridgeHandle\r | |
818 | )\r | |
ead42efc | 819 | {\r |
820 | \r | |
821 | EFI_STATUS Status;\r | |
822 | PCI_IO_DEVICE *Dev;\r | |
823 | EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;\r | |
824 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r | |
825 | \r | |
826 | Dev = NULL;\r | |
827 | Status = gBS->AllocatePool (\r | |
828 | EfiBootServicesData,\r | |
829 | sizeof (PCI_IO_DEVICE),\r | |
830 | (VOID **) &Dev\r | |
831 | );\r | |
832 | \r | |
833 | if (EFI_ERROR (Status)) {\r | |
834 | return NULL;\r | |
835 | }\r | |
836 | \r | |
837 | ZeroMem (Dev, sizeof (PCI_IO_DEVICE));\r | |
838 | Dev->Signature = PCI_IO_DEVICE_SIGNATURE;\r | |
839 | Dev->Handle = RootBridgeHandle;\r | |
840 | InitializeListHead (&Dev->ChildList);\r | |
841 | \r | |
842 | Status = gBS->OpenProtocol (\r | |
843 | RootBridgeHandle,\r | |
844 | &gEfiDevicePathProtocolGuid,\r | |
845 | (VOID **) &ParentDevicePath,\r | |
846 | gPciBusDriverBinding.DriverBindingHandle,\r | |
847 | RootBridgeHandle,\r | |
848 | EFI_OPEN_PROTOCOL_GET_PROTOCOL\r | |
849 | );\r | |
850 | \r | |
851 | if (EFI_ERROR (Status)) {\r | |
852 | gBS->FreePool (Dev);\r | |
853 | return NULL;\r | |
854 | }\r | |
855 | \r | |
856 | //\r | |
857 | // Record the root bridge parent device path\r | |
858 | //\r | |
859 | Dev->DevicePath = DuplicateDevicePath (ParentDevicePath);\r | |
860 | \r | |
861 | //\r | |
862 | // Get the pci root bridge io protocol\r | |
863 | //\r | |
864 | Status = gBS->OpenProtocol (\r | |
865 | RootBridgeHandle,\r | |
866 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
867 | (VOID **) &PciRootBridgeIo,\r | |
868 | gPciBusDriverBinding.DriverBindingHandle,\r | |
869 | RootBridgeHandle,\r | |
870 | EFI_OPEN_PROTOCOL_GET_PROTOCOL\r | |
871 | );\r | |
872 | \r | |
873 | if (EFI_ERROR (Status)) {\r | |
874 | FreePciDevice (Dev);\r | |
875 | return NULL;\r | |
876 | }\r | |
877 | \r | |
878 | Dev->PciRootBridgeIo = PciRootBridgeIo;\r | |
879 | \r | |
880 | //\r | |
881 | // Initialize the PCI I/O instance structure\r | |
882 | //\r | |
8e6b0dcb | 883 | InitializePciIoInstance (Dev);\r |
884 | InitializePciDriverOverrideInstance (Dev);\r | |
885 | InitializePciLoadFile2 (Dev);\r | |
ead42efc | 886 | \r |
887 | //\r | |
888 | // Initialize reserved resource list and\r | |
889 | // option rom driver list\r | |
890 | //\r | |
891 | InitializeListHead (&Dev->ReservedResourceList);\r | |
892 | InitializeListHead (&Dev->OptionRomDriverList);\r | |
893 | \r | |
894 | return Dev;\r | |
895 | }\r | |
896 | \r | |
bcd70414 | 897 | /**\r |
97404058 | 898 | Get root bridge device instance by specific handle.\r |
ead42efc | 899 | \r |
97404058 | 900 | @param RootBridgeHandle Given root bridge handle.\r |
ead42efc | 901 | \r |
97404058 | 902 | @return root bridge device instance.\r |
bcd70414 | 903 | **/\r |
a3b8e257 | 904 | PCI_IO_DEVICE *\r |
905 | GetRootBridgeByHandle (\r | |
906 | EFI_HANDLE RootBridgeHandle\r | |
907 | )\r | |
ead42efc | 908 | {\r |
909 | PCI_IO_DEVICE *RootBridgeDev;\r | |
910 | LIST_ENTRY *CurrentLink;\r | |
911 | \r | |
912 | CurrentLink = gPciDevicePool.ForwardLink;\r | |
913 | \r | |
97404058 | 914 | while (CurrentLink != NULL && CurrentLink != &gPciDevicePool) {\r |
ead42efc | 915 | \r |
916 | RootBridgeDev = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r | |
917 | if (RootBridgeDev->Handle == RootBridgeHandle) {\r | |
918 | return RootBridgeDev;\r | |
919 | }\r | |
920 | \r | |
921 | CurrentLink = CurrentLink->ForwardLink;\r | |
922 | }\r | |
923 | \r | |
924 | return NULL;\r | |
925 | }\r | |
926 | \r | |
a3b8e257 | 927 | /**\r |
97404058 | 928 | Judege whether Pci device existed.\r |
a3b8e257 | 929 | \r |
97404058 | 930 | @param Bridge Parent bridege instance.\r |
931 | @param PciIoDevice Device instance.\r | |
a3b8e257 | 932 | \r |
97404058 | 933 | @return whether Pci device existed.\r |
a3b8e257 | 934 | **/\r |
ead42efc | 935 | BOOLEAN\r |
936 | PciDeviceExisted (\r | |
937 | IN PCI_IO_DEVICE *Bridge,\r | |
938 | IN PCI_IO_DEVICE *PciIoDevice\r | |
939 | )\r | |
ead42efc | 940 | {\r |
941 | \r | |
942 | PCI_IO_DEVICE *Temp;\r | |
943 | LIST_ENTRY *CurrentLink;\r | |
944 | \r | |
945 | CurrentLink = Bridge->ChildList.ForwardLink;\r | |
946 | \r | |
97404058 | 947 | while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {\r |
ead42efc | 948 | \r |
949 | Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r | |
950 | \r | |
951 | if (Temp == PciIoDevice) {\r | |
952 | return TRUE;\r | |
953 | }\r | |
954 | \r | |
955 | if (!IsListEmpty (&Temp->ChildList)) {\r | |
956 | if (PciDeviceExisted (Temp, PciIoDevice)) {\r | |
957 | return TRUE;\r | |
958 | }\r | |
959 | }\r | |
960 | \r | |
961 | CurrentLink = CurrentLink->ForwardLink;\r | |
962 | }\r | |
963 | \r | |
964 | return FALSE;\r | |
965 | }\r | |
966 | \r | |
a3b8e257 | 967 | /**\r |
97404058 | 968 | Active VGA device.\r |
a3b8e257 | 969 | \r |
97404058 | 970 | @param VgaDevice device instance for VGA.\r |
a3b8e257 | 971 | \r |
97404058 | 972 | @return device instance.\r |
a3b8e257 | 973 | **/\r |
ead42efc | 974 | PCI_IO_DEVICE *\r |
975 | ActiveVGADeviceOnTheSameSegment (\r | |
976 | IN PCI_IO_DEVICE *VgaDevice\r | |
977 | )\r | |
ead42efc | 978 | {\r |
979 | LIST_ENTRY *CurrentLink;\r | |
980 | PCI_IO_DEVICE *Temp;\r | |
981 | \r | |
982 | CurrentLink = gPciDevicePool.ForwardLink;\r | |
983 | \r | |
97404058 | 984 | while (CurrentLink != NULL && CurrentLink != &gPciDevicePool) {\r |
ead42efc | 985 | \r |
986 | Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r | |
987 | \r | |
988 | if (Temp->PciRootBridgeIo->SegmentNumber == VgaDevice->PciRootBridgeIo->SegmentNumber) {\r | |
989 | \r | |
990 | Temp = ActiveVGADeviceOnTheRootBridge (Temp);\r | |
991 | \r | |
992 | if (Temp != NULL) {\r | |
993 | return Temp;\r | |
994 | }\r | |
995 | }\r | |
996 | \r | |
997 | CurrentLink = CurrentLink->ForwardLink;\r | |
998 | }\r | |
999 | \r | |
1000 | return NULL;\r | |
1001 | }\r | |
1002 | \r | |
a3b8e257 | 1003 | /**\r |
97404058 | 1004 | Active VGA device on root bridge.\r |
a3b8e257 | 1005 | \r |
97404058 | 1006 | @param RootBridge Root bridge device instance.\r |
a3b8e257 | 1007 | \r |
97404058 | 1008 | @return VGA device instance.\r |
a3b8e257 | 1009 | **/\r |
ead42efc | 1010 | PCI_IO_DEVICE *\r |
1011 | ActiveVGADeviceOnTheRootBridge (\r | |
1012 | IN PCI_IO_DEVICE *RootBridge\r | |
1013 | )\r | |
ead42efc | 1014 | {\r |
1015 | LIST_ENTRY *CurrentLink;\r | |
1016 | PCI_IO_DEVICE *Temp;\r | |
1017 | \r | |
1018 | CurrentLink = RootBridge->ChildList.ForwardLink;\r | |
1019 | \r | |
97404058 | 1020 | while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) {\r |
ead42efc | 1021 | \r |
1022 | Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r | |
1023 | \r | |
1024 | if (IS_PCI_VGA(&Temp->Pci) &&\r | |
1025 | (Temp->Attributes &\r | |
1026 | (EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY |\r | |
1027 | EFI_PCI_IO_ATTRIBUTE_VGA_IO |\r | |
97404058 | 1028 | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) != 0) {\r |
ead42efc | 1029 | return Temp;\r |
1030 | }\r | |
1031 | \r | |
1032 | if (IS_PCI_BRIDGE (&Temp->Pci)) {\r | |
1033 | \r | |
1034 | Temp = ActiveVGADeviceOnTheRootBridge (Temp);\r | |
1035 | \r | |
1036 | if (Temp != NULL) {\r | |
1037 | return Temp;\r | |
1038 | }\r | |
1039 | }\r | |
1040 | \r | |
1041 | CurrentLink = CurrentLink->ForwardLink;\r | |
1042 | }\r | |
1043 | \r | |
1044 | return NULL;\r | |
1045 | }\r | |
1046 | \r | |
a3b8e257 | 1047 | /**\r |
97404058 | 1048 | Get HPC PCI address according to its device path.\r |
1049 | @param PciRootBridgeIo Root bridege Io instance.\r | |
1050 | @param HpcDevicePath Given searching device path.\r | |
1051 | @param PciAddress Buffer holding searched result.\r | |
a3b8e257 | 1052 | \r |
1053 | @retval EFI_NOT_FOUND Can not find the specific device path.\r | |
97404058 | 1054 | @retval EFI_SUCCESS Success to get the device path.\r |
a3b8e257 | 1055 | **/\r |
ead42efc | 1056 | EFI_STATUS\r |
1057 | GetHpcPciAddress (\r | |
1058 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,\r | |
1059 | IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,\r | |
1060 | OUT UINT64 *PciAddress\r | |
1061 | )\r | |
ead42efc | 1062 | {\r |
1063 | EFI_DEVICE_PATH_PROTOCOL *CurrentDevicePath;\r | |
1064 | EFI_DEV_PATH_PTR Node;\r | |
1065 | LIST_ENTRY *CurrentLink;\r | |
1066 | PCI_IO_DEVICE *RootBridge;\r | |
1067 | EFI_STATUS Status;\r | |
1068 | \r | |
1069 | CurrentDevicePath = HpcDevicePath;\r | |
1070 | \r | |
1071 | //\r | |
1072 | // Get the remaining device path for this PCI device, if it is a PCI device\r | |
1073 | //\r | |
2067710d | 1074 | while (!IsDevicePathEnd (CurrentDevicePath)) {\r |
ead42efc | 1075 | \r |
1076 | Node.DevPath = CurrentDevicePath;\r | |
1077 | \r | |
1078 | //\r | |
1079 | // Check if it is PCI device Path?\r | |
1080 | //\r | |
1081 | if ((Node.DevPath->Type != HARDWARE_DEVICE_PATH) ||\r | |
1082 | ((Node.DevPath->SubType != HW_PCI_DP) &&\r | |
1083 | (DevicePathNodeLength (Node.DevPath) != sizeof (PCI_DEVICE_PATH)))) {\r | |
2067710d | 1084 | CurrentDevicePath = NextDevicePathNode (CurrentDevicePath);\r |
ead42efc | 1085 | continue;\r |
1086 | }\r | |
1087 | \r | |
1088 | break;\r | |
1089 | }\r | |
1090 | \r | |
1091 | //\r | |
1092 | // Check if it is not PCI device path\r | |
1093 | //\r | |
2067710d | 1094 | if (IsDevicePathEnd (CurrentDevicePath)) {\r |
ead42efc | 1095 | return EFI_NOT_FOUND;\r |
1096 | }\r | |
1097 | \r | |
1098 | CurrentLink = gPciDevicePool.ForwardLink;\r | |
1099 | \r | |
97404058 | 1100 | while (CurrentLink != NULL && CurrentLink != &gPciDevicePool) {\r |
ead42efc | 1101 | \r |
1102 | RootBridge = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r | |
1103 | //\r | |
1104 | // Locate the right root bridge to start\r | |
1105 | //\r | |
1106 | if (RootBridge->PciRootBridgeIo == PciRootBridgeIo) {\r | |
1107 | Status = GetHpcPciAddressFromRootBridge (\r | |
1108 | RootBridge,\r | |
1109 | CurrentDevicePath,\r | |
1110 | PciAddress\r | |
1111 | );\r | |
1112 | if (EFI_ERROR (Status)) {\r | |
1113 | return EFI_NOT_FOUND;\r | |
1114 | }\r | |
1115 | \r | |
1116 | return EFI_SUCCESS;\r | |
1117 | \r | |
1118 | }\r | |
1119 | \r | |
1120 | CurrentLink = CurrentLink->ForwardLink;\r | |
1121 | }\r | |
1122 | \r | |
1123 | return EFI_NOT_FOUND;\r | |
1124 | }\r | |
1125 | \r | |
a3b8e257 | 1126 | /**\r |
97404058 | 1127 | Get HPC PCI address according to its device path.\r |
1128 | @param RootBridge Root bridege Io instance.\r | |
1129 | @param RemainingDevicePath Given searching device path.\r | |
1130 | @param PciAddress Buffer holding searched result.\r | |
a3b8e257 | 1131 | \r |
1132 | @retval EFI_NOT_FOUND Can not find the specific device path.\r | |
1133 | **/\r | |
ead42efc | 1134 | EFI_STATUS\r |
1135 | GetHpcPciAddressFromRootBridge (\r | |
1136 | IN PCI_IO_DEVICE *RootBridge,\r | |
1137 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,\r | |
1138 | OUT UINT64 *PciAddress\r | |
1139 | )\r | |
ead42efc | 1140 | {\r |
1141 | EFI_DEV_PATH_PTR Node;\r | |
1142 | PCI_IO_DEVICE *Temp;\r | |
1143 | EFI_DEVICE_PATH_PROTOCOL *CurrentDevicePath;\r | |
1144 | LIST_ENTRY *CurrentLink;\r | |
1145 | BOOLEAN MisMatch;\r | |
1146 | \r | |
1147 | MisMatch = FALSE;\r | |
1148 | \r | |
1149 | CurrentDevicePath = RemainingDevicePath;\r | |
1150 | Node.DevPath = CurrentDevicePath;\r | |
1151 | Temp = NULL;\r | |
1152 | \r | |
2067710d | 1153 | while (!IsDevicePathEnd (CurrentDevicePath)) {\r |
ead42efc | 1154 | \r |
1155 | CurrentLink = RootBridge->ChildList.ForwardLink;\r | |
1156 | Node.DevPath = CurrentDevicePath;\r | |
1157 | \r | |
97404058 | 1158 | while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) {\r |
ead42efc | 1159 | Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r |
1160 | \r | |
1161 | if (Node.Pci->Device == Temp->DeviceNumber &&\r | |
1162 | Node.Pci->Function == Temp->FunctionNumber) {\r | |
1163 | RootBridge = Temp;\r | |
1164 | break;\r | |
1165 | }\r | |
1166 | \r | |
1167 | CurrentLink = CurrentLink->ForwardLink;\r | |
1168 | }\r | |
1169 | \r | |
1170 | //\r | |
1171 | // Check if we find the bridge\r | |
1172 | //\r | |
1173 | if (CurrentLink == &RootBridge->ChildList) {\r | |
1174 | \r | |
1175 | MisMatch = TRUE;\r | |
1176 | break;\r | |
1177 | \r | |
1178 | }\r | |
1179 | \r | |
2067710d | 1180 | CurrentDevicePath = NextDevicePathNode (CurrentDevicePath);\r |
ead42efc | 1181 | }\r |
1182 | \r | |
1183 | if (MisMatch) {\r | |
1184 | \r | |
2067710d | 1185 | CurrentDevicePath = NextDevicePathNode (CurrentDevicePath);\r |
ead42efc | 1186 | \r |
2067710d | 1187 | if (IsDevicePathEnd (CurrentDevicePath)) {\r |
ead42efc | 1188 | *PciAddress = EFI_PCI_ADDRESS (RootBridge->BusNumber, Node.Pci->Device, Node.Pci->Function, 0);\r |
1189 | return EFI_SUCCESS;\r | |
1190 | }\r | |
1191 | \r | |
1192 | return EFI_NOT_FOUND;\r | |
1193 | }\r | |
1194 | \r | |
aa950314 | 1195 | if (Temp != NULL) {\r |
1196 | *PciAddress = EFI_PCI_ADDRESS (Temp->BusNumber, Temp->DeviceNumber, Temp->FunctionNumber, 0);\r | |
1197 | } else {\r | |
1198 | return EFI_NOT_FOUND;\r | |
1199 | }\r | |
ead42efc | 1200 | \r |
1201 | return EFI_SUCCESS;\r | |
1202 | \r | |
1203 | }\r | |
a3b8e257 | 1204 | \r |