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79964ac8 | 1 | /** @file\r |
9f6f9534 | 2 | Include file for definitions in the Intel Platform Innovation Framework for EFI\r |
3 | System Management Mode Core Interface Specification (SMM CIS) version 0.90.\r | |
79964ac8 | 4 | \r |
9f6f9534 | 5 | Copyright (c) 2007 - 2009, Intel Corporation\r |
79964ac8 | 6 | All rights reserved. This program and the accompanying materials\r |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
79964ac8 | 14 | **/\r |
15 | \r | |
16 | #ifndef _FRAMEWORK_SMM_CIS_H_\r | |
17 | #define _FRAMEWORK_SMM_CIS_H_\r | |
18 | \r | |
79964ac8 | 19 | #define EFI_SMM_CPU_IO_GUID \\r |
20 | { \\r | |
21 | 0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41 } \\r | |
22 | }\r | |
23 | \r | |
24 | typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;\r | |
25 | typedef struct _EFI_SMM_CPU_IO_INTERFACE EFI_SMM_CPU_IO_INTERFACE;\r | |
26 | \r | |
27 | \r | |
28 | //\r | |
29 | // SMM Base specification constant and types\r | |
30 | //\r | |
e89ec8f6 | 31 | #define SMM_SMST_SIGNATURE SIGNATURE_32 ('S', 'M', 'S', 'T')\r |
79964ac8 | 32 | #define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)\r |
33 | \r | |
34 | //\r | |
35 | // *******************************************************\r | |
36 | // EFI_SMM_IO_WIDTH\r | |
37 | // *******************************************************\r | |
38 | //\r | |
39 | typedef enum {\r | |
40 | SMM_IO_UINT8 = 0,\r | |
41 | SMM_IO_UINT16 = 1,\r | |
42 | SMM_IO_UINT32 = 2,\r | |
43 | SMM_IO_UINT64 = 3\r | |
44 | } EFI_SMM_IO_WIDTH;\r | |
45 | \r | |
46 | /**\r | |
47 | Provides the basic memory and I/O interfaces that are used to\r | |
48 | abstract accesses to devices.\r | |
49 | \r | |
50 | @param This The EFI_SMM_CPU_IO_INTERFACE instance.\r | |
51 | @param Width Signifies the width of the I/O operations.\r | |
52 | @param Address The base address of the I/O operations.\r | |
53 | @param Count The number of I/O operations to perform.\r | |
54 | @param Buffer For read operations, the destination buffer to store the results.\r | |
55 | For write operations, the source buffer from which to write data.\r | |
56 | \r | |
57 | @retval EFI_SUCCESS The data was read from or written to the device.\r | |
58 | @retval EFI_UNSUPPORTED The Address is not valid for this system.\r | |
59 | @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.\r | |
60 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
61 | \r | |
62 | **/\r | |
63 | typedef\r | |
64 | EFI_STATUS\r | |
69686d56 | 65 | (EFIAPI *EFI_SMM_CPU_IO)(\r |
79964ac8 | 66 | IN EFI_SMM_CPU_IO_INTERFACE *This,\r |
67 | IN EFI_SMM_IO_WIDTH Width,\r | |
68 | IN UINT64 Address,\r | |
69 | IN UINTN Count,\r | |
70 | IN OUT VOID *Buffer\r | |
71 | );\r | |
72 | \r | |
73 | typedef struct {\r | |
2bbaeb0d | 74 | EFI_SMM_CPU_IO Read; ///< This service provides the various modalities of memory and I/O read.\r |
75 | EFI_SMM_CPU_IO Write; ///< This service provides the various modalities of memory and I/O write.\r | |
79964ac8 | 76 | } EFI_SMM_IO_ACCESS;\r |
77 | \r | |
470d0b27 | 78 | ///\r |
79 | /// The EFI_SMM_CPU_IO_INTERFACE service provides the basic memory, I/O, and PCI\r | |
80 | /// interfaces that are used to abstract accesses to devices.\r | |
81 | ///\r | |
79964ac8 | 82 | struct _EFI_SMM_CPU_IO_INTERFACE {\r |
470d0b27 | 83 | ///\r |
84 | /// Allows reads and writes to memory-mapped I/O space. \r | |
85 | ///\r | |
79964ac8 | 86 | EFI_SMM_IO_ACCESS Mem;\r |
470d0b27 | 87 | ///\r |
88 | /// Allows reads and writes to I/O space. \r | |
89 | ///\r | |
79964ac8 | 90 | EFI_SMM_IO_ACCESS Io;\r |
91 | };\r | |
92 | \r | |
93 | /**\r | |
94 | Allocates pool memory from SMRAM for IA-32 or runtime memory for\r | |
95 | the Itanium processor family.\r | |
96 | \r | |
97 | @param PoolType The type of pool to allocate.The only supported type is EfiRuntimeServicesData\r | |
98 | @param Size The number of bytes to allocate from the pool.\r | |
99 | @param Buffer A pointer to a pointer to the allocated buffer if the call\r | |
100 | succeeds; undefined otherwise.\r | |
101 | \r | |
102 | @retval EFI_SUCCESS The requested number of bytes was allocated.\r | |
103 | @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.\r | |
104 | @retval EFI_UNSUPPORTED In runtime.\r | |
6d1824fc | 105 | @note: Inconsistent with specification here:\r |
18d7ae2e | 106 | In Framework Spec, This definition is naming EFI_SMM_ALLOCATE_POOL. However, \r |
107 | To avoid the naming conflict, the definition is renamed.\r | |
79964ac8 | 108 | **/\r |
109 | typedef\r | |
110 | EFI_STATUS\r | |
69686d56 | 111 | (EFIAPI *EFI_SMMCORE_ALLOCATE_POOL)(\r |
79964ac8 | 112 | IN EFI_MEMORY_TYPE PoolType,\r |
113 | IN UINTN Size,\r | |
114 | OUT VOID **Buffer\r | |
115 | );\r | |
116 | \r | |
117 | /**\r | |
118 | Returns pool memory to the system.\r | |
119 | \r | |
120 | @param Buffer Pointer to the buffer to free.\r | |
121 | \r | |
122 | @retval EFI_SUCCESS The memory was returned to the system.\r | |
123 | @retval EFI_INVALID_PARAMETER Buffer was invalid.\r | |
124 | @retval EFI_UNSUPPORTED In runtime.\r | |
6d1824fc | 125 | @note: Inconsistent with specification here:\r |
18d7ae2e | 126 | In Framework Spec, This definition is naming EFI_SMM_FREE_POOL However, \r |
127 | To avoid the naming conflict, the definition is renamed.\r | |
79964ac8 | 128 | **/\r |
129 | typedef\r | |
130 | EFI_STATUS\r | |
69686d56 | 131 | (EFIAPI *EFI_SMMCORE_FREE_POOL)(\r |
79964ac8 | 132 | IN VOID *Buffer\r |
133 | );\r | |
134 | \r | |
135 | /**\r | |
136 | Allocates memory pages from the system.\r | |
137 | \r | |
138 | @param Type The type of allocation to perform.\r | |
139 | @param MemoryType The only supported type is EfiRuntimeServicesData\r | |
140 | @param NumberofPages The number of contiguous 4 KB pages to allocate\r | |
141 | @param Memory Pointer to a physical address. On input, the way in which\r | |
142 | the address is used depends on the value of Type. On output, the address\r | |
143 | is set to the base of the page range that was allocated.\r | |
144 | \r | |
145 | @retval EFI_SUCCESS The requested pages were allocated.\r | |
146 | @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.\r | |
147 | @retval EFI_NOT_FOUND The requested pages could not be found.\r | |
148 | @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress\r | |
149 | or AllocateAddress. Or MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.\r | |
6d1824fc | 150 | @note: Inconsistent with specification here:\r |
18d7ae2e | 151 | In Framework Spec, This definition is naming EFI_SMM_ALLOCATE_PAGES However, \r |
152 | To avoid the naming conflict, the definition is renamed.\r | |
79964ac8 | 153 | **/\r |
154 | typedef\r | |
155 | EFI_STATUS\r | |
69686d56 | 156 | (EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES)(\r |
79964ac8 | 157 | IN EFI_ALLOCATE_TYPE Type,\r |
158 | IN EFI_MEMORY_TYPE MemoryType,\r | |
159 | IN UINTN NumberOfPages,\r | |
160 | OUT EFI_PHYSICAL_ADDRESS *Memory\r | |
161 | );\r | |
162 | \r | |
163 | /**\r | |
164 | Frees memory pages for the system.\r | |
165 | \r | |
166 | @param Memory The base physical address of the pages to be freed\r | |
167 | @param NumberOfPages The number of contiguous 4 KB pages to free.\r | |
168 | \r | |
169 | @retval EFI_SUCCESS The requested memory pages were freed.\r | |
170 | @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.\r | |
171 | @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().\r | |
18d7ae2e | 172 | \r |
6d1824fc | 173 | @note: Inconsistent with specification here:\r |
18d7ae2e | 174 | In Framework Spec, This definition is naming EFI_SMM_FREE_PAGES However, \r |
175 | To avoid the naming conflict, the definition is renamed.\r | |
79964ac8 | 176 | **/\r |
177 | typedef\r | |
178 | EFI_STATUS\r | |
69686d56 | 179 | (EFIAPI *EFI_SMMCORE_FREE_PAGES)(\r |
79964ac8 | 180 | IN EFI_PHYSICAL_ADDRESS Memory,\r |
181 | IN UINTN NumberOfPages\r | |
182 | );\r | |
18d7ae2e | 183 | /**\r |
184 | Frees memory pages for the system.\r | |
79964ac8 | 185 | \r |
18d7ae2e | 186 | @param Procedure A pointer to the code stream to be run on the designated AP of the system.\r |
187 | @param CpuNumber The zero-based index of the processor number of the AP on which the code stream is\r | |
188 | supposed to run. If the processor number points to the current processor or a disabled\r | |
189 | processor, then it will not run the supplied code.\r | |
190 | @param ProcArguments Allows the caller to pass a list of parameters to the code that is run by\r | |
191 | the AP. It is an optional common mailbox between APs and the BSP to share information.\r | |
192 | \r | |
193 | @retval EFI_SUCCESS The call was successful and the return parameters are valid.\r | |
194 | @retval EFI_INVALID_PARAMETER The input arguments are out of range.\r | |
195 | @retval EFI_INVALID_PARAMETER The CPU requested is not available on this SMI invocation.\r | |
196 | @retval EFI_INVALID_PARAMETER The CPU cannot support an additional service invocation.\r | |
197 | \r | |
6d1824fc | 198 | @note: Inconsistent with specification here:\r |
18d7ae2e | 199 | In Framework Spec, No this definition. This method is introduced in PI1.0 spec for \r |
200 | implementation needed.\r | |
201 | \r | |
202 | **/\r | |
79964ac8 | 203 | typedef\r |
204 | EFI_STATUS\r | |
69686d56 | 205 | (EFIAPI *EFI_SMM_STARTUP_THIS_AP)(\r |
79964ac8 | 206 | IN EFI_AP_PROCEDURE Procedure,\r |
207 | IN UINTN CpuNumber,\r | |
208 | IN OUT VOID *ProcArguments OPTIONAL\r | |
209 | );\r | |
210 | \r | |
470d0b27 | 211 | ///\r |
212 | /// The processor save-state information for IA-32 processors. This information is important in that the\r | |
213 | /// SMM drivers may need to ascertain the state of the processor before invoking the SMI.\r | |
214 | ///\r | |
79964ac8 | 215 | typedef struct {\r |
470d0b27 | 216 | ///\r |
217 | /// Reserved for future processors. As such, software should not attempt to interpret or\r | |
218 | /// write to this region.\r | |
219 | ///\r | |
79964ac8 | 220 | UINT8 Reserved1[248];\r |
470d0b27 | 221 | ///\r |
222 | /// The location of the processor SMBASE, which is the location where the processor\r | |
223 | /// will pass control upon receipt of an SMI.\r | |
224 | ///\r | |
79964ac8 | 225 | UINT32 SMBASE;\r |
470d0b27 | 226 | ///\r |
227 | /// The revision of the SMM save state. This value is set by the processor.\r | |
228 | ///\r | |
79964ac8 | 229 | UINT32 SMMRevId;\r |
470d0b27 | 230 | ///\r |
231 | /// The value of the I/O restart field. Allows for restarting an in-process I/O instruction.\r | |
232 | ///\r | |
79964ac8 | 233 | UINT16 IORestart;\r |
470d0b27 | 234 | ///\r |
235 | /// Describes behavior that should be commenced in response to a halt instruction.\r | |
236 | ///\r | |
79964ac8 | 237 | UINT16 AutoHALTRestart;\r |
470d0b27 | 238 | ///\r |
239 | /// Reserved for future processors. As such, software should not attempt to interpret or\r | |
240 | /// write to this region.\r | |
241 | ///\r | |
79964ac8 | 242 | UINT8 Reserved2[164];\r |
470d0b27 | 243 | \r |
244 | //\r | |
245 | // Registers in IA-32 processors. \r | |
246 | //\r | |
79964ac8 | 247 | UINT32 ES;\r |
248 | UINT32 CS;\r | |
249 | UINT32 SS;\r | |
250 | UINT32 DS;\r | |
251 | UINT32 FS;\r | |
252 | UINT32 GS;\r | |
253 | UINT32 LDTBase;\r | |
254 | UINT32 TR;\r | |
255 | UINT32 DR7;\r | |
256 | UINT32 DR6;\r | |
257 | UINT32 EAX;\r | |
258 | UINT32 ECX;\r | |
259 | UINT32 EDX;\r | |
260 | UINT32 EBX;\r | |
261 | UINT32 ESP;\r | |
262 | UINT32 EBP;\r | |
263 | UINT32 ESI;\r | |
264 | UINT32 EDI;\r | |
265 | UINT32 EIP;\r | |
266 | UINT32 EFLAGS;\r | |
267 | UINT32 CR3;\r | |
268 | UINT32 CR0;\r | |
269 | } EFI_SMI_CPU_SAVE_STATE;\r | |
270 | \r | |
470d0b27 | 271 | ///\r |
272 | /// The processor save-state information for the Itanium processor family. This information is\r | |
273 | /// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r | |
274 | /// the PMI. This structure is mandatory and must be 512 byte aligned.\r | |
275 | /// \r | |
79964ac8 | 276 | typedef struct {\r |
277 | UINT64 reserved;\r | |
278 | UINT64 r1;\r | |
279 | UINT64 r2;\r | |
280 | UINT64 r3;\r | |
281 | UINT64 r4;\r | |
282 | UINT64 r5;\r | |
283 | UINT64 r6;\r | |
284 | UINT64 r7;\r | |
285 | UINT64 r8;\r | |
286 | UINT64 r9;\r | |
287 | UINT64 r10;\r | |
288 | UINT64 r11;\r | |
289 | UINT64 r12;\r | |
290 | UINT64 r13;\r | |
291 | UINT64 r14;\r | |
292 | UINT64 r15;\r | |
293 | UINT64 r16;\r | |
294 | UINT64 r17;\r | |
295 | UINT64 r18;\r | |
296 | UINT64 r19;\r | |
297 | UINT64 r20;\r | |
298 | UINT64 r21;\r | |
299 | UINT64 r22;\r | |
300 | UINT64 r23;\r | |
301 | UINT64 r24;\r | |
302 | UINT64 r25;\r | |
303 | UINT64 r26;\r | |
304 | UINT64 r27;\r | |
305 | UINT64 r28;\r | |
306 | UINT64 r29;\r | |
307 | UINT64 r30;\r | |
308 | UINT64 r31;\r | |
309 | \r | |
310 | UINT64 pr;\r | |
311 | \r | |
312 | UINT64 b0;\r | |
313 | UINT64 b1;\r | |
314 | UINT64 b2;\r | |
315 | UINT64 b3;\r | |
316 | UINT64 b4;\r | |
317 | UINT64 b5;\r | |
318 | UINT64 b6;\r | |
319 | UINT64 b7;\r | |
320 | \r | |
321 | // application registers\r | |
322 | UINT64 ar_rsc;\r | |
323 | UINT64 ar_bsp;\r | |
324 | UINT64 ar_bspstore;\r | |
325 | UINT64 ar_rnat;\r | |
326 | \r | |
327 | UINT64 ar_fcr;\r | |
328 | \r | |
329 | UINT64 ar_eflag;\r | |
330 | UINT64 ar_csd;\r | |
331 | UINT64 ar_ssd;\r | |
332 | UINT64 ar_cflg;\r | |
333 | UINT64 ar_fsr;\r | |
334 | UINT64 ar_fir;\r | |
335 | UINT64 ar_fdr;\r | |
336 | \r | |
337 | UINT64 ar_ccv;\r | |
338 | \r | |
339 | UINT64 ar_unat;\r | |
340 | \r | |
341 | UINT64 ar_fpsr;\r | |
342 | \r | |
343 | UINT64 ar_pfs;\r | |
344 | UINT64 ar_lc;\r | |
345 | UINT64 ar_ec;\r | |
346 | \r | |
347 | // control registers\r | |
348 | UINT64 cr_dcr;\r | |
349 | UINT64 cr_itm;\r | |
350 | UINT64 cr_iva;\r | |
351 | UINT64 cr_pta;\r | |
352 | UINT64 cr_ipsr;\r | |
353 | UINT64 cr_isr;\r | |
354 | UINT64 cr_iip;\r | |
355 | UINT64 cr_ifa;\r | |
356 | UINT64 cr_itir;\r | |
357 | UINT64 cr_iipa;\r | |
358 | UINT64 cr_ifs;\r | |
359 | UINT64 cr_iim;\r | |
360 | UINT64 cr_iha;\r | |
361 | \r | |
362 | // debug registers\r | |
363 | UINT64 dbr0;\r | |
364 | UINT64 dbr1;\r | |
365 | UINT64 dbr2;\r | |
366 | UINT64 dbr3;\r | |
367 | UINT64 dbr4;\r | |
368 | UINT64 dbr5;\r | |
369 | UINT64 dbr6;\r | |
370 | UINT64 dbr7;\r | |
371 | \r | |
372 | UINT64 ibr0;\r | |
373 | UINT64 ibr1;\r | |
374 | UINT64 ibr2;\r | |
375 | UINT64 ibr3;\r | |
376 | UINT64 ibr4;\r | |
377 | UINT64 ibr5;\r | |
378 | UINT64 ibr6;\r | |
379 | UINT64 ibr7;\r | |
380 | \r | |
381 | // virtual registers\r | |
382 | UINT64 int_nat; // nat bits for R1-R31\r | |
383 | \r | |
384 | } EFI_PMI_SYSTEM_CONTEXT;\r | |
385 | \r | |
470d0b27 | 386 | ///\r |
387 | /// The processor save-state information for IA-32 and Itanium processors. This information is\r | |
388 | /// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r | |
389 | /// the SMI or PMI.\r | |
390 | ///\r | |
79964ac8 | 391 | typedef union {\r |
470d0b27 | 392 | ///\r |
393 | /// The processor save-state information for IA-32 processors. \r | |
394 | ///\r | |
79964ac8 | 395 | EFI_SMI_CPU_SAVE_STATE Ia32SaveState;\r |
470d0b27 | 396 | ///\r |
397 | /// The processor save-state information for Itanium processors.\r | |
398 | ///\r | |
79964ac8 | 399 | EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;\r |
400 | } EFI_SMM_CPU_SAVE_STATE;\r | |
401 | \r | |
470d0b27 | 402 | ///\r |
403 | /// The optional floating point save-state information for IA-32 processors. If the optional floating\r | |
404 | /// point save is indicated for any handler, the following data structure must be preserved.\r | |
405 | ///\r | |
79964ac8 | 406 | typedef struct {\r |
407 | UINT16 Fcw;\r | |
408 | UINT16 Fsw;\r | |
409 | UINT16 Ftw;\r | |
410 | UINT16 Opcode;\r | |
411 | UINT32 Eip;\r | |
412 | UINT16 Cs;\r | |
413 | UINT16 Rsvd1;\r | |
414 | UINT32 DataOffset;\r | |
415 | UINT16 Ds;\r | |
416 | UINT8 Rsvd2[10];\r | |
417 | UINT8 St0Mm0[10], Rsvd3[6];\r | |
418 | UINT8 St0Mm1[10], Rsvd4[6];\r | |
419 | UINT8 St0Mm2[10], Rsvd5[6];\r | |
420 | UINT8 St0Mm3[10], Rsvd6[6];\r | |
421 | UINT8 St0Mm4[10], Rsvd7[6];\r | |
422 | UINT8 St0Mm5[10], Rsvd8[6];\r | |
423 | UINT8 St0Mm6[10], Rsvd9[6];\r | |
424 | UINT8 St0Mm7[10], Rsvd10[6];\r | |
425 | UINT8 Rsvd11[22*16];\r | |
426 | } EFI_SMI_OPTIONAL_FPSAVE_STATE;\r | |
427 | \r | |
470d0b27 | 428 | ///\r |
429 | /// The optional floating point save-state information for the Itanium processor family. If the optional\r | |
430 | /// floating point save is indicated for any handler, then this data structure must be preserved. \r | |
431 | /// \r | |
79964ac8 | 432 | typedef struct {\r |
433 | UINT64 f2[2];\r | |
434 | UINT64 f3[2];\r | |
435 | UINT64 f4[2];\r | |
436 | UINT64 f5[2];\r | |
437 | UINT64 f6[2];\r | |
438 | UINT64 f7[2];\r | |
439 | UINT64 f8[2];\r | |
440 | UINT64 f9[2];\r | |
441 | UINT64 f10[2];\r | |
442 | UINT64 f11[2];\r | |
443 | UINT64 f12[2];\r | |
444 | UINT64 f13[2];\r | |
445 | UINT64 f14[2];\r | |
446 | UINT64 f15[2];\r | |
447 | UINT64 f16[2];\r | |
448 | UINT64 f17[2];\r | |
449 | UINT64 f18[2];\r | |
450 | UINT64 f19[2];\r | |
451 | UINT64 f20[2];\r | |
452 | UINT64 f21[2];\r | |
453 | UINT64 f22[2];\r | |
454 | UINT64 f23[2];\r | |
455 | UINT64 f24[2];\r | |
456 | UINT64 f25[2];\r | |
457 | UINT64 f26[2];\r | |
458 | UINT64 f27[2];\r | |
459 | UINT64 f28[2];\r | |
460 | UINT64 f29[2];\r | |
461 | UINT64 f30[2];\r | |
462 | UINT64 f31[2];\r | |
463 | } EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;\r | |
464 | \r | |
470d0b27 | 465 | ///\r |
466 | /// The processor save-state information for IA-32 and Itanium processors. If the optional floating\r | |
467 | /// point save is indicated for any handler, then this data structure must be preserved.\r | |
468 | ///\r | |
79964ac8 | 469 | typedef union {\r |
470d0b27 | 470 | /// \r |
471 | /// The optional floating point save-state information for IA-32 processors. \r | |
472 | ///\r | |
79964ac8 | 473 | EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;\r |
470d0b27 | 474 | ///\r |
475 | /// The optional floating point save-state information for Itanium processors. \r | |
476 | ///\r | |
79964ac8 | 477 | EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;\r |
478 | } EFI_SMM_FLOATING_POINT_SAVE_STATE;\r | |
479 | \r | |
480 | /**\r | |
481 | This function is the main entry point for an SMM handler dispatch\r | |
482 | or communicate-based callback.\r | |
483 | \r | |
484 | @param SmmImageHandle A unique value returned by the SMM infrastructure\r | |
485 | in response to registration for a communicate-based callback or dispatch.\r | |
486 | @param CommunicationBuffer\r | |
487 | An optional buffer that will be populated\r | |
488 | by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)\r | |
489 | invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.\r | |
490 | @param SourceSize If CommunicationBuffer is non-NULL, this field\r | |
491 | indicates the size of the data payload in this buffer.\r | |
492 | \r | |
493 | @return Status Code\r | |
494 | \r | |
495 | **/\r | |
496 | typedef\r | |
497 | EFI_STATUS\r | |
69686d56 | 498 | (EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT)(\r |
79964ac8 | 499 | IN EFI_HANDLE SmmImageHandle,\r |
500 | IN OUT VOID *CommunicationBuffer OPTIONAL,\r | |
501 | IN OUT UINTN *SourceSize OPTIONAL\r | |
502 | );\r | |
503 | \r | |
504 | /**\r | |
505 | The SmmInstallConfigurationTable() function is used to maintain the list\r | |
506 | of configuration tables that are stored in the System Management System\r | |
507 | Table. The list is stored as an array of (GUID, Pointer) pairs. The list\r | |
508 | must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.\r | |
509 | \r | |
510 | @param SystemTable A pointer to the SMM System Table.\r | |
511 | @param Guid A pointer to the GUID for the entry to add, update, or remove.\r | |
512 | @param Table A pointer to the buffer of the table to add.\r | |
513 | @param TableSize The size of the table to install.\r | |
514 | \r | |
515 | @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.\r | |
516 | @retval EFI_INVALID_PARAMETER Guid is not valid.\r | |
517 | @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.\r | |
518 | @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.\r | |
519 | \r | |
520 | **/\r | |
521 | typedef\r | |
522 | EFI_STATUS\r | |
69686d56 | 523 | (EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE)(\r |
79964ac8 | 524 | IN EFI_SMM_SYSTEM_TABLE *SystemTable,\r |
525 | IN EFI_GUID *Guid,\r | |
526 | IN VOID *Table,\r | |
527 | IN UINTN TableSize\r | |
528 | );\r | |
529 | \r | |
530 | //\r | |
531 | // System Management System Table (SMST)\r | |
532 | //\r | |
533 | struct _EFI_SMM_SYSTEM_TABLE {\r | |
470d0b27 | 534 | ///\r |
535 | /// The table header for the System Management System Table (SMST). \r | |
536 | ///\r | |
79964ac8 | 537 | EFI_TABLE_HEADER Hdr;\r |
538 | \r | |
470d0b27 | 539 | ///\r |
540 | /// A pointer to a NULL-terminated Unicode string containing the vendor name. It is\r | |
541 | /// permissible for this pointer to be NULL.\r | |
542 | ///\r | |
79964ac8 | 543 | CHAR16 *SmmFirmwareVendor;\r |
470d0b27 | 544 | ///\r |
545 | /// The particular revision of the firmware.\r | |
546 | ///\r | |
79964ac8 | 547 | UINT32 SmmFirmwareRevision;\r |
548 | \r | |
470d0b27 | 549 | ///\r |
550 | /// Adds, updates, or removes a configuration table entry from the SMST. \r | |
551 | ///\r | |
79964ac8 | 552 | EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;\r |
553 | \r | |
554 | //\r | |
555 | // I/O Services\r | |
556 | //\r | |
470d0b27 | 557 | ///\r |
558 | /// A GUID that designates the particular CPU I/O services. \r | |
559 | ///\r | |
79964ac8 | 560 | EFI_GUID EfiSmmCpuIoGuid;\r |
470d0b27 | 561 | ///\r |
562 | /// Provides the basic memory and I/O interfaces that are used to abstract accesses to\r | |
563 | /// devices.\r | |
564 | ///\r | |
79964ac8 | 565 | EFI_SMM_CPU_IO_INTERFACE SmmIo;\r |
566 | \r | |
567 | //\r | |
568 | // Runtime memory service\r | |
569 | //\r | |
470d0b27 | 570 | ///\r |
18d7ae2e | 571 | ///\r |
470d0b27 | 572 | /// Allocates pool memory from SMRAM for IA-32 or runtime memory for the\r |
573 | /// Itanium processor family.\r | |
574 | ///\r | |
79964ac8 | 575 | EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;\r |
470d0b27 | 576 | ///\r |
577 | /// Returns pool memory to the system. \r | |
578 | ///\r | |
79964ac8 | 579 | EFI_SMMCORE_FREE_POOL SmmFreePool;\r |
470d0b27 | 580 | ///\r |
581 | /// Allocates memory pages from the system. \r | |
582 | ///\r | |
79964ac8 | 583 | EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;\r |
470d0b27 | 584 | ///\r |
585 | /// Frees memory pages for the system.\r | |
586 | ///\r | |
79964ac8 | 587 | EFI_SMMCORE_FREE_PAGES SmmFreePages;\r |
588 | \r | |
589 | //\r | |
590 | // MP service\r | |
591 | //\r | |
18d7ae2e | 592 | \r |
593 | ///Inconsistent with specification here:\r | |
594 | /// In Framework Spec, No this definition. This method is introduced in PI1.0 spec for \r | |
595 | /// implementation needed.\r | |
79964ac8 | 596 | EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;\r |
597 | \r | |
598 | //\r | |
599 | // CPU information records\r | |
600 | //\r | |
470d0b27 | 601 | ///\r |
602 | /// A 1-relative number between 1 and the NumberOfCpus field. This field designates\r | |
603 | /// which processor is executing the SMM infrastructure. This number also serves as an\r | |
604 | /// index into the CpuSaveState and CpuOptionalFloatingPointState\r | |
605 | /// fields.\r | |
606 | ///\r | |
79964ac8 | 607 | UINTN CurrentlyExecutingCpu;\r |
470d0b27 | 608 | ///\r |
609 | /// The number of EFI Configuration Tables in the buffer\r | |
610 | /// SmmConfigurationTable.\r | |
611 | ///\r | |
79964ac8 | 612 | UINTN NumberOfCpus;\r |
470d0b27 | 613 | ///\r |
614 | /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r | |
615 | /// NumberOfTableEntries.\r | |
616 | ///\r | |
79964ac8 | 617 | EFI_SMM_CPU_SAVE_STATE *CpuSaveState;\r |
470d0b27 | 618 | ///\r |
619 | /// A pointer to a catenation of the EFI_SMM_FLOATING_POINT_SAVE_STATE.\r | |
620 | /// The size of this entire table is NumberOfCpus* size of the\r | |
621 | /// EFI_SMM_FLOATING_POINT_SAVE_STATE. These fields are populated only if\r | |
622 | /// there is at least one SMM driver that has registered for a callback with the\r | |
623 | /// FloatingPointSave field in EFI_SMM_BASE_PROTOCOL.RegisterCallback() set to TRUE.\r | |
624 | ///\r | |
79964ac8 | 625 | EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;\r |
626 | \r | |
627 | //\r | |
628 | // Extensibility table\r | |
629 | //\r | |
470d0b27 | 630 | ///\r |
631 | /// The number of EFI Configuration Tables in the buffer\r | |
632 | /// SmmConfigurationTable.\r | |
633 | ///\r | |
79964ac8 | 634 | UINTN NumberOfTableEntries;\r |
470d0b27 | 635 | ///\r |
636 | /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r | |
637 | /// NumberOfTableEntries.\r | |
638 | ///\r | |
79964ac8 | 639 | EFI_CONFIGURATION_TABLE *SmmConfigurationTable;\r |
640 | };\r | |
641 | \r | |
642 | #endif\r |