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79964ac8 | 1 | /** @file\r |
9f6f9534 | 2 | Include file for definitions in the Intel Platform Innovation Framework for EFI\r |
3 | System Management Mode Core Interface Specification (SMM CIS) version 0.90.\r | |
79964ac8 | 4 | \r |
9f6f9534 | 5 | Copyright (c) 2007 - 2009, Intel Corporation\r |
79964ac8 | 6 | All rights reserved. This program and the accompanying materials\r |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
79964ac8 | 14 | **/\r |
15 | \r | |
16 | #ifndef _FRAMEWORK_SMM_CIS_H_\r | |
17 | #define _FRAMEWORK_SMM_CIS_H_\r | |
18 | \r | |
694b922c | 19 | #include <Framework/DxeCis.h>\r |
79964ac8 | 20 | \r |
21 | #define EFI_SMM_CPU_IO_GUID \\r | |
22 | { \\r | |
23 | 0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41 } \\r | |
24 | }\r | |
25 | \r | |
26 | typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;\r | |
27 | typedef struct _EFI_SMM_CPU_IO_INTERFACE EFI_SMM_CPU_IO_INTERFACE;\r | |
28 | \r | |
29 | \r | |
30 | //\r | |
31 | // SMM Base specification constant and types\r | |
32 | //\r | |
e89ec8f6 | 33 | #define SMM_SMST_SIGNATURE SIGNATURE_32 ('S', 'M', 'S', 'T')\r |
79964ac8 | 34 | #define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)\r |
35 | \r | |
36 | //\r | |
37 | // *******************************************************\r | |
38 | // EFI_SMM_IO_WIDTH\r | |
39 | // *******************************************************\r | |
40 | //\r | |
41 | typedef enum {\r | |
42 | SMM_IO_UINT8 = 0,\r | |
43 | SMM_IO_UINT16 = 1,\r | |
44 | SMM_IO_UINT32 = 2,\r | |
45 | SMM_IO_UINT64 = 3\r | |
46 | } EFI_SMM_IO_WIDTH;\r | |
47 | \r | |
48 | /**\r | |
49 | Provides the basic memory and I/O interfaces that are used to\r | |
50 | abstract accesses to devices.\r | |
51 | \r | |
52 | @param This The EFI_SMM_CPU_IO_INTERFACE instance.\r | |
53 | @param Width Signifies the width of the I/O operations.\r | |
54 | @param Address The base address of the I/O operations.\r | |
55 | @param Count The number of I/O operations to perform.\r | |
56 | @param Buffer For read operations, the destination buffer to store the results.\r | |
57 | For write operations, the source buffer from which to write data.\r | |
58 | \r | |
59 | @retval EFI_SUCCESS The data was read from or written to the device.\r | |
60 | @retval EFI_UNSUPPORTED The Address is not valid for this system.\r | |
61 | @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.\r | |
62 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
63 | \r | |
64 | **/\r | |
65 | typedef\r | |
66 | EFI_STATUS\r | |
69686d56 | 67 | (EFIAPI *EFI_SMM_CPU_IO)(\r |
79964ac8 | 68 | IN EFI_SMM_CPU_IO_INTERFACE *This,\r |
69 | IN EFI_SMM_IO_WIDTH Width,\r | |
70 | IN UINT64 Address,\r | |
71 | IN UINTN Count,\r | |
72 | IN OUT VOID *Buffer\r | |
73 | );\r | |
74 | \r | |
75 | typedef struct {\r | |
470d0b27 | 76 | EFI_SMM_CPU_IO Read; ///> This service provides the various modalities of memory and I/O read.\r |
77 | EFI_SMM_CPU_IO Write; ///> This service provides the various modalities of memory and I/O write.\r | |
79964ac8 | 78 | } EFI_SMM_IO_ACCESS;\r |
79 | \r | |
470d0b27 | 80 | ///\r |
81 | /// The EFI_SMM_CPU_IO_INTERFACE service provides the basic memory, I/O, and PCI\r | |
82 | /// interfaces that are used to abstract accesses to devices.\r | |
83 | ///\r | |
79964ac8 | 84 | struct _EFI_SMM_CPU_IO_INTERFACE {\r |
470d0b27 | 85 | ///\r |
86 | /// Allows reads and writes to memory-mapped I/O space. \r | |
87 | ///\r | |
79964ac8 | 88 | EFI_SMM_IO_ACCESS Mem;\r |
470d0b27 | 89 | ///\r |
90 | /// Allows reads and writes to I/O space. \r | |
91 | ///\r | |
79964ac8 | 92 | EFI_SMM_IO_ACCESS Io;\r |
93 | };\r | |
94 | \r | |
95 | /**\r | |
96 | Allocates pool memory from SMRAM for IA-32 or runtime memory for\r | |
97 | the Itanium processor family.\r | |
98 | \r | |
99 | @param PoolType The type of pool to allocate.The only supported type is EfiRuntimeServicesData\r | |
100 | @param Size The number of bytes to allocate from the pool.\r | |
101 | @param Buffer A pointer to a pointer to the allocated buffer if the call\r | |
102 | succeeds; undefined otherwise.\r | |
103 | \r | |
104 | @retval EFI_SUCCESS The requested number of bytes was allocated.\r | |
105 | @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.\r | |
106 | @retval EFI_UNSUPPORTED In runtime.\r | |
107 | \r | |
108 | **/\r | |
109 | typedef\r | |
110 | EFI_STATUS\r | |
69686d56 | 111 | (EFIAPI *EFI_SMMCORE_ALLOCATE_POOL)(\r |
79964ac8 | 112 | IN EFI_MEMORY_TYPE PoolType,\r |
113 | IN UINTN Size,\r | |
114 | OUT VOID **Buffer\r | |
115 | );\r | |
116 | \r | |
117 | /**\r | |
118 | Returns pool memory to the system.\r | |
119 | \r | |
120 | @param Buffer Pointer to the buffer to free.\r | |
121 | \r | |
122 | @retval EFI_SUCCESS The memory was returned to the system.\r | |
123 | @retval EFI_INVALID_PARAMETER Buffer was invalid.\r | |
124 | @retval EFI_UNSUPPORTED In runtime.\r | |
125 | \r | |
126 | **/\r | |
127 | typedef\r | |
128 | EFI_STATUS\r | |
69686d56 | 129 | (EFIAPI *EFI_SMMCORE_FREE_POOL)(\r |
79964ac8 | 130 | IN VOID *Buffer\r |
131 | );\r | |
132 | \r | |
133 | /**\r | |
134 | Allocates memory pages from the system.\r | |
135 | \r | |
136 | @param Type The type of allocation to perform.\r | |
137 | @param MemoryType The only supported type is EfiRuntimeServicesData\r | |
138 | @param NumberofPages The number of contiguous 4 KB pages to allocate\r | |
139 | @param Memory Pointer to a physical address. On input, the way in which\r | |
140 | the address is used depends on the value of Type. On output, the address\r | |
141 | is set to the base of the page range that was allocated.\r | |
142 | \r | |
143 | @retval EFI_SUCCESS The requested pages were allocated.\r | |
144 | @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.\r | |
145 | @retval EFI_NOT_FOUND The requested pages could not be found.\r | |
146 | @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress\r | |
147 | or AllocateAddress. Or MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.\r | |
148 | \r | |
149 | **/\r | |
150 | typedef\r | |
151 | EFI_STATUS\r | |
69686d56 | 152 | (EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES)(\r |
79964ac8 | 153 | IN EFI_ALLOCATE_TYPE Type,\r |
154 | IN EFI_MEMORY_TYPE MemoryType,\r | |
155 | IN UINTN NumberOfPages,\r | |
156 | OUT EFI_PHYSICAL_ADDRESS *Memory\r | |
157 | );\r | |
158 | \r | |
159 | /**\r | |
160 | Frees memory pages for the system.\r | |
161 | \r | |
162 | @param Memory The base physical address of the pages to be freed\r | |
163 | @param NumberOfPages The number of contiguous 4 KB pages to free.\r | |
164 | \r | |
165 | @retval EFI_SUCCESS The requested memory pages were freed.\r | |
166 | @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.\r | |
167 | @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().\r | |
168 | \r | |
169 | **/\r | |
170 | typedef\r | |
171 | EFI_STATUS\r | |
69686d56 | 172 | (EFIAPI *EFI_SMMCORE_FREE_PAGES)(\r |
79964ac8 | 173 | IN EFI_PHYSICAL_ADDRESS Memory,\r |
174 | IN UINTN NumberOfPages\r | |
175 | );\r | |
176 | \r | |
177 | typedef\r | |
178 | EFI_STATUS\r | |
69686d56 | 179 | (EFIAPI *EFI_SMM_STARTUP_THIS_AP)(\r |
79964ac8 | 180 | IN EFI_AP_PROCEDURE Procedure,\r |
181 | IN UINTN CpuNumber,\r | |
182 | IN OUT VOID *ProcArguments OPTIONAL\r | |
183 | );\r | |
184 | \r | |
470d0b27 | 185 | ///\r |
186 | /// The processor save-state information for IA-32 processors. This information is important in that the\r | |
187 | /// SMM drivers may need to ascertain the state of the processor before invoking the SMI.\r | |
188 | ///\r | |
79964ac8 | 189 | typedef struct {\r |
470d0b27 | 190 | ///\r |
191 | /// Reserved for future processors. As such, software should not attempt to interpret or\r | |
192 | /// write to this region.\r | |
193 | ///\r | |
79964ac8 | 194 | UINT8 Reserved1[248];\r |
470d0b27 | 195 | ///\r |
196 | /// The location of the processor SMBASE, which is the location where the processor\r | |
197 | /// will pass control upon receipt of an SMI.\r | |
198 | ///\r | |
79964ac8 | 199 | UINT32 SMBASE;\r |
470d0b27 | 200 | ///\r |
201 | /// The revision of the SMM save state. This value is set by the processor.\r | |
202 | ///\r | |
79964ac8 | 203 | UINT32 SMMRevId;\r |
470d0b27 | 204 | ///\r |
205 | /// The value of the I/O restart field. Allows for restarting an in-process I/O instruction.\r | |
206 | ///\r | |
79964ac8 | 207 | UINT16 IORestart;\r |
470d0b27 | 208 | ///\r |
209 | /// Describes behavior that should be commenced in response to a halt instruction.\r | |
210 | ///\r | |
79964ac8 | 211 | UINT16 AutoHALTRestart;\r |
470d0b27 | 212 | ///\r |
213 | /// Reserved for future processors. As such, software should not attempt to interpret or\r | |
214 | /// write to this region.\r | |
215 | ///\r | |
79964ac8 | 216 | UINT8 Reserved2[164];\r |
470d0b27 | 217 | \r |
218 | //\r | |
219 | // Registers in IA-32 processors. \r | |
220 | //\r | |
79964ac8 | 221 | UINT32 ES;\r |
222 | UINT32 CS;\r | |
223 | UINT32 SS;\r | |
224 | UINT32 DS;\r | |
225 | UINT32 FS;\r | |
226 | UINT32 GS;\r | |
227 | UINT32 LDTBase;\r | |
228 | UINT32 TR;\r | |
229 | UINT32 DR7;\r | |
230 | UINT32 DR6;\r | |
231 | UINT32 EAX;\r | |
232 | UINT32 ECX;\r | |
233 | UINT32 EDX;\r | |
234 | UINT32 EBX;\r | |
235 | UINT32 ESP;\r | |
236 | UINT32 EBP;\r | |
237 | UINT32 ESI;\r | |
238 | UINT32 EDI;\r | |
239 | UINT32 EIP;\r | |
240 | UINT32 EFLAGS;\r | |
241 | UINT32 CR3;\r | |
242 | UINT32 CR0;\r | |
243 | } EFI_SMI_CPU_SAVE_STATE;\r | |
244 | \r | |
470d0b27 | 245 | ///\r |
246 | /// The processor save-state information for the Itanium processor family. This information is\r | |
247 | /// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r | |
248 | /// the PMI. This structure is mandatory and must be 512 byte aligned.\r | |
249 | /// \r | |
79964ac8 | 250 | typedef struct {\r |
251 | UINT64 reserved;\r | |
252 | UINT64 r1;\r | |
253 | UINT64 r2;\r | |
254 | UINT64 r3;\r | |
255 | UINT64 r4;\r | |
256 | UINT64 r5;\r | |
257 | UINT64 r6;\r | |
258 | UINT64 r7;\r | |
259 | UINT64 r8;\r | |
260 | UINT64 r9;\r | |
261 | UINT64 r10;\r | |
262 | UINT64 r11;\r | |
263 | UINT64 r12;\r | |
264 | UINT64 r13;\r | |
265 | UINT64 r14;\r | |
266 | UINT64 r15;\r | |
267 | UINT64 r16;\r | |
268 | UINT64 r17;\r | |
269 | UINT64 r18;\r | |
270 | UINT64 r19;\r | |
271 | UINT64 r20;\r | |
272 | UINT64 r21;\r | |
273 | UINT64 r22;\r | |
274 | UINT64 r23;\r | |
275 | UINT64 r24;\r | |
276 | UINT64 r25;\r | |
277 | UINT64 r26;\r | |
278 | UINT64 r27;\r | |
279 | UINT64 r28;\r | |
280 | UINT64 r29;\r | |
281 | UINT64 r30;\r | |
282 | UINT64 r31;\r | |
283 | \r | |
284 | UINT64 pr;\r | |
285 | \r | |
286 | UINT64 b0;\r | |
287 | UINT64 b1;\r | |
288 | UINT64 b2;\r | |
289 | UINT64 b3;\r | |
290 | UINT64 b4;\r | |
291 | UINT64 b5;\r | |
292 | UINT64 b6;\r | |
293 | UINT64 b7;\r | |
294 | \r | |
295 | // application registers\r | |
296 | UINT64 ar_rsc;\r | |
297 | UINT64 ar_bsp;\r | |
298 | UINT64 ar_bspstore;\r | |
299 | UINT64 ar_rnat;\r | |
300 | \r | |
301 | UINT64 ar_fcr;\r | |
302 | \r | |
303 | UINT64 ar_eflag;\r | |
304 | UINT64 ar_csd;\r | |
305 | UINT64 ar_ssd;\r | |
306 | UINT64 ar_cflg;\r | |
307 | UINT64 ar_fsr;\r | |
308 | UINT64 ar_fir;\r | |
309 | UINT64 ar_fdr;\r | |
310 | \r | |
311 | UINT64 ar_ccv;\r | |
312 | \r | |
313 | UINT64 ar_unat;\r | |
314 | \r | |
315 | UINT64 ar_fpsr;\r | |
316 | \r | |
317 | UINT64 ar_pfs;\r | |
318 | UINT64 ar_lc;\r | |
319 | UINT64 ar_ec;\r | |
320 | \r | |
321 | // control registers\r | |
322 | UINT64 cr_dcr;\r | |
323 | UINT64 cr_itm;\r | |
324 | UINT64 cr_iva;\r | |
325 | UINT64 cr_pta;\r | |
326 | UINT64 cr_ipsr;\r | |
327 | UINT64 cr_isr;\r | |
328 | UINT64 cr_iip;\r | |
329 | UINT64 cr_ifa;\r | |
330 | UINT64 cr_itir;\r | |
331 | UINT64 cr_iipa;\r | |
332 | UINT64 cr_ifs;\r | |
333 | UINT64 cr_iim;\r | |
334 | UINT64 cr_iha;\r | |
335 | \r | |
336 | // debug registers\r | |
337 | UINT64 dbr0;\r | |
338 | UINT64 dbr1;\r | |
339 | UINT64 dbr2;\r | |
340 | UINT64 dbr3;\r | |
341 | UINT64 dbr4;\r | |
342 | UINT64 dbr5;\r | |
343 | UINT64 dbr6;\r | |
344 | UINT64 dbr7;\r | |
345 | \r | |
346 | UINT64 ibr0;\r | |
347 | UINT64 ibr1;\r | |
348 | UINT64 ibr2;\r | |
349 | UINT64 ibr3;\r | |
350 | UINT64 ibr4;\r | |
351 | UINT64 ibr5;\r | |
352 | UINT64 ibr6;\r | |
353 | UINT64 ibr7;\r | |
354 | \r | |
355 | // virtual registers\r | |
356 | UINT64 int_nat; // nat bits for R1-R31\r | |
357 | \r | |
358 | } EFI_PMI_SYSTEM_CONTEXT;\r | |
359 | \r | |
470d0b27 | 360 | ///\r |
361 | /// The processor save-state information for IA-32 and Itanium processors. This information is\r | |
362 | /// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r | |
363 | /// the SMI or PMI.\r | |
364 | ///\r | |
79964ac8 | 365 | typedef union {\r |
470d0b27 | 366 | ///\r |
367 | /// The processor save-state information for IA-32 processors. \r | |
368 | ///\r | |
79964ac8 | 369 | EFI_SMI_CPU_SAVE_STATE Ia32SaveState;\r |
470d0b27 | 370 | ///\r |
371 | /// The processor save-state information for Itanium processors.\r | |
372 | ///\r | |
79964ac8 | 373 | EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;\r |
374 | } EFI_SMM_CPU_SAVE_STATE;\r | |
375 | \r | |
470d0b27 | 376 | ///\r |
377 | /// The optional floating point save-state information for IA-32 processors. If the optional floating\r | |
378 | /// point save is indicated for any handler, the following data structure must be preserved.\r | |
379 | ///\r | |
79964ac8 | 380 | typedef struct {\r |
381 | UINT16 Fcw;\r | |
382 | UINT16 Fsw;\r | |
383 | UINT16 Ftw;\r | |
384 | UINT16 Opcode;\r | |
385 | UINT32 Eip;\r | |
386 | UINT16 Cs;\r | |
387 | UINT16 Rsvd1;\r | |
388 | UINT32 DataOffset;\r | |
389 | UINT16 Ds;\r | |
390 | UINT8 Rsvd2[10];\r | |
391 | UINT8 St0Mm0[10], Rsvd3[6];\r | |
392 | UINT8 St0Mm1[10], Rsvd4[6];\r | |
393 | UINT8 St0Mm2[10], Rsvd5[6];\r | |
394 | UINT8 St0Mm3[10], Rsvd6[6];\r | |
395 | UINT8 St0Mm4[10], Rsvd7[6];\r | |
396 | UINT8 St0Mm5[10], Rsvd8[6];\r | |
397 | UINT8 St0Mm6[10], Rsvd9[6];\r | |
398 | UINT8 St0Mm7[10], Rsvd10[6];\r | |
399 | UINT8 Rsvd11[22*16];\r | |
400 | } EFI_SMI_OPTIONAL_FPSAVE_STATE;\r | |
401 | \r | |
470d0b27 | 402 | ///\r |
403 | /// The optional floating point save-state information for the Itanium processor family. If the optional\r | |
404 | /// floating point save is indicated for any handler, then this data structure must be preserved. \r | |
405 | /// \r | |
79964ac8 | 406 | typedef struct {\r |
407 | UINT64 f2[2];\r | |
408 | UINT64 f3[2];\r | |
409 | UINT64 f4[2];\r | |
410 | UINT64 f5[2];\r | |
411 | UINT64 f6[2];\r | |
412 | UINT64 f7[2];\r | |
413 | UINT64 f8[2];\r | |
414 | UINT64 f9[2];\r | |
415 | UINT64 f10[2];\r | |
416 | UINT64 f11[2];\r | |
417 | UINT64 f12[2];\r | |
418 | UINT64 f13[2];\r | |
419 | UINT64 f14[2];\r | |
420 | UINT64 f15[2];\r | |
421 | UINT64 f16[2];\r | |
422 | UINT64 f17[2];\r | |
423 | UINT64 f18[2];\r | |
424 | UINT64 f19[2];\r | |
425 | UINT64 f20[2];\r | |
426 | UINT64 f21[2];\r | |
427 | UINT64 f22[2];\r | |
428 | UINT64 f23[2];\r | |
429 | UINT64 f24[2];\r | |
430 | UINT64 f25[2];\r | |
431 | UINT64 f26[2];\r | |
432 | UINT64 f27[2];\r | |
433 | UINT64 f28[2];\r | |
434 | UINT64 f29[2];\r | |
435 | UINT64 f30[2];\r | |
436 | UINT64 f31[2];\r | |
437 | } EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;\r | |
438 | \r | |
470d0b27 | 439 | ///\r |
440 | /// The processor save-state information for IA-32 and Itanium processors. If the optional floating\r | |
441 | /// point save is indicated for any handler, then this data structure must be preserved.\r | |
442 | ///\r | |
79964ac8 | 443 | typedef union {\r |
470d0b27 | 444 | /// \r |
445 | /// The optional floating point save-state information for IA-32 processors. \r | |
446 | ///\r | |
79964ac8 | 447 | EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;\r |
470d0b27 | 448 | ///\r |
449 | /// The optional floating point save-state information for Itanium processors. \r | |
450 | ///\r | |
79964ac8 | 451 | EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;\r |
452 | } EFI_SMM_FLOATING_POINT_SAVE_STATE;\r | |
453 | \r | |
454 | /**\r | |
455 | This function is the main entry point for an SMM handler dispatch\r | |
456 | or communicate-based callback.\r | |
457 | \r | |
458 | @param SmmImageHandle A unique value returned by the SMM infrastructure\r | |
459 | in response to registration for a communicate-based callback or dispatch.\r | |
460 | @param CommunicationBuffer\r | |
461 | An optional buffer that will be populated\r | |
462 | by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)\r | |
463 | invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.\r | |
464 | @param SourceSize If CommunicationBuffer is non-NULL, this field\r | |
465 | indicates the size of the data payload in this buffer.\r | |
466 | \r | |
467 | @return Status Code\r | |
468 | \r | |
469 | **/\r | |
470 | typedef\r | |
471 | EFI_STATUS\r | |
69686d56 | 472 | (EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT)(\r |
79964ac8 | 473 | IN EFI_HANDLE SmmImageHandle,\r |
474 | IN OUT VOID *CommunicationBuffer OPTIONAL,\r | |
475 | IN OUT UINTN *SourceSize OPTIONAL\r | |
476 | );\r | |
477 | \r | |
478 | /**\r | |
479 | The SmmInstallConfigurationTable() function is used to maintain the list\r | |
480 | of configuration tables that are stored in the System Management System\r | |
481 | Table. The list is stored as an array of (GUID, Pointer) pairs. The list\r | |
482 | must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.\r | |
483 | \r | |
484 | @param SystemTable A pointer to the SMM System Table.\r | |
485 | @param Guid A pointer to the GUID for the entry to add, update, or remove.\r | |
486 | @param Table A pointer to the buffer of the table to add.\r | |
487 | @param TableSize The size of the table to install.\r | |
488 | \r | |
489 | @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.\r | |
490 | @retval EFI_INVALID_PARAMETER Guid is not valid.\r | |
491 | @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.\r | |
492 | @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.\r | |
493 | \r | |
494 | **/\r | |
495 | typedef\r | |
496 | EFI_STATUS\r | |
69686d56 | 497 | (EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE)(\r |
79964ac8 | 498 | IN EFI_SMM_SYSTEM_TABLE *SystemTable,\r |
499 | IN EFI_GUID *Guid,\r | |
500 | IN VOID *Table,\r | |
501 | IN UINTN TableSize\r | |
502 | );\r | |
503 | \r | |
504 | //\r | |
505 | // System Management System Table (SMST)\r | |
506 | //\r | |
507 | struct _EFI_SMM_SYSTEM_TABLE {\r | |
470d0b27 | 508 | ///\r |
509 | /// The table header for the System Management System Table (SMST). \r | |
510 | ///\r | |
79964ac8 | 511 | EFI_TABLE_HEADER Hdr;\r |
512 | \r | |
470d0b27 | 513 | ///\r |
514 | /// A pointer to a NULL-terminated Unicode string containing the vendor name. It is\r | |
515 | /// permissible for this pointer to be NULL.\r | |
516 | ///\r | |
79964ac8 | 517 | CHAR16 *SmmFirmwareVendor;\r |
470d0b27 | 518 | ///\r |
519 | /// The particular revision of the firmware.\r | |
520 | ///\r | |
79964ac8 | 521 | UINT32 SmmFirmwareRevision;\r |
522 | \r | |
470d0b27 | 523 | ///\r |
524 | /// Adds, updates, or removes a configuration table entry from the SMST. \r | |
525 | ///\r | |
79964ac8 | 526 | EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;\r |
527 | \r | |
528 | //\r | |
529 | // I/O Services\r | |
530 | //\r | |
470d0b27 | 531 | ///\r |
532 | /// A GUID that designates the particular CPU I/O services. \r | |
533 | ///\r | |
79964ac8 | 534 | EFI_GUID EfiSmmCpuIoGuid;\r |
470d0b27 | 535 | ///\r |
536 | /// Provides the basic memory and I/O interfaces that are used to abstract accesses to\r | |
537 | /// devices.\r | |
538 | ///\r | |
79964ac8 | 539 | EFI_SMM_CPU_IO_INTERFACE SmmIo;\r |
540 | \r | |
541 | //\r | |
542 | // Runtime memory service\r | |
543 | //\r | |
470d0b27 | 544 | ///\r |
545 | /// Allocates pool memory from SMRAM for IA-32 or runtime memory for the\r | |
546 | /// Itanium processor family.\r | |
547 | ///\r | |
79964ac8 | 548 | EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;\r |
470d0b27 | 549 | ///\r |
550 | /// Returns pool memory to the system. \r | |
551 | ///\r | |
79964ac8 | 552 | EFI_SMMCORE_FREE_POOL SmmFreePool;\r |
470d0b27 | 553 | ///\r |
554 | /// Allocates memory pages from the system. \r | |
555 | ///\r | |
79964ac8 | 556 | EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;\r |
470d0b27 | 557 | ///\r |
558 | /// Frees memory pages for the system.\r | |
559 | ///\r | |
79964ac8 | 560 | EFI_SMMCORE_FREE_PAGES SmmFreePages;\r |
561 | \r | |
562 | //\r | |
563 | // MP service\r | |
564 | //\r | |
565 | EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;\r | |
566 | \r | |
567 | //\r | |
568 | // CPU information records\r | |
569 | //\r | |
470d0b27 | 570 | ///\r |
571 | /// A 1-relative number between 1 and the NumberOfCpus field. This field designates\r | |
572 | /// which processor is executing the SMM infrastructure. This number also serves as an\r | |
573 | /// index into the CpuSaveState and CpuOptionalFloatingPointState\r | |
574 | /// fields.\r | |
575 | ///\r | |
79964ac8 | 576 | UINTN CurrentlyExecutingCpu;\r |
470d0b27 | 577 | ///\r |
578 | /// The number of EFI Configuration Tables in the buffer\r | |
579 | /// SmmConfigurationTable.\r | |
580 | ///\r | |
79964ac8 | 581 | UINTN NumberOfCpus;\r |
470d0b27 | 582 | ///\r |
583 | /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r | |
584 | /// NumberOfTableEntries.\r | |
585 | ///\r | |
79964ac8 | 586 | EFI_SMM_CPU_SAVE_STATE *CpuSaveState;\r |
470d0b27 | 587 | ///\r |
588 | /// A pointer to a catenation of the EFI_SMM_FLOATING_POINT_SAVE_STATE.\r | |
589 | /// The size of this entire table is NumberOfCpus* size of the\r | |
590 | /// EFI_SMM_FLOATING_POINT_SAVE_STATE. These fields are populated only if\r | |
591 | /// there is at least one SMM driver that has registered for a callback with the\r | |
592 | /// FloatingPointSave field in EFI_SMM_BASE_PROTOCOL.RegisterCallback() set to TRUE.\r | |
593 | ///\r | |
79964ac8 | 594 | EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;\r |
595 | \r | |
596 | //\r | |
597 | // Extensibility table\r | |
598 | //\r | |
470d0b27 | 599 | ///\r |
600 | /// The number of EFI Configuration Tables in the buffer\r | |
601 | /// SmmConfigurationTable.\r | |
602 | ///\r | |
79964ac8 | 603 | UINTN NumberOfTableEntries;\r |
470d0b27 | 604 | ///\r |
605 | /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r | |
606 | /// NumberOfTableEntries.\r | |
607 | ///\r | |
79964ac8 | 608 | EFI_CONFIGURATION_TABLE *SmmConfigurationTable;\r |
609 | };\r | |
610 | \r | |
611 | #endif\r |