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79964ac8 | 1 | /** @file\r |
8411f1c0 | 2 | This file declares Pci Host Bridge Resource Allocation Protocol which \r |
3 | Provides the basic interfaces to abstract a PCI host bridge resource allocation. This protocol is\r | |
4 | mandatory if the system includes PCI devices.\r | |
5 | \r | |
79964ac8 | 6 | Copyright (c) 2007, Intel Corporation\r |
7 | All rights reserved. This program and the accompanying materials\r | |
8 | are licensed and made available under the terms and conditions of the BSD License\r | |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
10 | http://opensource.org/licenses/bsd-license.php\r | |
11 | \r | |
12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
14 | \r | |
79964ac8 | 15 | @par Revision Reference:\r |
16 | This protocol is defined in Framework of EFI Pci Host Bridge Resource Allocation Protocol Spec\r | |
17 | Version 0.9\r | |
18 | \r | |
19 | **/\r | |
20 | \r | |
21 | #ifndef _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r | |
22 | #define _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r | |
23 | \r | |
b80fbe85 | 24 | #include <PiDxe.h>\r |
226b35a9 | 25 | #include <Protocol/PciRootBridgeIo.h>\r |
26 | \r | |
79964ac8 | 27 | #define EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GUID \\r |
28 | { 0xCF8034BE, 0x6768, 0x4d8b, {0xB7,0x39,0x7C,0xCE,0x68,0x3A,0x9F,0xBE }}\r | |
29 | \r | |
30 | \r | |
31 | typedef struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL;\r | |
32 | \r | |
33 | \r | |
34 | //\r | |
35 | // EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES\r | |
36 | //\r | |
37 | \r | |
38 | // If this bit is set, then the PCI Root Bridge does not\r | |
39 | // support separate windows for Non-prefetchable and Prefetchable\r | |
40 | // memory. A PCI bus driver needs to include requests for Prefetchable\r | |
41 | // memory in the Non-prefetchable memory pool.\r | |
42 | //\r | |
43 | #define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM 1\r | |
44 | \r | |
45 | //\r | |
46 | // If this bit is set, then the PCI Root Bridge supports\r | |
47 | // 64 bit memory windows. If this bit is not set,\r | |
48 | // the PCI bus driver needs to include requests for 64 bit\r | |
49 | // memory address in the corresponding 32 bit memory pool.\r | |
50 | //\r | |
51 | #define EFI_PCI_HOST_BRIDGE_MEM64_DECODE 2\r | |
52 | \r | |
d71479ca LG |
53 | typedef UINT64 EFI_RESOURCE_ALLOCATION_STATUS;\r |
54 | \r | |
55 | /// The request of this resource type could be fulfilled.\r | |
56 | #define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL\r | |
57 | \r | |
58 | /// The request of this resource type could not be fulfilled for its\r | |
59 | /// absence in the host bridge resource pool.\r | |
60 | #define EFI_RESOURCE_NOT_SATISFIED 0xFFFFFFFFFFFFFFFFULL\r | |
79964ac8 | 61 | \r |
62 | //\r | |
63 | // EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE\r | |
64 | //\r | |
65 | typedef enum {\r | |
66 | EfiPciHostBridgeBeginEnumeration,\r | |
67 | EfiPciHostBridgeBeginBusAllocation,\r | |
68 | EfiPciHostBridgeEndBusAllocation,\r | |
69 | EfiPciHostBridgeBeginResourceAllocation,\r | |
70 | EfiPciHostBridgeAllocateResources,\r | |
71 | EfiPciHostBridgeSetResources,\r | |
72 | EfiPciHostBridgeFreeResources,\r | |
73 | EfiPciHostBridgeEndResourceAllocation\r | |
74 | } EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;\r | |
75 | \r | |
76 | //\r | |
77 | // EfiPciHostBridgeBeginEnumeration\r | |
78 | // Reset the host bridge PCI apertures and internal data structures.\r | |
79 | // PCI enumerator should issue this notification before starting fresh\r | |
80 | // enumeration process. Enumeration cannot be restarted after sending\r | |
81 | // any other notification such as EfiPciHostBridgeBeginBusAllocation.\r | |
82 | //\r | |
83 | // EfiPciHostBridgeBeginBusAllocation\r | |
84 | // The bus allocation phase is about to begin. No specific action\r | |
85 | // is required here. This notification can be used to perform any\r | |
86 | // chipset specific programming.\r | |
87 | //\r | |
88 | // EfiPciHostBridgeEndBusAllocation\r | |
89 | // The bus allocation and bus programming phase is complete. No specific\r | |
90 | // action is required here. This notification can be used to perform any\r | |
91 | // chipset specific programming.\r | |
92 | //\r | |
93 | // EfiPciHostBridgeBeginResourceAllocation\r | |
94 | // The resource allocation phase is about to begin.No specific action is\r | |
95 | // required here. This notification can be used to perform any chipset specific programming.\r | |
96 | //\r | |
97 | // EfiPciHostBridgeAllocateResources\r | |
98 | // Allocate resources per previously submitted requests for all the PCI Root\r | |
99 | // Bridges. These resource settings are returned on the next call to\r | |
100 | // GetProposedResources().\r | |
101 | //\r | |
102 | // EfiPciHostBridgeSetResources\r | |
103 | // Program the Host Bridge hardware to decode previously allocated resources\r | |
104 | // (proposed resources) for all the PCI Root Bridges.\r | |
105 | //\r | |
106 | // EfiPciHostBridgeFreeResources\r | |
107 | // De-allocate previously allocated resources previously for all the PCI\r | |
108 | // Root Bridges and reset the I/O and memory apertures to initial state.\r | |
109 | //\r | |
110 | // EfiPciHostBridgeEndResourceAllocation\r | |
111 | // The resource allocation phase is completed. No specific action is required\r | |
112 | // here. This notification can be used to perform any chipset specific programming.\r | |
113 | \r | |
114 | \r | |
115 | \r | |
116 | //\r | |
117 | // EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE\r | |
118 | //\r | |
119 | typedef enum {\r | |
120 | EfiPciBeforeChildBusEnumeration,\r | |
121 | EfiPciBeforeResourceCollection\r | |
122 | } EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE;\r | |
123 | \r | |
124 | //\r | |
125 | // EfiPciBeforeChildBusEnumeration\r | |
126 | // This notification is only applicable to PCI-PCI bridges and\r | |
127 | // indicates that the PCI enumerator is about to begin enumerating\r | |
128 | // the bus behind the PCI-PCI Bridge. This notification is sent after\r | |
129 | // the primary bus number, the secondary bus number and the subordinate\r | |
130 | // bus number registers in the PCI-PCI Bridge are programmed to valid\r | |
131 | // (not necessary final) values\r | |
132 | //\r | |
133 | // EfiPciBeforeResourceCollection\r | |
134 | // This notification is sent before the PCI enumerator probes BAR registers\r | |
135 | // for every valid PCI function.\r | |
136 | //\r | |
137 | \r | |
138 | \r | |
139 | /**\r | |
140 | Enter a certain phase of the PCI enumeration process\r | |
141 | \r | |
142 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance\r | |
143 | @param Phase The phase during enumeration\r | |
144 | \r | |
145 | @retval EFI_SUCCESS Success\r | |
146 | @retval EFI_OUT_OF_RESOURCES If SubmitResources ( ) could not allocate resources\r | |
534b8251 | 147 | @retval EFI_INVALID_PARAMETER The Phase is invalid\r |
79964ac8 | 148 | @retval EFI_NOT_READY This phase cannot be entered at this time\r |
149 | @retval EFI_DEVICE_ERROR SetResources failed due to HW error.\r | |
150 | \r | |
151 | **/\r | |
152 | typedef\r | |
153 | EFI_STATUS\r | |
69686d56 | 154 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE)(\r |
79964ac8 | 155 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
156 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r | |
157 | );\r | |
158 | \r | |
159 | \r | |
160 | /**\r | |
161 | Return the device handle of the next PCI root bridge that is associated with\r | |
162 | this Host Bridge\r | |
163 | \r | |
164 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r | |
165 | @param RootBridgeHandle Returns the device handle of the next PCI Root Bridge.\r | |
166 | On input, it holds the RootBridgeHandle returned by the most\r | |
167 | recent call to GetNextRootBridge().The handle for the first\r | |
168 | PCI Root Bridge is returned if RootBridgeHandle is NULL on input\r | |
169 | \r | |
170 | @retval EFI_SUCCESS Success\r | |
171 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
534b8251 | 172 | @retval EFI_NOT_FOUND There are no more PCI root bridge device handles.\r |
79964ac8 | 173 | \r |
174 | **/\r | |
175 | typedef\r | |
176 | EFI_STATUS\r | |
69686d56 | 177 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE)(\r |
79964ac8 | 178 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
179 | IN OUT EFI_HANDLE *RootBridgeHandle\r | |
180 | );\r | |
181 | \r | |
182 | \r | |
183 | /**\r | |
184 | Returns the attributes of a PCI Root Bridge.\r | |
185 | \r | |
186 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r | |
187 | @param RootBridgeHandle The device handle of the PCI Root Bridge\r | |
188 | that the caller is interested in\r | |
189 | @param Attribute The pointer to attributes of the PCI Root Bridge\r | |
190 | \r | |
191 | @retval EFI_SUCCESS Success\r | |
192 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
193 | @retval EFI_INVALID_PARAMETER Attributes is NULL\r | |
194 | \r | |
195 | **/\r | |
196 | typedef\r | |
197 | EFI_STATUS\r | |
69686d56 | 198 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES)(\r |
79964ac8 | 199 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
200 | IN EFI_HANDLE RootBridgeHandle,\r | |
201 | OUT UINT64 *Attributes\r | |
202 | );\r | |
203 | \r | |
204 | \r | |
205 | /**\r | |
206 | This is the request from the PCI enumerator to set up\r | |
207 | the specified PCI Root Bridge for bus enumeration process.\r | |
208 | \r | |
209 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r | |
210 | @param RootBridgeHandle The PCI Root Bridge to be set up\r | |
211 | @param Configuration Pointer to the pointer to the PCI bus resource descriptor\r | |
212 | \r | |
213 | @retval EFI_SUCCESS Success\r | |
214 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
215 | @retval EFI_DEVICE_ERROR Request failed due to hardware error\r | |
216 | @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources\r | |
217 | \r | |
218 | **/\r | |
219 | typedef\r | |
220 | EFI_STATUS\r | |
69686d56 | 221 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION)(\r |
79964ac8 | 222 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
223 | IN EFI_HANDLE RootBridgeHandle,\r | |
224 | OUT VOID **Configuration\r | |
225 | );\r | |
226 | \r | |
227 | \r | |
228 | /**\r | |
229 | This function programs the PCI Root Bridge hardware so that\r | |
230 | it decodes the specified PCI bus range\r | |
231 | \r | |
232 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r | |
233 | @param RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed\r | |
234 | @param Configuration The pointer to the PCI bus resource descriptor\r | |
235 | \r | |
236 | @retval EFI_SUCCESS Success\r | |
237 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
238 | @retval EFI_INVALID_PARAMETER Configuration is NULL\r | |
239 | @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI resource descriptor\r | |
240 | @retval EFI_INVALID_PARAMETER Configuration contains one or more memory or IO ACPI resource descriptor\r | |
241 | @retval EFI_INVALID_PARAMETER Address Range Minimum or Address Range Length fields in Configuration\r | |
242 | are invalid for this Root Bridge.\r | |
243 | @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptor\r | |
244 | @retval EFI_DEVICE_ERROR Request failed due to hardware error\r | |
245 | @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources\r | |
246 | \r | |
247 | **/\r | |
248 | typedef\r | |
249 | EFI_STATUS\r | |
69686d56 | 250 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS)(\r |
79964ac8 | 251 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
252 | IN EFI_HANDLE RootBridgeHandle,\r | |
253 | IN VOID *Configuration\r | |
254 | );\r | |
255 | \r | |
256 | \r | |
257 | /**\r | |
258 | Submits the I/O and memory resource requirements for the specified PCI Root Bridge\r | |
259 | \r | |
260 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r | |
261 | @param RootBridgeHandle The PCI Root Bridge whose I/O and memory resource requirements\r | |
262 | are being submitted\r | |
263 | @param Configuration The pointer to the PCI I/O and PCI memory resource descriptor\r | |
264 | \r | |
265 | @retval EFI_SUCCESS Success\r | |
266 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
267 | @retval EFI_INVALID_PARAMETER Configuration is NULL\r | |
268 | @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI resource descriptor\r | |
269 | @retval EFI_INVALID_PARAMETER Configuration includes a resource descriptor of unsupported type\r | |
534b8251 | 270 | \r |
79964ac8 | 271 | **/\r |
272 | typedef\r | |
273 | EFI_STATUS\r | |
69686d56 | 274 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES)(\r |
79964ac8 | 275 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
276 | IN EFI_HANDLE RootBridgeHandle,\r | |
277 | IN VOID *Configuration\r | |
278 | );\r | |
279 | \r | |
280 | \r | |
281 | /**\r | |
282 | This function returns the proposed resource settings for the specified\r | |
283 | PCI Root Bridge\r | |
284 | \r | |
285 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r | |
286 | @param RootBridgeHandle The PCI Root Bridge handle\r | |
287 | @param Configuration The pointer to the pointer to the PCI I/O\r | |
288 | and memory resource descriptor\r | |
289 | \r | |
290 | @retval EFI_SUCCESS Success\r | |
291 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
292 | @retval EFI_DEVICE_ERROR Request failed due to hardware error\r | |
293 | @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources\r | |
294 | \r | |
295 | **/\r | |
296 | typedef\r | |
297 | EFI_STATUS\r | |
69686d56 | 298 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES)(\r |
79964ac8 | 299 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
300 | IN EFI_HANDLE RootBridgeHandle,\r | |
301 | OUT VOID **Configuration\r | |
302 | );\r | |
303 | \r | |
304 | \r | |
305 | \r | |
306 | /**\r | |
307 | This function is called for all the PCI controllers that the PCI\r | |
308 | bus driver finds. Can be used to Preprogram the controller.\r | |
309 | \r | |
310 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r | |
311 | @param RootBridgeHandle The PCI Root Bridge handle\r | |
312 | @param PciBusAddress Address of the controller on the PCI bus\r | |
313 | @param Phase The Phase during resource allocation\r | |
314 | \r | |
315 | @retval EFI_SUCCESS Success\r | |
316 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
317 | @retval EFI_DEVICE_ERROR Device pre-initialization failed due to hardware error.\r | |
318 | \r | |
319 | **/\r | |
320 | typedef\r | |
321 | EFI_STATUS\r | |
69686d56 | 322 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER)(\r |
79964ac8 | 323 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
324 | IN EFI_HANDLE RootBridgeHandle,\r | |
325 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r | |
326 | IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r | |
327 | );\r | |
328 | \r | |
329 | /**\r | |
330 | @par Protocol Description:\r | |
331 | Provides the basic interfaces to abstract a PCI host bridge resource allocation.\r | |
332 | \r | |
333 | @param NotifyPhase\r | |
334 | The notification from the PCI bus enumerator that it is about to enter\r | |
335 | a certain phase during the enumeration process.\r | |
336 | \r | |
337 | @param GetNextRootBridge\r | |
338 | Retrieves the device handle for the next PCI root bridge that is produced by the\r | |
339 | host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached.\r | |
340 | \r | |
341 | @param GetAllocAttributes\r | |
342 | Retrieves the allocation-related attributes of a PCI root bridge.\r | |
343 | \r | |
344 | @param StartBusEnumeration\r | |
345 | Sets up a PCI root bridge for bus enumeration.\r | |
346 | \r | |
347 | @param SetBusNumbers\r | |
348 | Sets up the PCI root bridge so that it decodes a specific range of bus numbers.\r | |
349 | \r | |
350 | @param SubmitResources\r | |
351 | Submits the resource requirements for the specified PCI root bridge.\r | |
352 | \r | |
353 | @param GetProposedResources\r | |
354 | Returns the proposed resource assignment for the specified PCI root bridges.\r | |
355 | \r | |
356 | @param PreprocessController\r | |
357 | Provides hooks from the PCI bus driver to every PCI controller\r | |
358 | (device/function) at various stages of the PCI enumeration process that\r | |
359 | allow the host bridge driver to preinitialize individual PCI controllers\r | |
360 | before enumeration.\r | |
361 | \r | |
362 | **/\r | |
363 | struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL {\r | |
364 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE NotifyPhase;\r | |
365 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE GetNextRootBridge;\r | |
366 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES GetAllocAttributes;\r | |
367 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION StartBusEnumeration;\r | |
368 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS SetBusNumbers;\r | |
369 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES SubmitResources;\r | |
370 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES GetProposedResources;\r | |
371 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER PreprocessController;\r | |
372 | };\r | |
373 | \r | |
374 | extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid;\r | |
375 | \r | |
376 | #endif\r |