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79964ac8 | 1 | /** @file\r |
8411f1c0 | 2 | This file declares Pci Host Bridge Resource Allocation Protocol which \r |
9ca1b12e | 3 | Provides the basic interfaces to abstract a PCI host bridge resource allocation. \r |
4 | This protocol is mandatory if the system includes PCI devices.\r | |
8411f1c0 | 5 | \r |
2bbaeb0d | 6 | Copyright (c) 2007 - 2009, Intel Corporation\r |
79964ac8 | 7 | All rights reserved. This program and the accompanying materials\r |
8 | are licensed and made available under the terms and conditions of the BSD License\r | |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
10 | http://opensource.org/licenses/bsd-license.php\r | |
11 | \r | |
12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
14 | \r | |
79964ac8 | 15 | @par Revision Reference:\r |
16 | This protocol is defined in Framework of EFI Pci Host Bridge Resource Allocation Protocol Spec\r | |
17 | Version 0.9\r | |
18 | \r | |
19 | **/\r | |
20 | \r | |
21 | #ifndef _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r | |
22 | #define _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r | |
23 | \r | |
b80fbe85 | 24 | #include <PiDxe.h>\r |
226b35a9 | 25 | #include <Protocol/PciRootBridgeIo.h>\r |
26 | \r | |
79964ac8 | 27 | #define EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GUID \\r |
28 | { 0xCF8034BE, 0x6768, 0x4d8b, {0xB7,0x39,0x7C,0xCE,0x68,0x3A,0x9F,0xBE }}\r | |
29 | \r | |
30 | \r | |
31 | typedef struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL;\r | |
32 | \r | |
33 | \r | |
34 | //\r | |
35 | // EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES\r | |
36 | //\r | |
37 | \r | |
2bbaeb0d | 38 | /// If this bit is set, then the PCI Root Bridge does not\r |
39 | /// support separate windows for Non-prefetchable and Prefetchable\r | |
40 | /// memory. A PCI bus driver needs to include requests for Prefetchable\r | |
41 | /// memory in the Non-prefetchable memory pool.\r | |
42 | ///\r | |
79964ac8 | 43 | #define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM 1\r |
44 | \r | |
2bbaeb0d | 45 | ///\r |
46 | /// If this bit is set, then the PCI Root Bridge supports\r | |
47 | /// 64 bit memory windows. If this bit is not set,\r | |
48 | /// the PCI bus driver needs to include requests for 64 bit\r | |
49 | /// memory address in the corresponding 32 bit memory pool.\r | |
50 | ///\r | |
79964ac8 | 51 | #define EFI_PCI_HOST_BRIDGE_MEM64_DECODE 2\r |
52 | \r | |
d71479ca LG |
53 | typedef UINT64 EFI_RESOURCE_ALLOCATION_STATUS;\r |
54 | \r | |
9ca1b12e | 55 | ///\r |
d71479ca | 56 | /// The request of this resource type could be fulfilled.\r |
9ca1b12e | 57 | ///\r |
d71479ca LG |
58 | #define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL\r |
59 | \r | |
9ca1b12e | 60 | ///\r |
d71479ca LG |
61 | /// The request of this resource type could not be fulfilled for its\r |
62 | /// absence in the host bridge resource pool.\r | |
9ca1b12e | 63 | ///\r |
d71479ca | 64 | #define EFI_RESOURCE_NOT_SATISFIED 0xFFFFFFFFFFFFFFFFULL\r |
79964ac8 | 65 | \r |
66 | //\r | |
67 | // EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE\r | |
68 | //\r | |
69 | typedef enum {\r | |
2bbaeb0d | 70 | ///\r |
71 | /// Reset the host bridge PCI apertures and internal data structures.\r | |
72 | /// PCI enumerator should issue this notification before starting fresh\r | |
73 | /// enumeration process. Enumeration cannot be restarted after sending\r | |
74 | /// any other notification such as EfiPciHostBridgeBeginBusAllocation.\r | |
75 | ///\r | |
79964ac8 | 76 | EfiPciHostBridgeBeginEnumeration,\r |
2bbaeb0d | 77 | \r |
78 | ///\r | |
79 | /// The bus allocation phase is about to begin. No specific action\r | |
80 | /// is required here. This notification can be used to perform any\r | |
81 | /// chipset specific programming. \r | |
82 | ///\r | |
79964ac8 | 83 | EfiPciHostBridgeBeginBusAllocation,\r |
2bbaeb0d | 84 | \r |
85 | ///\r | |
86 | /// The bus allocation and bus programming phase is complete. No specific\r | |
87 | /// action is required here. This notification can be used to perform any\r | |
88 | /// chipset specific programming. \r | |
89 | ///\r | |
79964ac8 | 90 | EfiPciHostBridgeEndBusAllocation,\r |
2bbaeb0d | 91 | \r |
92 | ///\r | |
93 | /// The resource allocation phase is about to begin.No specific action is\r | |
94 | /// required here. This notification can be used to perform any chipset specific programming. \r | |
95 | ///\r | |
79964ac8 | 96 | EfiPciHostBridgeBeginResourceAllocation,\r |
2bbaeb0d | 97 | \r |
98 | ///\r | |
99 | /// Allocate resources per previously submitted requests for all the PCI Root\r | |
100 | /// Bridges. These resource settings are returned on the next call to\r | |
101 | /// GetProposedResources(). \r | |
102 | ///\r | |
79964ac8 | 103 | EfiPciHostBridgeAllocateResources,\r |
2bbaeb0d | 104 | \r |
105 | ///\r | |
106 | /// Program the Host Bridge hardware to decode previously allocated resources\r | |
107 | /// (proposed resources) for all the PCI Root Bridges.\r | |
108 | ///\r | |
79964ac8 | 109 | EfiPciHostBridgeSetResources,\r |
2bbaeb0d | 110 | \r |
111 | ///\r | |
112 | /// De-allocate previously allocated resources previously for all the PCI\r | |
113 | /// Root Bridges and reset the I/O and memory apertures to initial state. \r | |
114 | ///\r | |
79964ac8 | 115 | EfiPciHostBridgeFreeResources,\r |
2bbaeb0d | 116 | \r |
117 | ///\r | |
118 | /// The resource allocation phase is completed. No specific action is required\r | |
119 | /// here. This notification can be used to perform any chipset specific programming. \r | |
120 | ///\r | |
79964ac8 | 121 | EfiPciHostBridgeEndResourceAllocation\r |
122 | } EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;\r | |
123 | \r | |
2bbaeb0d | 124 | ///\r |
9ca1b12e | 125 | /// Definitions of 2 notification points.\r |
2bbaeb0d | 126 | ///\r |
79964ac8 | 127 | typedef enum {\r |
2bbaeb0d | 128 | ///\r |
129 | /// This notification is only applicable to PCI-PCI bridges and\r | |
130 | /// indicates that the PCI enumerator is about to begin enumerating\r | |
131 | /// the bus behind the PCI-PCI Bridge. This notification is sent after\r | |
132 | /// the primary bus number, the secondary bus number and the subordinate\r | |
133 | /// bus number registers in the PCI-PCI Bridge are programmed to valid\r | |
134 | /// (not necessary final) values\r | |
135 | ///\r | |
79964ac8 | 136 | EfiPciBeforeChildBusEnumeration,\r |
2bbaeb0d | 137 | \r |
138 | ///\r | |
139 | /// This notification is sent before the PCI enumerator probes BAR registers\r | |
140 | /// for every valid PCI function. \r | |
141 | ///\r | |
79964ac8 | 142 | EfiPciBeforeResourceCollection\r |
143 | } EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE;\r | |
144 | \r | |
79964ac8 | 145 | /**\r |
9ca1b12e | 146 | These are the notifications from the PCI bus driver that it is about to enter a certain phase of the PCI \r |
147 | enumeration process.\r | |
79964ac8 | 148 | \r |
9ca1b12e | 149 | @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r |
150 | instance.\r | |
79964ac8 | 151 | @param Phase The phase during enumeration\r |
152 | \r | |
9ca1b12e | 153 | @retval EFI_SUCCESS The notification was accepted without any errors.\r |
154 | @retval EFI_INVALID_PARAMETER The Phase is invalid.\r | |
155 | @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error \r | |
156 | is valid for a Phase of EfiPciHostBridgeAllocateResources if \r | |
157 | SubmitResources() has not been called for one or more \r | |
158 | PCI root bridges before this call.\r | |
159 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid for \r | |
160 | a Phase of EfiPciHostBridgeSetResources.\r | |
161 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. \r | |
162 | This error is valid for a Phase of EfiPciHostBridgeAllocateResources\r | |
163 | if the previously submitted resource requests cannot be fulfilled or were only \r | |
164 | partially fulfilled\r | |
79964ac8 | 165 | \r |
166 | **/\r | |
167 | typedef\r | |
168 | EFI_STATUS\r | |
69686d56 | 169 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE)(\r |
79964ac8 | 170 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
171 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r | |
172 | );\r | |
173 | \r | |
174 | \r | |
175 | /**\r | |
9ca1b12e | 176 | Returns the device handle of the next PCI root bridge that is associated with this host bridge.\r |
79964ac8 | 177 | \r |
9ca1b12e | 178 | @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r |
179 | instance.\r | |
180 | @param RootBridgeHandle Returns the device handle of the next PCI root bridge. On input, it holds the \r | |
181 | RootBridgeHandle that was returned by the most recent call to \r | |
182 | GetNextRootBridge(). If RootBridgeHandle is NULL on input, the handle \r | |
183 | for the first PCI root bridge is returned.\r | |
79964ac8 | 184 | \r |
9ca1b12e | 185 | @retval EFI_SUCCESS The requested attribute information was returned.\r |
186 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was returned \r | |
187 | on a previous call to GetNextRootBridge().\r | |
188 | @retval EFI_NOT_FOUND There are no more PCI root bridge device handles.\r | |
79964ac8 | 189 | \r |
190 | **/\r | |
191 | typedef\r | |
192 | EFI_STATUS\r | |
69686d56 | 193 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE)(\r |
79964ac8 | 194 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
195 | IN OUT EFI_HANDLE *RootBridgeHandle\r | |
196 | );\r | |
197 | \r | |
198 | \r | |
199 | /**\r | |
9ca1b12e | 200 | Returns the allocation attributes of a PCI root bridge.\r |
79964ac8 | 201 | \r |
9ca1b12e | 202 | @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r |
203 | instance.\r | |
204 | @param RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested.\r | |
205 | @param Attribute The pointer to attributes of the PCI root bridge.\r | |
79964ac8 | 206 | \r |
9ca1b12e | 207 | @retval EFI_SUCCESS The requested attribute information was returned.\r |
208 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
209 | @retval EFI_INVALID_PARAMETER Attributes is NULL.\r | |
79964ac8 | 210 | \r |
211 | **/\r | |
212 | typedef\r | |
213 | EFI_STATUS\r | |
69686d56 | 214 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES)(\r |
79964ac8 | 215 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
216 | IN EFI_HANDLE RootBridgeHandle,\r | |
217 | OUT UINT64 *Attributes\r | |
218 | );\r | |
219 | \r | |
220 | \r | |
221 | /**\r | |
9ca1b12e | 222 | Sets up the specified PCI root bridge for the bus enumeration process.\r |
79964ac8 | 223 | \r |
9ca1b12e | 224 | @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r |
225 | instance.\r | |
226 | @param RootBridgeHandle The PCI root bridge to be set up.\r | |
227 | @param Configuration Pointer to the pointer to the PCI bus resource descriptor.\r | |
79964ac8 | 228 | \r |
9ca1b12e | 229 | @retval EFI_SUCCESS The PCI root bridge was set up and the bus range was returned in \r |
230 | Configuration.\r | |
231 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
232 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r | |
233 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
79964ac8 | 234 | \r |
235 | **/\r | |
236 | typedef\r | |
237 | EFI_STATUS\r | |
69686d56 | 238 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION)(\r |
79964ac8 | 239 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
240 | IN EFI_HANDLE RootBridgeHandle,\r | |
241 | OUT VOID **Configuration\r | |
242 | );\r | |
243 | \r | |
244 | \r | |
245 | /**\r | |
9ca1b12e | 246 | Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.\r |
79964ac8 | 247 | \r |
9ca1b12e | 248 | @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r |
249 | instance. \r | |
250 | @param RootBridgeHandle The PCI root bridge whose bus range is to be programmed.\r | |
251 | @param Configuration The pointer to the PCI bus resource descriptor..\r | |
79964ac8 | 252 | \r |
9ca1b12e | 253 | @retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.\r |
254 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
79964ac8 | 255 | @retval EFI_INVALID_PARAMETER Configuration is NULL\r |
9ca1b12e | 256 | @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI (2.0 & 3.0) \r |
257 | resource descriptor.\r | |
258 | @retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource\r | |
259 | descriptor.\r | |
260 | @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI (2.0 & 3.0) resource \r | |
261 | descriptors other than bus descriptors.\r | |
262 | @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource \r | |
263 | descriptors.\r | |
264 | @retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.\r | |
265 | @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.\r | |
266 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r | |
79964ac8 | 267 | \r |
268 | **/\r | |
269 | typedef\r | |
270 | EFI_STATUS\r | |
69686d56 | 271 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS)(\r |
79964ac8 | 272 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
273 | IN EFI_HANDLE RootBridgeHandle,\r | |
274 | IN VOID *Configuration\r | |
275 | );\r | |
276 | \r | |
277 | \r | |
278 | /**\r | |
9ca1b12e | 279 | Submits the I/O and memory resource requirements for the specified PCI root bridge.\r |
280 | \r | |
281 | @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r | |
282 | instance.\r | |
283 | @param RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being \r | |
284 | submitted.\r | |
285 | @param Configuration The pointer to the PCI I/O and PCI memory resource descriptor.\r | |
286 | \r | |
287 | @retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were \r | |
288 | accepted.\r | |
289 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
290 | @retval EFI_INVALID_PARAMETER Configuration is NULL.\r | |
291 | @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI (2.0 & 3.0) \r | |
292 | resource descriptor.\r | |
293 | @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource \r | |
294 | types that are not supported by this PCI root bridge. This error will \r | |
295 | happen if the caller did not combine resources according to \r | |
296 | Attributes that were returned by GetAllocAttributes().\r | |
297 | @retval EFI_INVALID_PARAMETER "Address Range Maximum" is invalid.\r | |
298 | @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.\r | |
299 | @retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.\r | |
534b8251 | 300 | \r |
79964ac8 | 301 | **/\r |
302 | typedef\r | |
303 | EFI_STATUS\r | |
69686d56 | 304 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES)(\r |
79964ac8 | 305 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
306 | IN EFI_HANDLE RootBridgeHandle,\r | |
307 | IN VOID *Configuration\r | |
308 | );\r | |
309 | \r | |
310 | \r | |
311 | /**\r | |
9ca1b12e | 312 | Returns the proposed resource settings for the specified PCI root bridge.\r |
79964ac8 | 313 | \r |
9ca1b12e | 314 | @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r |
315 | instance.\r | |
316 | @param RootBridgeHandle The PCI root bridge handle.\r | |
317 | @param Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.\r | |
79964ac8 | 318 | \r |
9ca1b12e | 319 | @retval EFI_SUCCESS The requested parameters were returned.\r |
320 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
321 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r | |
322 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
79964ac8 | 323 | \r |
324 | **/\r | |
325 | typedef\r | |
326 | EFI_STATUS\r | |
69686d56 | 327 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES)(\r |
79964ac8 | 328 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
329 | IN EFI_HANDLE RootBridgeHandle,\r | |
330 | OUT VOID **Configuration\r | |
331 | );\r | |
332 | \r | |
333 | \r | |
334 | \r | |
335 | /**\r | |
9ca1b12e | 336 | Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various \r |
337 | stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual \r | |
338 | PCI controllers before enumeration.\r | |
339 | \r | |
340 | @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r | |
341 | @param RootBridgeHandle The associated PCI root bridge handle.\r | |
342 | @param PciAddress The address of the PCI device on the PCI bus.\r | |
343 | @param Phase The phase of the PCI device enumeration.\r | |
344 | \r | |
345 | @retval EFI_SUCCESS The requested parameters were returned.\r | |
346 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
347 | @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in \r | |
348 | EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.\r | |
349 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator \r | |
350 | should not enumerate this device, including its child devices if it is \r | |
351 | a PCI-to-PCI bridge.\r | |
79964ac8 | 352 | \r |
353 | **/\r | |
354 | typedef\r | |
355 | EFI_STATUS\r | |
69686d56 | 356 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER)(\r |
79964ac8 | 357 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
358 | IN EFI_HANDLE RootBridgeHandle,\r | |
359 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r | |
360 | IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r | |
361 | );\r | |
362 | \r | |
9ca1b12e | 363 | ///\r |
364 | /// Provides the basic interfaces to abstract a PCI host bridge resource allocation.\r | |
365 | ///\r | |
79964ac8 | 366 | struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL {\r |
2bbaeb0d | 367 | ///\r |
368 | /// The notification from the PCI bus enumerator that it is about to enter\r | |
369 | /// a certain phase during the enumeration process.\r | |
370 | ///\r | |
79964ac8 | 371 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE NotifyPhase;\r |
2bbaeb0d | 372 | \r |
373 | ///\r | |
374 | /// Retrieves the device handle for the next PCI root bridge that is produced by the\r | |
375 | /// host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached. \r | |
376 | ///\r | |
79964ac8 | 377 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE GetNextRootBridge;\r |
2bbaeb0d | 378 | \r |
379 | ///\r | |
380 | /// Retrieves the allocation-related attributes of a PCI root bridge.\r | |
381 | ///\r | |
79964ac8 | 382 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES GetAllocAttributes;\r |
2bbaeb0d | 383 | \r |
384 | ///\r | |
385 | /// Sets up a PCI root bridge for bus enumeration.\r | |
386 | ///\r | |
79964ac8 | 387 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION StartBusEnumeration;\r |
2bbaeb0d | 388 | \r |
389 | ///\r | |
390 | /// Sets up the PCI root bridge so that it decodes a specific range of bus numbers.\r | |
391 | ///\r | |
79964ac8 | 392 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS SetBusNumbers;\r |
2bbaeb0d | 393 | \r |
394 | ///\r | |
395 | /// Submits the resource requirements for the specified PCI root bridge.\r | |
396 | ///\r | |
79964ac8 | 397 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES SubmitResources;\r |
2bbaeb0d | 398 | \r |
399 | ///\r | |
400 | /// Returns the proposed resource assignment for the specified PCI root bridges.\r | |
401 | ///\r | |
79964ac8 | 402 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES GetProposedResources;\r |
2bbaeb0d | 403 | \r |
404 | ///\r | |
405 | /// Provides hooks from the PCI bus driver to every PCI controller\r | |
406 | /// (device/function) at various stages of the PCI enumeration process that\r | |
407 | /// allow the host bridge driver to preinitialize individual PCI controllers\r | |
408 | /// before enumeration. \r | |
409 | ///\r | |
79964ac8 | 410 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER PreprocessController;\r |
411 | };\r | |
412 | \r | |
413 | extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid;\r | |
414 | \r | |
415 | #endif\r |