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79964ac8 | 1 | /** @file\r |
5259c97d | 2 | This file declares the SMM Control abstraction protocol.\r |
3 | This protocol is used to initiate SMI/PMI activations. This protocol could be published by either:\r | |
8411f1c0 | 4 | - A processor driver to abstract the SMI/PMI IPI\r |
5 | - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r | |
0b34b869 | 6 | Intel chipset\r |
8411f1c0 | 7 | Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r |
5259c97d | 8 | event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based\r |
8411f1c0 | 9 | systems.\r |
79964ac8 | 10 | \r |
2b3687db | 11 | Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r |
f22f941e | 12 | This program and the accompanying materials are licensed and made available under \r |
13 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
14 | The full text of the license may be found at\r | |
15 | http://opensource.org/licenses/bsd-license.php. \r | |
16 | \r | |
17 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
18 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
79964ac8 | 19 | \r |
79964ac8 | 20 | @par Revision Reference:\r |
21 | This Protocol is defined in Framework of EFI SMM Core Interface Spec\r | |
22 | Version 0.9.\r | |
23 | \r | |
24 | **/\r | |
25 | \r | |
26 | #ifndef _SMM_CONTROL_H_\r | |
27 | #define _SMM_CONTROL_H_\r | |
28 | \r | |
b80fbe85 | 29 | \r |
79964ac8 | 30 | typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL;\r |
31 | \r | |
32 | #define EFI_SMM_CONTROL_PROTOCOL_GUID \\r | |
33 | { \\r | |
34 | 0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \\r | |
35 | }\r | |
700a7869 | 36 | //\r |
79964ac8 | 37 | // SMM Access specification Data Structures\r |
38 | //\r | |
39 | typedef struct {\r | |
412fb9ef | 40 | /// \r |
41 | /// Describes the I/O location of the particular port that engendered the synchronous\r | |
42 | /// SMI. For example, this location can include but is not limited to the traditional \r | |
43 | /// PCAT* APM port of 0B2h.\r | |
44 | ///\r | |
79964ac8 | 45 | UINT8 SmiTriggerRegister;\r |
412fb9ef | 46 | ///\r |
47 | /// Describes the value that was written to the respective activation port.\r | |
48 | ///\r | |
79964ac8 | 49 | UINT8 SmiDataRegister;\r |
50 | } EFI_SMM_CONTROL_REGISTER;\r | |
51 | \r | |
52 | //\r | |
53 | // SMM Control specification member function\r | |
54 | //\r | |
55 | /**\r | |
56 | Invokes SMI activation from either the preboot or runtime environment.\r | |
57 | \r | |
58 | @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r | |
f22f941e | 59 | @param ArgumentBuffer The optional sized data to pass into the protocol activation.\r |
60 | @param ArgumentBufferSize The optional size of the data.\r | |
61 | @param Periodic An optional mechanism to periodically repeat activation.\r | |
62 | @param ActivationInterval An optional parameter to repeat at this period one\r | |
79964ac8 | 63 | time or, if the Periodic Boolean is set, periodically.\r |
64 | \r | |
65 | @retval EFI_SUCCESS The SMI/PMI has been engendered.\r | |
66 | @retval EFI_DEVICE_ERROR The timing is unsupported.\r | |
67 | @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r | |
68 | @retval EFI_NOT_STARTED The SMM base service has not been initialized.\r | |
69 | \r | |
70 | **/\r | |
71 | typedef\r | |
72 | EFI_STATUS\r | |
69686d56 | 73 | (EFIAPI *EFI_SMM_ACTIVATE)(\r |
79964ac8 | 74 | IN EFI_SMM_CONTROL_PROTOCOL *This,\r |
75 | IN OUT INT8 *ArgumentBuffer OPTIONAL,\r | |
76 | IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r | |
77 | IN BOOLEAN Periodic OPTIONAL,\r | |
78 | IN UINTN ActivationInterval OPTIONAL\r | |
79 | );\r | |
80 | \r | |
81 | /**\r | |
82 | Clears any system state that was created in response to the Active call.\r | |
83 | \r | |
84 | @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r | |
700a7869 | 85 | @param Periodic Optional parameter to repeat at this period one \r |
86 | time or, if the Periodic Boolean is set, periodically.\r | |
79964ac8 | 87 | \r |
88 | @retval EFI_SUCCESS The SMI/PMI has been engendered.\r | |
89 | @retval EFI_DEVICE_ERROR The source could not be cleared.\r | |
90 | @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r | |
91 | \r | |
92 | **/\r | |
93 | typedef\r | |
94 | EFI_STATUS\r | |
69686d56 | 95 | (EFIAPI *EFI_SMM_DEACTIVATE)(\r |
79964ac8 | 96 | IN EFI_SMM_CONTROL_PROTOCOL *This,\r |
97 | IN BOOLEAN Periodic OPTIONAL\r | |
98 | );\r | |
99 | \r | |
100 | /**\r | |
101 | Provides information on the source register used to generate the SMI.\r | |
102 | \r | |
103 | @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r | |
f22f941e | 104 | @param SmiRegister A pointer to the SMI register description structure.\r |
79964ac8 | 105 | \r |
106 | @retval EFI_SUCCESS The register structure has been returned.\r | |
412fb9ef | 107 | @retval EFI_DEVICE_ERROR The source could not be cleared.\r |
108 | @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r | |
79964ac8 | 109 | \r |
110 | **/\r | |
111 | typedef\r | |
112 | EFI_STATUS\r | |
69686d56 | 113 | (EFIAPI *EFI_SMM_GET_REGISTER_INFO)(\r |
79964ac8 | 114 | IN EFI_SMM_CONTROL_PROTOCOL *This,\r |
115 | IN OUT EFI_SMM_CONTROL_REGISTER *SmiRegister\r | |
116 | );\r | |
117 | \r | |
118 | /**\r | |
119 | @par Protocol Description:\r | |
5259c97d | 120 | This protocol is used to initiate SMI/PMI activations.\r |
79964ac8 | 121 | \r |
122 | @param Trigger\r | |
123 | Initiates the SMI/PMI activation.\r | |
124 | \r | |
125 | @param Clear\r | |
126 | Quiesces the SMI/PMI activation.\r | |
127 | \r | |
128 | @param GetRegisterInfo\r | |
129 | Provides data on the register used as the source of the SMI.\r | |
130 | \r | |
131 | @param MinimumTriggerPeriod\r | |
132 | Minimum interval at which the platform can set the period.\r | |
133 | \r | |
412fb9ef | 134 | @retval EFI_SUCCESS The register structure has been returned.\r |
79964ac8 | 135 | **/\r |
136 | \r | |
053d9774 | 137 | //\r |
138 | // SMM Control Protocol\r | |
139 | //\r | |
140 | /**\r | |
5259c97d | 141 | This protocol is used to initiate SMI/PMI activations. \r |
142 | This protocol could be published by either:\r | |
f22f941e | 143 | - A processor driver to abstract the SMI/PMI IPI.\r |
144 | - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel chipset.\r | |
145 | Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this.\r | |
053d9774 | 146 | \r |
412fb9ef | 147 | The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This\r |
5259c97d | 148 | protocol is usable both in boot services and at runtime. The runtime aspect enables an\r |
149 | implementation of EFI_SMM_BASE_PROTOCOL.Communicate() to layer upon this service\r | |
053d9774 | 150 | and provide an SMI callback from a general EFI runtime driver.\r |
5259c97d | 151 | This protocol provides an abstraction to the platform hardware that generates an\r |
54f8d22a | 152 | SMI or PMI. There are often I/O ports that, when accessed, will engender the SMI or PMI.\r |
153 | Also, this hardware optionally supports the periodic genearation of these signals.\r | |
154 | \r | |
053d9774 | 155 | **/\r |
79964ac8 | 156 | struct _EFI_SMM_CONTROL_PROTOCOL {\r |
412fb9ef | 157 | ///\r |
158 | /// Initiates the SMI/PMI activation.\r | |
159 | ///\r | |
79964ac8 | 160 | EFI_SMM_ACTIVATE Trigger;\r |
412fb9ef | 161 | ///\r |
162 | /// Quiesces the SMI/PMI activation.\r | |
163 | ///\r | |
79964ac8 | 164 | EFI_SMM_DEACTIVATE Clear;\r |
412fb9ef | 165 | ///\r |
166 | /// Provides data on the register used as the source of the SMI.\r | |
167 | ///\r | |
79964ac8 | 168 | EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;\r |
412fb9ef | 169 | ///\r |
170 | /// Minimum interval at which the platform can set the period. A maximum is not\r | |
171 | /// specified in that the SMM infrastructure code can emulate a maximum interval that is\r | |
172 | /// greater than the hardware capabilities by using software emulation in the SMM\r | |
173 | /// infrastructure code.\r | |
174 | ///\r | |
79964ac8 | 175 | UINTN MinimumTriggerPeriod;\r |
176 | };\r | |
177 | \r | |
178 | extern EFI_GUID gEfiSmmControlProtocolGuid;\r | |
179 | \r | |
180 | #endif\r |