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1 | /** @file\r |
2 | Intel FSP status code definition\r | |
3 | \r | |
4 | Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php.\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _FSP_STATUS_CODE_H_\r | |
16 | #define _FSP_STATUS_CODE_H_\r | |
17 | \r | |
18 | //\r | |
19 | // FSP API - 4 BITS\r | |
20 | //\r | |
21 | #define FSP_STATUS_CODE_TEMP_RAM_INIT 0xF000\r | |
22 | #define FSP_STATUS_CODE_MEMORY_INIT 0xD000\r | |
23 | #define FSP_STATUS_CODE_TEMP_RAM_EXIT 0xB000\r | |
24 | #define FSP_STATUS_CODE_SILICON_INIT 0x9000\r | |
25 | #define FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION 0x6000\r | |
26 | #define FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION 0x4000\r | |
27 | #define FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION 0x2000\r | |
28 | \r | |
29 | //\r | |
30 | // MODULE - 4 BITS\r | |
31 | //\r | |
32 | #define FSP_STATUS_CODE_GFX_PEIM 0x0700\r | |
33 | #define FSP_STATUS_CODE_COMMON_CODE 0x0800\r | |
34 | #define FSP_STATUS_CODE_SILICON_COMMON_CODE 0x0900\r | |
35 | #define FSP_STATUS_CODE_SYSTEM_AGENT 0x0A00\r | |
36 | #define FSP_STATUS_CODE_PCH 0x0B00\r | |
37 | #define FSP_STATUS_CODE_CPU 0x0C00\r | |
38 | #define FSP_STATUS_CODE_MRC 0x0D00\r | |
39 | #define FSP_STATUS_CODE_ME_BIOS 0x0E00\r | |
40 | //\r | |
41 | // Individual Codes - 1 BYTE\r | |
42 | //\r | |
43 | #define FSP_STATUS_CODE_API_ENTRY 0x0000\r | |
44 | #define FSP_STATUS_CODE_API_EXIT 0x007F\r | |
45 | \r | |
46 | #endif\r |