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9060e3ec | 1 | /** @file\r |
2 | Driver Binding functions for PCI Bus module.\r | |
3 | \r | |
4 | Single PCI bus driver instance will manager all PCI Root Bridges in one EFI based firmware,\r | |
5 | since all PCI Root Bridges' resources need to be managed together.\r | |
6 | Supported() function will try to get PCI Root Bridge IO Protocol.\r | |
7 | Start() function will get PCI Host Bridge Resource Allocation Protocol to manage all\r | |
8 | PCI Root Bridges. So it means platform needs install PCI Root Bridge IO protocol for each\r | |
9 | PCI Root Bus and install PCI Host Bridge Resource Allocation Protocol.\r | |
10 | \r | |
26329817 | 11 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
cd5ebaa0 | 12 | This program and the accompanying materials\r |
9060e3ec | 13 | are licensed and made available under the terms and conditions of the BSD License\r |
14 | which accompanies this distribution. The full text of the license may be found at\r | |
15 | http://opensource.org/licenses/bsd-license.php\r | |
16 | \r | |
17 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
18 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
19 | \r | |
20 | **/\r | |
21 | \r | |
22 | #include "PciBus.h"\r | |
23 | \r | |
24 | //\r | |
25 | // PCI Bus Driver Global Variables\r | |
26 | //\r | |
27 | EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding = {\r | |
28 | PciBusDriverBindingSupported,\r | |
29 | PciBusDriverBindingStart,\r | |
30 | PciBusDriverBindingStop,\r | |
31 | 0xa,\r | |
32 | NULL,\r | |
33 | NULL\r | |
34 | };\r | |
35 | \r | |
36 | EFI_HANDLE gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];\r | |
ea669c1b | 37 | EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gIncompatiblePciDeviceSupport = NULL;\r |
9060e3ec | 38 | UINTN gPciHostBridgeNumber = 0;\r |
39 | BOOLEAN gFullEnumeration = TRUE;\r | |
40 | UINT64 gAllOne = 0xFFFFFFFFFFFFFFFFULL;\r | |
41 | UINT64 gAllZero = 0;\r | |
42 | \r | |
43 | EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;\r | |
44 | EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;\r | |
11a6cc5b | 45 | EDKII_IOMMU_PROTOCOL *mIoMmuProtocol;\r |
9060e3ec | 46 | \r |
47 | \r | |
48 | GLOBAL_REMOVE_IF_UNREFERENCED EFI_PCI_HOTPLUG_REQUEST_PROTOCOL mPciHotPlugRequest = {\r | |
49 | PciHotPlugRequestNotify\r | |
50 | };\r | |
51 | \r | |
52 | /**\r | |
53 | The Entry Point for PCI Bus module. The user code starts with this function.\r | |
54 | \r | |
55 | Installs driver module protocols and. Creates virtual device handles for ConIn,\r | |
56 | ConOut, and StdErr. Installs Simple Text In protocol, Simple Text In Ex protocol,\r | |
57 | Simple Pointer protocol, Absolute Pointer protocol on those virtual handlers.\r | |
58 | Installs Graphics Output protocol and/or UGA Draw protocol if needed.\r | |
59 | \r | |
60 | @param[in] ImageHandle The firmware allocated handle for the EFI image.\r | |
61 | @param[in] SystemTable A pointer to the EFI System Table.\r | |
62 | \r | |
63 | @retval EFI_SUCCESS The entry point is executed successfully.\r | |
64 | @retval other Some error occurred when executing this entry point.\r | |
65 | \r | |
66 | **/\r | |
67 | EFI_STATUS\r | |
68 | EFIAPI\r | |
69 | PciBusEntryPoint (\r | |
70 | IN EFI_HANDLE ImageHandle,\r | |
71 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
72 | )\r | |
73 | {\r | |
74 | EFI_STATUS Status;\r | |
75 | EFI_HANDLE Handle;\r | |
76 | \r | |
77 | //\r | |
78 | // Initializes PCI devices pool\r | |
79 | //\r | |
80 | InitializePciDevicePool ();\r | |
81 | \r | |
82 | //\r | |
83 | // Install driver model protocol(s).\r | |
84 | //\r | |
85 | Status = EfiLibInstallDriverBindingComponentName2 (\r | |
86 | ImageHandle,\r | |
87 | SystemTable,\r | |
88 | &gPciBusDriverBinding,\r | |
89 | ImageHandle,\r | |
90 | &gPciBusComponentName,\r | |
91 | &gPciBusComponentName2\r | |
92 | );\r | |
93 | ASSERT_EFI_ERROR (Status);\r | |
94 | \r | |
95 | if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {\r | |
96 | //\r | |
97 | // If Hot Plug is supported, install EFI PCI Hot Plug Request protocol.\r | |
98 | //\r | |
99 | Handle = NULL;\r | |
100 | Status = gBS->InstallProtocolInterface (\r | |
101 | &Handle,\r | |
102 | &gEfiPciHotPlugRequestProtocolGuid,\r | |
103 | EFI_NATIVE_INTERFACE,\r | |
104 | &mPciHotPlugRequest\r | |
105 | );\r | |
106 | }\r | |
107 | \r | |
108 | return Status;\r | |
109 | }\r | |
110 | \r | |
111 | /**\r | |
112 | Test to see if this driver supports ControllerHandle. Any ControllerHandle\r | |
113 | than contains a gEfiPciRootBridgeIoProtocolGuid protocol can be supported.\r | |
114 | \r | |
115 | @param This Protocol instance pointer.\r | |
116 | @param Controller Handle of device to test.\r | |
ed356b9e | 117 | @param RemainingDevicePath Optional parameter use to pick a specific child\r |
9060e3ec | 118 | device to start.\r |
119 | \r | |
120 | @retval EFI_SUCCESS This driver supports this device.\r | |
121 | @retval EFI_ALREADY_STARTED This driver is already running on this device.\r | |
122 | @retval other This driver does not support this device.\r | |
123 | \r | |
124 | **/\r | |
125 | EFI_STATUS\r | |
126 | EFIAPI\r | |
127 | PciBusDriverBindingSupported (\r | |
128 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
129 | IN EFI_HANDLE Controller,\r | |
130 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
131 | )\r | |
132 | {\r | |
133 | EFI_STATUS Status;\r | |
134 | EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;\r | |
135 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r | |
136 | EFI_DEV_PATH_PTR Node;\r | |
137 | \r | |
138 | //\r | |
139 | // Check RemainingDevicePath validation\r | |
140 | //\r | |
141 | if (RemainingDevicePath != NULL) {\r | |
142 | //\r | |
d1102dba | 143 | // Check if RemainingDevicePath is the End of Device Path Node,\r |
9060e3ec | 144 | // if yes, go on checking other conditions\r |
145 | //\r | |
146 | if (!IsDevicePathEnd (RemainingDevicePath)) {\r | |
147 | //\r | |
148 | // If RemainingDevicePath isn't the End of Device Path Node,\r | |
149 | // check its validation\r | |
150 | //\r | |
151 | Node.DevPath = RemainingDevicePath;\r | |
152 | if (Node.DevPath->Type != HARDWARE_DEVICE_PATH ||\r | |
153 | Node.DevPath->SubType != HW_PCI_DP ||\r | |
154 | DevicePathNodeLength(Node.DevPath) != sizeof(PCI_DEVICE_PATH)) {\r | |
155 | return EFI_UNSUPPORTED;\r | |
156 | }\r | |
157 | }\r | |
158 | }\r | |
159 | \r | |
160 | //\r | |
161 | // Check if Pci Root Bridge IO protocol is installed by platform\r | |
162 | //\r | |
163 | Status = gBS->OpenProtocol (\r | |
164 | Controller,\r | |
165 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
166 | (VOID **) &PciRootBridgeIo,\r | |
167 | This->DriverBindingHandle,\r | |
168 | Controller,\r | |
169 | EFI_OPEN_PROTOCOL_BY_DRIVER\r | |
170 | );\r | |
171 | if (Status == EFI_ALREADY_STARTED) {\r | |
172 | return EFI_SUCCESS;\r | |
173 | }\r | |
174 | \r | |
175 | if (EFI_ERROR (Status)) {\r | |
176 | return Status;\r | |
177 | }\r | |
178 | \r | |
179 | //\r | |
180 | // Close the I/O Abstraction(s) used to perform the supported test\r | |
181 | //\r | |
182 | gBS->CloseProtocol (\r | |
183 | Controller,\r | |
184 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
185 | This->DriverBindingHandle,\r | |
186 | Controller\r | |
187 | );\r | |
188 | \r | |
189 | //\r | |
190 | // Open the EFI Device Path protocol needed to perform the supported test\r | |
191 | //\r | |
192 | Status = gBS->OpenProtocol (\r | |
193 | Controller,\r | |
194 | &gEfiDevicePathProtocolGuid,\r | |
195 | (VOID **) &ParentDevicePath,\r | |
196 | This->DriverBindingHandle,\r | |
197 | Controller,\r | |
198 | EFI_OPEN_PROTOCOL_BY_DRIVER\r | |
199 | );\r | |
200 | if (Status == EFI_ALREADY_STARTED) {\r | |
201 | return EFI_SUCCESS;\r | |
202 | }\r | |
203 | \r | |
204 | if (EFI_ERROR (Status)) {\r | |
205 | return Status;\r | |
206 | }\r | |
207 | \r | |
208 | //\r | |
209 | // Close protocol, don't use device path protocol in the Support() function\r | |
210 | //\r | |
211 | gBS->CloseProtocol (\r | |
212 | Controller,\r | |
213 | &gEfiDevicePathProtocolGuid,\r | |
214 | This->DriverBindingHandle,\r | |
215 | Controller\r | |
216 | );\r | |
217 | \r | |
218 | return EFI_SUCCESS;\r | |
219 | }\r | |
220 | \r | |
221 | /**\r | |
222 | Start this driver on ControllerHandle and enumerate Pci bus and start\r | |
223 | all device under PCI bus.\r | |
224 | \r | |
225 | @param This Protocol instance pointer.\r | |
226 | @param Controller Handle of device to bind driver to.\r | |
ed356b9e | 227 | @param RemainingDevicePath Optional parameter use to pick a specific child\r |
9060e3ec | 228 | device to start.\r |
229 | \r | |
230 | @retval EFI_SUCCESS This driver is added to ControllerHandle.\r | |
231 | @retval EFI_ALREADY_STARTED This driver is already running on ControllerHandle.\r | |
232 | @retval other This driver does not support this device.\r | |
233 | \r | |
234 | **/\r | |
235 | EFI_STATUS\r | |
236 | EFIAPI\r | |
237 | PciBusDriverBindingStart (\r | |
238 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
239 | IN EFI_HANDLE Controller,\r | |
240 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
241 | )\r | |
242 | {\r | |
26329817 RN |
243 | EFI_STATUS Status;\r |
244 | EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;\r | |
245 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r | |
9060e3ec | 246 | \r |
a012bf6e DB |
247 | //\r |
248 | // Initialize PciRootBridgeIo to suppress incorrect compiler warning.\r | |
249 | //\r | |
250 | PciRootBridgeIo = NULL;\r | |
251 | \r | |
9060e3ec | 252 | //\r |
253 | // Check RemainingDevicePath validation\r | |
254 | //\r | |
255 | if (RemainingDevicePath != NULL) {\r | |
256 | //\r | |
d1102dba | 257 | // Check if RemainingDevicePath is the End of Device Path Node,\r |
9060e3ec | 258 | // if yes, return EFI_SUCCESS\r |
259 | //\r | |
260 | if (IsDevicePathEnd (RemainingDevicePath)) {\r | |
261 | return EFI_SUCCESS;\r | |
262 | }\r | |
263 | }\r | |
264 | \r | |
500e2ac2 OM |
265 | gBS->LocateProtocol (\r |
266 | &gEfiIncompatiblePciDeviceSupportProtocolGuid,\r | |
267 | NULL,\r | |
ea669c1b | 268 | (VOID **) &gIncompatiblePciDeviceSupport\r |
500e2ac2 | 269 | );\r |
9060e3ec | 270 | \r |
271 | //\r | |
272 | // If PCI Platform protocol is available, get it now.\r | |
273 | // If the platform implements this, it must be installed before BDS phase\r | |
274 | //\r | |
275 | gPciPlatformProtocol = NULL;\r | |
276 | gBS->LocateProtocol (\r | |
277 | &gEfiPciPlatformProtocolGuid,\r | |
278 | NULL,\r | |
279 | (VOID **) &gPciPlatformProtocol\r | |
280 | );\r | |
281 | \r | |
282 | //\r | |
283 | // If PCI Platform protocol doesn't exist, try to Pci Override Protocol.\r | |
284 | //\r | |
d1102dba | 285 | if (gPciPlatformProtocol == NULL) {\r |
9060e3ec | 286 | gPciOverrideProtocol = NULL;\r |
287 | gBS->LocateProtocol (\r | |
288 | &gEfiPciOverrideProtocolGuid,\r | |
289 | NULL,\r | |
290 | (VOID **) &gPciOverrideProtocol\r | |
291 | );\r | |
d1102dba | 292 | }\r |
9060e3ec | 293 | \r |
11a6cc5b JY |
294 | if (mIoMmuProtocol == NULL) {\r |
295 | gBS->LocateProtocol (\r | |
296 | &gEdkiiIoMmuProtocolGuid,\r | |
297 | NULL,\r | |
298 | (VOID **) &mIoMmuProtocol\r | |
299 | );\r | |
300 | }\r | |
301 | \r | |
5624a27d WL |
302 | if (PcdGetBool (PcdPciDisableBusEnumeration)) {\r |
303 | gFullEnumeration = FALSE;\r | |
304 | } else {\r | |
305 | gFullEnumeration = (BOOLEAN) ((SearchHostBridgeHandle (Controller) ? FALSE : TRUE));\r | |
306 | }\r | |
9060e3ec | 307 | \r |
37623a5c | 308 | //\r |
309 | // Open Device Path Protocol for PCI root bridge\r | |
310 | //\r | |
311 | Status = gBS->OpenProtocol (\r | |
312 | Controller,\r | |
313 | &gEfiDevicePathProtocolGuid,\r | |
314 | (VOID **) &ParentDevicePath,\r | |
315 | This->DriverBindingHandle,\r | |
316 | Controller,\r | |
317 | EFI_OPEN_PROTOCOL_GET_PROTOCOL\r | |
d1102dba | 318 | );\r |
37623a5c | 319 | ASSERT_EFI_ERROR (Status);\r |
320 | \r | |
321 | //\r | |
322 | // Report Status Code to indicate PCI bus starts\r | |
323 | //\r | |
324 | REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r | |
325 | EFI_PROGRESS_CODE,\r | |
326 | (EFI_IO_BUS_PCI | EFI_IOB_PC_INIT),\r | |
327 | ParentDevicePath\r | |
328 | );\r | |
329 | \r | |
26329817 | 330 | Status = EFI_SUCCESS;\r |
9060e3ec | 331 | //\r |
332 | // Enumerate the entire host bridge\r | |
333 | // After enumeration, a database that records all the device information will be created\r | |
334 | //\r | |
335 | //\r | |
26329817 RN |
336 | if (gFullEnumeration) {\r |
337 | //\r | |
338 | // Get the rootbridge Io protocol to find the host bridge handle\r | |
339 | //\r | |
340 | Status = gBS->OpenProtocol (\r | |
341 | Controller,\r | |
342 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
343 | (VOID **) &PciRootBridgeIo,\r | |
344 | gPciBusDriverBinding.DriverBindingHandle,\r | |
345 | Controller,\r | |
346 | EFI_OPEN_PROTOCOL_GET_PROTOCOL\r | |
347 | );\r | |
348 | \r | |
349 | if (!EFI_ERROR (Status)) {\r | |
350 | Status = PciEnumerator (Controller, PciRootBridgeIo->ParentHandle);\r | |
351 | }\r | |
352 | } else {\r | |
353 | //\r | |
354 | // If PCI bus has already done the full enumeration, never do it again\r | |
355 | //\r | |
356 | Status = PciEnumeratorLight (Controller);\r | |
357 | }\r | |
9060e3ec | 358 | \r |
359 | if (EFI_ERROR (Status)) {\r | |
360 | return Status;\r | |
361 | }\r | |
362 | \r | |
363 | //\r | |
364 | // Start all the devices under the entire host bridge.\r | |
365 | //\r | |
366 | StartPciDevices (Controller);\r | |
367 | \r | |
42e8bc7d RN |
368 | if (gFullEnumeration) {\r |
369 | gFullEnumeration = FALSE;\r | |
370 | \r | |
371 | Status = gBS->InstallProtocolInterface (\r | |
372 | &PciRootBridgeIo->ParentHandle,\r | |
373 | &gEfiPciEnumerationCompleteProtocolGuid,\r | |
374 | EFI_NATIVE_INTERFACE,\r | |
375 | NULL\r | |
376 | );\r | |
377 | ASSERT_EFI_ERROR (Status);\r | |
378 | }\r | |
379 | \r | |
380 | return Status;\r | |
9060e3ec | 381 | }\r |
382 | \r | |
383 | /**\r | |
ed356b9e | 384 | Stop this driver on ControllerHandle. Support stopping any child handles\r |
9060e3ec | 385 | created by this driver.\r |
386 | \r | |
387 | @param This Protocol instance pointer.\r | |
388 | @param Controller Handle of device to stop driver on.\r | |
389 | @param NumberOfChildren Number of Handles in ChildHandleBuffer. If number of\r | |
390 | children is zero stop the entire bus driver.\r | |
391 | @param ChildHandleBuffer List of Child Handles to Stop.\r | |
392 | \r | |
393 | @retval EFI_SUCCESS This driver is removed ControllerHandle.\r | |
394 | @retval other This driver was not removed from this device.\r | |
395 | \r | |
396 | **/\r | |
397 | EFI_STATUS\r | |
398 | EFIAPI\r | |
399 | PciBusDriverBindingStop (\r | |
400 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
401 | IN EFI_HANDLE Controller,\r | |
402 | IN UINTN NumberOfChildren,\r | |
403 | IN EFI_HANDLE *ChildHandleBuffer\r | |
404 | )\r | |
405 | {\r | |
406 | EFI_STATUS Status;\r | |
407 | UINTN Index;\r | |
408 | BOOLEAN AllChildrenStopped;\r | |
409 | \r | |
410 | if (NumberOfChildren == 0) {\r | |
411 | //\r | |
412 | // Close the bus driver\r | |
413 | //\r | |
414 | gBS->CloseProtocol (\r | |
415 | Controller,\r | |
416 | &gEfiDevicePathProtocolGuid,\r | |
417 | This->DriverBindingHandle,\r | |
418 | Controller\r | |
419 | );\r | |
420 | gBS->CloseProtocol (\r | |
421 | Controller,\r | |
422 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
423 | This->DriverBindingHandle,\r | |
424 | Controller\r | |
425 | );\r | |
426 | \r | |
427 | DestroyRootBridgeByHandle (\r | |
428 | Controller\r | |
429 | );\r | |
430 | \r | |
431 | return EFI_SUCCESS;\r | |
432 | }\r | |
433 | \r | |
434 | //\r | |
435 | // Stop all the children\r | |
436 | //\r | |
437 | \r | |
438 | AllChildrenStopped = TRUE;\r | |
439 | \r | |
440 | for (Index = 0; Index < NumberOfChildren; Index++) {\r | |
441 | \r | |
442 | //\r | |
443 | // De register all the pci device\r | |
444 | //\r | |
445 | Status = DeRegisterPciDevice (Controller, ChildHandleBuffer[Index]);\r | |
446 | \r | |
447 | if (EFI_ERROR (Status)) {\r | |
448 | AllChildrenStopped = FALSE;\r | |
449 | }\r | |
450 | }\r | |
451 | \r | |
452 | if (!AllChildrenStopped) {\r | |
453 | return EFI_DEVICE_ERROR;\r | |
454 | }\r | |
455 | \r | |
456 | return EFI_SUCCESS;\r | |
457 | }\r | |
458 | \r |