]>
Commit | Line | Data |
---|---|---|
9060e3ec | 1 | /** @file\r |
2 | PCI bus enumeration logic function declaration for PCI bus module.\r | |
3 | \r | |
1f6785c4 | 4 | Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r |
9d510e61 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
9060e3ec | 6 | \r |
7 | **/\r | |
8 | \r | |
9 | #ifndef _EFI_PCI_ENUMERATOR_H_\r | |
10 | #define _EFI_PCI_ENUMERATOR_H_\r | |
11 | \r | |
12 | #include "PciResourceSupport.h"\r | |
13 | \r | |
14 | /**\r | |
15 | This routine is used to enumerate entire pci bus system\r | |
16 | in a given platform.\r | |
17 | \r | |
26329817 RN |
18 | @param Controller Parent controller handle.\r |
19 | @param HostBridgeHandle Host bridge handle.\r | |
9060e3ec | 20 | \r |
21 | @retval EFI_SUCCESS PCI enumeration finished successfully.\r | |
22 | @retval other Some error occurred when enumerating the pci bus system.\r | |
23 | \r | |
24 | **/\r | |
25 | EFI_STATUS\r | |
26 | PciEnumerator (\r | |
1436aea4 MK |
27 | IN EFI_HANDLE Controller,\r |
28 | IN EFI_HANDLE HostBridgeHandle\r | |
9060e3ec | 29 | );\r |
30 | \r | |
31 | /**\r | |
32 | Enumerate PCI root bridge.\r | |
33 | \r | |
34 | @param PciResAlloc Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r | |
35 | @param RootBridgeDev Instance of root bridge device.\r | |
36 | \r | |
37 | @retval EFI_SUCCESS Successfully enumerated root bridge.\r | |
38 | @retval other Failed to enumerate root bridge.\r | |
39 | \r | |
40 | **/\r | |
41 | EFI_STATUS\r | |
42 | PciRootBridgeEnumerator (\r | |
43 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,\r | |
44 | IN PCI_IO_DEVICE *RootBridgeDev\r | |
45 | );\r | |
46 | \r | |
47 | /**\r | |
48 | This routine is used to process all PCI devices' Option Rom\r | |
49 | on a certain root bridge.\r | |
50 | \r | |
51 | @param Bridge Given parent's root bridge.\r | |
52 | @param RomBase Base address of ROM driver loaded from.\r | |
53 | @param MaxLength Maximum rom size.\r | |
54 | \r | |
55 | **/\r | |
56 | VOID\r | |
57 | ProcessOptionRom (\r | |
1436aea4 MK |
58 | IN PCI_IO_DEVICE *Bridge,\r |
59 | IN UINT64 RomBase,\r | |
60 | IN UINT64 MaxLength\r | |
9060e3ec | 61 | );\r |
62 | \r | |
63 | /**\r | |
64 | This routine is used to assign bus number to the given PCI bus system\r | |
65 | \r | |
66 | @param Bridge Parent root bridge instance.\r | |
67 | @param StartBusNumber Number of beginning.\r | |
68 | @param SubBusNumber The number of sub bus.\r | |
69 | \r | |
70 | @retval EFI_SUCCESS Successfully assigned bus number.\r | |
71 | @retval EFI_DEVICE_ERROR Failed to assign bus number.\r | |
72 | \r | |
73 | **/\r | |
74 | EFI_STATUS\r | |
75 | PciAssignBusNumber (\r | |
1436aea4 MK |
76 | IN PCI_IO_DEVICE *Bridge,\r |
77 | IN UINT8 StartBusNumber,\r | |
78 | OUT UINT8 *SubBusNumber\r | |
9060e3ec | 79 | );\r |
80 | \r | |
81 | /**\r | |
82 | This routine is used to determine the root bridge attribute by interfacing\r | |
83 | the host bridge resource allocation protocol.\r | |
84 | \r | |
85 | @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r | |
86 | @param RootBridgeDev Root bridge instance\r | |
87 | \r | |
88 | @retval EFI_SUCCESS Successfully got root bridge's attribute.\r | |
89 | @retval other Failed to get attribute.\r | |
90 | \r | |
91 | **/\r | |
92 | EFI_STATUS\r | |
93 | DetermineRootBridgeAttributes (\r | |
1436aea4 MK |
94 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,\r |
95 | IN PCI_IO_DEVICE *RootBridgeDev\r | |
9060e3ec | 96 | );\r |
97 | \r | |
98 | /**\r | |
99 | Get Max Option Rom size on specified bridge.\r | |
100 | \r | |
101 | @param Bridge Given bridge device instance.\r | |
102 | \r | |
103 | @return Max size of option rom needed.\r | |
104 | \r | |
105 | **/\r | |
1f6785c4 | 106 | UINT32\r |
9060e3ec | 107 | GetMaxOptionRomSize (\r |
1436aea4 | 108 | IN PCI_IO_DEVICE *Bridge\r |
9060e3ec | 109 | );\r |
110 | \r | |
111 | /**\r | |
112 | Process attributes of devices on this host bridge\r | |
113 | \r | |
114 | @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r | |
115 | \r | |
116 | @retval EFI_SUCCESS Successfully process attribute.\r | |
117 | @retval EFI_NOT_FOUND Can not find the specific root bridge device.\r | |
118 | @retval other Failed to determine the root bridge device's attribute.\r | |
119 | \r | |
120 | **/\r | |
121 | EFI_STATUS\r | |
122 | PciHostBridgeDeviceAttribute (\r | |
1436aea4 | 123 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r |
9060e3ec | 124 | );\r |
125 | \r | |
126 | /**\r | |
127 | Get resource allocation status from the ACPI resource descriptor.\r | |
128 | \r | |
129 | @param AcpiConfig Point to Acpi configuration table.\r | |
130 | @param IoResStatus Return the status of I/O resource.\r | |
131 | @param Mem32ResStatus Return the status of 32-bit Memory resource.\r | |
132 | @param PMem32ResStatus Return the status of 32-bit Prefetchable Memory resource.\r | |
133 | @param Mem64ResStatus Return the status of 64-bit Memory resource.\r | |
134 | @param PMem64ResStatus Return the status of 64-bit Prefetchable Memory resource.\r | |
135 | \r | |
136 | **/\r | |
137 | VOID\r | |
138 | GetResourceAllocationStatus (\r | |
139 | VOID *AcpiConfig,\r | |
140 | OUT UINT64 *IoResStatus,\r | |
141 | OUT UINT64 *Mem32ResStatus,\r | |
142 | OUT UINT64 *PMem32ResStatus,\r | |
143 | OUT UINT64 *Mem64ResStatus,\r | |
144 | OUT UINT64 *PMem64ResStatus\r | |
145 | );\r | |
146 | \r | |
147 | /**\r | |
148 | Remove a PCI device from device pool and mark its bar.\r | |
149 | \r | |
150 | @param PciDevice Instance of Pci device.\r | |
151 | \r | |
152 | @retval EFI_SUCCESS Successfully remove the PCI device.\r | |
153 | @retval EFI_ABORTED Pci device is a root bridge or a PCI-PCI bridge.\r | |
154 | \r | |
155 | **/\r | |
156 | EFI_STATUS\r | |
157 | RejectPciDevice (\r | |
1436aea4 | 158 | IN PCI_IO_DEVICE *PciDevice\r |
9060e3ec | 159 | );\r |
160 | \r | |
161 | /**\r | |
162 | Determine whethter a PCI device can be rejected.\r | |
163 | \r | |
164 | @param PciResNode Pointer to Pci resource node instance.\r | |
165 | \r | |
166 | @retval TRUE The PCI device can be rejected.\r | |
167 | @retval TRUE The PCI device cannot be rejected.\r | |
168 | \r | |
169 | **/\r | |
170 | BOOLEAN\r | |
171 | IsRejectiveDevice (\r | |
1436aea4 | 172 | IN PCI_RESOURCE_NODE *PciResNode\r |
9060e3ec | 173 | );\r |
174 | \r | |
175 | /**\r | |
176 | Compare two resource nodes and get the larger resource consumer.\r | |
177 | \r | |
178 | @param PciResNode1 resource node 1 want to be compared\r | |
179 | @param PciResNode2 resource node 2 want to be compared\r | |
180 | \r | |
181 | @return Larger resource node.\r | |
182 | \r | |
183 | **/\r | |
184 | PCI_RESOURCE_NODE *\r | |
185 | GetLargerConsumerDevice (\r | |
1436aea4 MK |
186 | IN PCI_RESOURCE_NODE *PciResNode1,\r |
187 | IN PCI_RESOURCE_NODE *PciResNode2\r | |
9060e3ec | 188 | );\r |
189 | \r | |
190 | /**\r | |
191 | Get the max resource consumer in the host resource pool.\r | |
192 | \r | |
193 | @param ResPool Pointer to resource pool node.\r | |
194 | \r | |
195 | @return The max resource consumer in the host resource pool.\r | |
196 | \r | |
197 | **/\r | |
198 | PCI_RESOURCE_NODE *\r | |
199 | GetMaxResourceConsumerDevice (\r | |
1436aea4 | 200 | IN PCI_RESOURCE_NODE *ResPool\r |
9060e3ec | 201 | );\r |
202 | \r | |
203 | /**\r | |
204 | Adjust host bridge allocation so as to reduce resource requirement\r | |
205 | \r | |
206 | @param IoPool Pointer to instance of I/O resource Node.\r | |
207 | @param Mem32Pool Pointer to instance of 32-bit memory resource Node.\r | |
208 | @param PMem32Pool Pointer to instance of 32-bit Prefetchable memory resource node.\r | |
209 | @param Mem64Pool Pointer to instance of 64-bit memory resource node.\r | |
210 | @param PMem64Pool Pointer to instance of 64-bit Prefetchable memory resource node.\r | |
211 | @param IoResStatus Status of I/O resource Node.\r | |
212 | @param Mem32ResStatus Status of 32-bit memory resource Node.\r | |
213 | @param PMem32ResStatus Status of 32-bit Prefetchable memory resource node.\r | |
214 | @param Mem64ResStatus Status of 64-bit memory resource node.\r | |
215 | @param PMem64ResStatus Status of 64-bit Prefetchable memory resource node.\r | |
216 | \r | |
2048c585 | 217 | @retval EFI_SUCCESS Successfully adjusted resource on host bridge.\r |
9060e3ec | 218 | @retval EFI_ABORTED Host bridge hasn't this resource type or no resource be adjusted.\r |
219 | \r | |
220 | **/\r | |
221 | EFI_STATUS\r | |
222 | PciHostBridgeAdjustAllocation (\r | |
1436aea4 MK |
223 | IN PCI_RESOURCE_NODE *IoPool,\r |
224 | IN PCI_RESOURCE_NODE *Mem32Pool,\r | |
225 | IN PCI_RESOURCE_NODE *PMem32Pool,\r | |
226 | IN PCI_RESOURCE_NODE *Mem64Pool,\r | |
227 | IN PCI_RESOURCE_NODE *PMem64Pool,\r | |
228 | IN UINT64 IoResStatus,\r | |
229 | IN UINT64 Mem32ResStatus,\r | |
230 | IN UINT64 PMem32ResStatus,\r | |
231 | IN UINT64 Mem64ResStatus,\r | |
232 | IN UINT64 PMem64ResStatus\r | |
9060e3ec | 233 | );\r |
234 | \r | |
235 | /**\r | |
2048c585 | 236 | Summary requests for all resource type, and construct ACPI resource\r |
9060e3ec | 237 | requestor instance.\r |
238 | \r | |
239 | @param Bridge detecting bridge\r | |
240 | @param IoNode Pointer to instance of I/O resource Node\r | |
241 | @param Mem32Node Pointer to instance of 32-bit memory resource Node\r | |
242 | @param PMem32Node Pointer to instance of 32-bit Pmemory resource node\r | |
243 | @param Mem64Node Pointer to instance of 64-bit memory resource node\r | |
244 | @param PMem64Node Pointer to instance of 64-bit Pmemory resource node\r | |
245 | @param Config Output buffer holding new constructed APCI resource requestor\r | |
246 | \r | |
247 | @retval EFI_SUCCESS Successfully constructed ACPI resource.\r | |
2048c585 | 248 | @retval EFI_OUT_OF_RESOURCES No memory available.\r |
9060e3ec | 249 | \r |
250 | **/\r | |
251 | EFI_STATUS\r | |
252 | ConstructAcpiResourceRequestor (\r | |
253 | IN PCI_IO_DEVICE *Bridge,\r | |
254 | IN PCI_RESOURCE_NODE *IoNode,\r | |
255 | IN PCI_RESOURCE_NODE *Mem32Node,\r | |
256 | IN PCI_RESOURCE_NODE *PMem32Node,\r | |
257 | IN PCI_RESOURCE_NODE *Mem64Node,\r | |
258 | IN PCI_RESOURCE_NODE *PMem64Node,\r | |
259 | OUT VOID **Config\r | |
260 | );\r | |
261 | \r | |
262 | /**\r | |
263 | Get resource base from an acpi configuration descriptor.\r | |
264 | \r | |
265 | @param Config An acpi configuration descriptor.\r | |
266 | @param IoBase Output of I/O resource base address.\r | |
267 | @param Mem32Base Output of 32-bit memory base address.\r | |
268 | @param PMem32Base Output of 32-bit prefetchable memory base address.\r | |
269 | @param Mem64Base Output of 64-bit memory base address.\r | |
270 | @param PMem64Base Output of 64-bit prefetchable memory base address.\r | |
271 | \r | |
272 | **/\r | |
273 | VOID\r | |
274 | GetResourceBase (\r | |
275 | IN VOID *Config,\r | |
276 | OUT UINT64 *IoBase,\r | |
277 | OUT UINT64 *Mem32Base,\r | |
278 | OUT UINT64 *PMem32Base,\r | |
279 | OUT UINT64 *Mem64Base,\r | |
280 | OUT UINT64 *PMem64Base\r | |
281 | );\r | |
282 | \r | |
283 | /**\r | |
284 | Enumerate pci bridge, allocate resource and determine attribute\r | |
285 | for devices on this bridge.\r | |
286 | \r | |
287 | @param BridgeDev Pointer to instance of bridge device.\r | |
288 | \r | |
289 | @retval EFI_SUCCESS Successfully enumerated PCI bridge.\r | |
290 | @retval other Failed to enumerate.\r | |
291 | \r | |
292 | **/\r | |
293 | EFI_STATUS\r | |
294 | PciBridgeEnumerator (\r | |
1436aea4 | 295 | IN PCI_IO_DEVICE *BridgeDev\r |
9060e3ec | 296 | );\r |
297 | \r | |
298 | /**\r | |
299 | Allocate all kinds of resource for PCI bridge.\r | |
300 | \r | |
301 | @param Bridge Pointer to bridge instance.\r | |
302 | \r | |
303 | @retval EFI_SUCCESS Successfully allocated resource for PCI bridge.\r | |
304 | @retval other Failed to allocate resource for bridge.\r | |
305 | \r | |
306 | **/\r | |
307 | EFI_STATUS\r | |
308 | PciBridgeResourceAllocator (\r | |
309 | IN PCI_IO_DEVICE *Bridge\r | |
310 | );\r | |
311 | \r | |
312 | /**\r | |
313 | Get resource base address for a pci bridge device.\r | |
314 | \r | |
315 | @param Bridge Given Pci driver instance.\r | |
316 | @param IoBase Output for base address of I/O type resource.\r | |
317 | @param Mem32Base Output for base address of 32-bit memory type resource.\r | |
318 | @param PMem32Base Ooutput for base address of 32-bit Pmemory type resource.\r | |
319 | @param Mem64Base Output for base address of 64-bit memory type resource.\r | |
320 | @param PMem64Base Output for base address of 64-bit Pmemory type resource.\r | |
321 | \r | |
322 | @retval EFI_SUCCESS Successfully got resource base address.\r | |
323 | @retval EFI_OUT_OF_RESOURCES PCI bridge is not available.\r | |
324 | \r | |
325 | **/\r | |
326 | EFI_STATUS\r | |
327 | GetResourceBaseFromBridge (\r | |
1436aea4 MK |
328 | IN PCI_IO_DEVICE *Bridge,\r |
329 | OUT UINT64 *IoBase,\r | |
330 | OUT UINT64 *Mem32Base,\r | |
331 | OUT UINT64 *PMem32Base,\r | |
332 | OUT UINT64 *Mem64Base,\r | |
333 | OUT UINT64 *PMem64Base\r | |
9060e3ec | 334 | );\r |
335 | \r | |
336 | /**\r | |
337 | Process Option Rom on this host bridge\r | |
338 | \r | |
339 | @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r | |
340 | \r | |
341 | @retval EFI_NOT_FOUND Can not find the root bridge instance.\r | |
342 | @retval EFI_SUCCESS Success process.\r | |
343 | **/\r | |
344 | EFI_STATUS\r | |
345 | PciHostBridgeP2CProcess (\r | |
1436aea4 | 346 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r |
9060e3ec | 347 | );\r |
348 | \r | |
349 | /**\r | |
350 | These are the notifications from the PCI bus driver that it is about to enter a certain\r | |
351 | phase of the PCI enumeration process.\r | |
352 | \r | |
353 | This member function can be used to notify the host bridge driver to perform specific actions,\r | |
354 | including any chipset-specific initialization, so that the chipset is ready to enter the next phase.\r | |
355 | Eight notification points are defined at this time. See belows:\r | |
356 | EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data\r | |
357 | structures. The PCI enumerator should issue this notification\r | |
358 | before starting a fresh enumeration process. Enumeration cannot\r | |
359 | be restarted after sending any other notification such as\r | |
360 | EfiPciHostBridgeBeginBusAllocation.\r | |
361 | EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is\r | |
362 | required here. This notification can be used to perform any\r | |
363 | chipset-specific programming.\r | |
364 | EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No\r | |
365 | specific action is required here. This notification can be used to\r | |
366 | perform any chipset-specific programming.\r | |
367 | EfiPciHostBridgeBeginResourceAllocation\r | |
368 | The resource allocation phase is about to begin. No specific\r | |
369 | action is required here. This notification can be used to perform\r | |
370 | any chipset-specific programming.\r | |
371 | EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI\r | |
372 | root bridges. These resource settings are returned on the next call to\r | |
373 | GetProposedResources(). Before calling NotifyPhase() with a Phase of\r | |
374 | EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible\r | |
375 | for gathering I/O and memory requests for\r | |
376 | all the PCI root bridges and submitting these requests using\r | |
377 | SubmitResources(). This function pads the resource amount\r | |
378 | to suit the root bridge hardware, takes care of dependencies between\r | |
379 | the PCI root bridges, and calls the Global Coherency Domain (GCD)\r | |
380 | with the allocation request. In the case of padding, the allocated range\r | |
381 | could be bigger than what was requested.\r | |
382 | EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated\r | |
383 | resources (proposed resources) for all the PCI root bridges. After the\r | |
384 | hardware is programmed, reassigning resources will not be supported.\r | |
385 | The bus settings are not affected.\r | |
386 | EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI\r | |
387 | root bridges and resets the I/O and memory apertures to their initial\r | |
388 | state. The bus settings are not affected. If the request to allocate\r | |
389 | resources fails, the PCI enumerator can use this notification to\r | |
390 | deallocate previous resources, adjust the requests, and retry\r | |
391 | allocation.\r | |
392 | EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is\r | |
393 | required here. This notification can be used to perform any chipsetspecific\r | |
394 | programming.\r | |
395 | \r | |
396 | @param[in] PciResAlloc The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r | |
397 | @param[in] Phase The phase during enumeration\r | |
398 | \r | |
399 | @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error\r | |
400 | is valid for a Phase of EfiPciHostBridgeAllocateResources if\r | |
401 | SubmitResources() has not been called for one or more\r | |
402 | PCI root bridges before this call\r | |
403 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid\r | |
404 | for a Phase of EfiPciHostBridgeSetResources.\r | |
405 | @retval EFI_INVALID_PARAMETER Invalid phase parameter\r | |
406 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
407 | This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the\r | |
408 | previously submitted resource requests cannot be fulfilled or\r | |
409 | were only partially fulfilled.\r | |
410 | @retval EFI_SUCCESS The notification was accepted without any errors.\r | |
411 | \r | |
412 | **/\r | |
413 | EFI_STATUS\r | |
414 | NotifyPhase (\r | |
1436aea4 MK |
415 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,\r |
416 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r | |
9060e3ec | 417 | );\r |
418 | \r | |
419 | /**\r | |
420 | Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various\r | |
421 | stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual\r | |
422 | PCI controllers before enumeration.\r | |
423 | \r | |
424 | This function is called during the PCI enumeration process. No specific action is expected from this\r | |
425 | member function. It allows the host bridge driver to preinitialize individual PCI controllers before\r | |
426 | enumeration.\r | |
427 | \r | |
428 | @param Bridge Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r | |
429 | @param Bus The bus number of the pci device.\r | |
430 | @param Device The device number of the pci device.\r | |
431 | @param Func The function number of the pci device.\r | |
432 | @param Phase The phase of the PCI device enumeration.\r | |
433 | \r | |
434 | @retval EFI_SUCCESS The requested parameters were returned.\r | |
435 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
436 | @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in\r | |
437 | EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.\r | |
438 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should\r | |
fcdfcdbf RN |
439 | not enumerate this device, including its child devices if it is a PCI-to-PCI\r |
440 | bridge.\r | |
9060e3ec | 441 | \r |
442 | **/\r | |
443 | EFI_STATUS\r | |
444 | PreprocessController (\r | |
1436aea4 MK |
445 | IN PCI_IO_DEVICE *Bridge,\r |
446 | IN UINT8 Bus,\r | |
447 | IN UINT8 Device,\r | |
448 | IN UINT8 Func,\r | |
449 | IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r | |
9060e3ec | 450 | );\r |
451 | \r | |
452 | /**\r | |
453 | This function allows the PCI bus driver to be notified to act as requested when a hot-plug event has\r | |
454 | happened on the hot-plug controller. Currently, the operations include add operation and remove operation..\r | |
455 | \r | |
456 | @param This A pointer to the hot plug request protocol.\r | |
457 | @param Operation The operation the PCI bus driver is requested to make.\r | |
458 | @param Controller The handle of the hot-plug controller.\r | |
459 | @param RemainingDevicePath The remaining device path for the PCI-like hot-plug device.\r | |
460 | @param NumberOfChildren The number of child handles.\r | |
461 | For a add operation, it is an output parameter.\r | |
462 | For a remove operation, it's an input parameter.\r | |
463 | @param ChildHandleBuffer The buffer which contains the child handles.\r | |
464 | \r | |
465 | @retval EFI_INVALID_PARAMETER Operation is not a legal value.\r | |
466 | Controller is NULL or not a valid handle.\r | |
467 | NumberOfChildren is NULL.\r | |
468 | ChildHandleBuffer is NULL while Operation is add.\r | |
469 | @retval EFI_OUT_OF_RESOURCES There are no enough resources to start the devices.\r | |
470 | @retval EFI_NOT_FOUND Can not find bridge according to controller handle.\r | |
471 | @retval EFI_SUCCESS The handles for the specified device have been created or destroyed\r | |
472 | as requested, and for an add operation, the new handles are\r | |
473 | returned in ChildHandleBuffer.\r | |
474 | **/\r | |
475 | EFI_STATUS\r | |
476 | EFIAPI\r | |
477 | PciHotPlugRequestNotify (\r | |
1436aea4 MK |
478 | IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL *This,\r |
479 | IN EFI_PCI_HOTPLUG_OPERATION Operation,\r | |
480 | IN EFI_HANDLE Controller,\r | |
481 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL,\r | |
482 | IN OUT UINT8 *NumberOfChildren,\r | |
483 | IN OUT EFI_HANDLE *ChildHandleBuffer\r | |
9060e3ec | 484 | );\r |
485 | \r | |
486 | /**\r | |
487 | Search hostbridge according to given handle\r | |
488 | \r | |
489 | @param RootBridgeHandle Host bridge handle.\r | |
490 | \r | |
491 | @retval TRUE Found host bridge handle.\r | |
492 | @retval FALSE Not found hot bridge handle.\r | |
493 | \r | |
494 | **/\r | |
495 | BOOLEAN\r | |
496 | SearchHostBridgeHandle (\r | |
1436aea4 | 497 | IN EFI_HANDLE RootBridgeHandle\r |
9060e3ec | 498 | );\r |
499 | \r | |
500 | /**\r | |
501 | Add host bridge handle to global variable for enumerating.\r | |
502 | \r | |
503 | @param HostBridgeHandle Host bridge handle.\r | |
504 | \r | |
505 | @retval EFI_SUCCESS Successfully added host bridge.\r | |
506 | @retval EFI_ABORTED Host bridge is NULL, or given host bridge\r | |
507 | has been in host bridge list.\r | |
508 | \r | |
509 | **/\r | |
510 | EFI_STATUS\r | |
511 | AddHostBridgeEnumerator (\r | |
1436aea4 | 512 | IN EFI_HANDLE HostBridgeHandle\r |
9060e3ec | 513 | );\r |
514 | \r | |
515 | #endif\r |