]>
Commit | Line | Data |
---|---|---|
9060e3ec | 1 | /** @file\r |
2 | PCI Hot Plug support functions implementation for PCI Bus module..\r | |
3 | \r | |
fcdfcdbf | 4 | Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r |
9d510e61 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
9060e3ec | 6 | \r |
7 | **/\r | |
8 | \r | |
9 | #include "PciBus.h"\r | |
10 | \r | |
11 | EFI_PCI_HOT_PLUG_INIT_PROTOCOL *gPciHotPlugInit = NULL;\r | |
12 | EFI_HPC_LOCATION *gPciRootHpcPool = NULL;\r | |
13 | UINTN gPciRootHpcCount = 0;\r | |
14 | ROOT_HPC_DATA *gPciRootHpcData = NULL;\r | |
15 | \r | |
9060e3ec | 16 | /**\r |
17 | Event notification function to set Hot Plug controller status.\r | |
18 | \r | |
19 | @param Event The event that invoke this function.\r | |
20 | @param Context The calling context, pointer to ROOT_HPC_DATA.\r | |
21 | \r | |
22 | **/\r | |
23 | VOID\r | |
24 | EFIAPI\r | |
25 | PciHPCInitialized (\r | |
1436aea4 MK |
26 | IN EFI_EVENT Event,\r |
27 | IN VOID *Context\r | |
9060e3ec | 28 | )\r |
29 | {\r | |
1436aea4 | 30 | ROOT_HPC_DATA *HpcData;\r |
9060e3ec | 31 | \r |
1436aea4 MK |
32 | HpcData = (ROOT_HPC_DATA *)Context;\r |
33 | HpcData->Initialized = TRUE;\r | |
9060e3ec | 34 | }\r |
35 | \r | |
36 | /**\r | |
fcdfcdbf | 37 | Compare two device paths to check if they are exactly same.\r |
9060e3ec | 38 | \r |
39 | @param DevicePath1 A pointer to the first device path data structure.\r | |
40 | @param DevicePath2 A pointer to the second device path data structure.\r | |
41 | \r | |
42 | @retval TRUE They are same.\r | |
43 | @retval FALSE They are not same.\r | |
44 | \r | |
45 | **/\r | |
46 | BOOLEAN\r | |
47 | EfiCompareDevicePath (\r | |
1436aea4 MK |
48 | IN EFI_DEVICE_PATH_PROTOCOL *DevicePath1,\r |
49 | IN EFI_DEVICE_PATH_PROTOCOL *DevicePath2\r | |
9060e3ec | 50 | )\r |
51 | {\r | |
1436aea4 MK |
52 | UINTN Size1;\r |
53 | UINTN Size2;\r | |
9060e3ec | 54 | \r |
55 | Size1 = GetDevicePathSize (DevicePath1);\r | |
56 | Size2 = GetDevicePathSize (DevicePath2);\r | |
57 | \r | |
58 | if (Size1 != Size2) {\r | |
59 | return FALSE;\r | |
60 | }\r | |
61 | \r | |
62 | if (CompareMem (DevicePath1, DevicePath2, Size1) != 0) {\r | |
63 | return FALSE;\r | |
64 | }\r | |
65 | \r | |
66 | return TRUE;\r | |
67 | }\r | |
68 | \r | |
69 | /**\r | |
70 | Check hot plug support and initialize root hot plug private data.\r | |
71 | \r | |
72 | If Hot Plug is supported by the platform, call PCI Hot Plug Init protocol\r | |
73 | to get PCI Hot Plug controller's information and constructor the root hot plug\r | |
74 | private data structure.\r | |
75 | \r | |
76 | @retval EFI_SUCCESS They are same.\r | |
fcdfcdbf | 77 | @retval EFI_UNSUPPORTED No PCI Hot Plug controller on the platform.\r |
9060e3ec | 78 | @retval EFI_OUT_OF_RESOURCES No memory to constructor root hot plug private\r |
79 | data structure.\r | |
80 | \r | |
81 | **/\r | |
82 | EFI_STATUS\r | |
83 | InitializeHotPlugSupport (\r | |
84 | VOID\r | |
85 | )\r | |
86 | {\r | |
87 | EFI_STATUS Status;\r | |
88 | EFI_HPC_LOCATION *HpcList;\r | |
89 | UINTN HpcCount;\r | |
90 | \r | |
91 | //\r | |
92 | // Locate the PciHotPlugInit Protocol\r | |
93 | // If it doesn't exist, that means there is no\r | |
94 | // hot plug controller supported on the platform\r | |
95 | // the PCI Bus driver is running on. HotPlug Support\r | |
96 | // is an optional feature, so absence of the protocol\r | |
97 | // won't incur the penalty.\r | |
98 | //\r | |
99 | Status = gBS->LocateProtocol (\r | |
100 | &gEfiPciHotPlugInitProtocolGuid,\r | |
101 | NULL,\r | |
1436aea4 | 102 | (VOID **)&gPciHotPlugInit\r |
9060e3ec | 103 | );\r |
104 | \r | |
105 | if (EFI_ERROR (Status)) {\r | |
106 | return EFI_UNSUPPORTED;\r | |
107 | }\r | |
108 | \r | |
109 | Status = gPciHotPlugInit->GetRootHpcList (\r | |
110 | gPciHotPlugInit,\r | |
111 | &HpcCount,\r | |
112 | &HpcList\r | |
113 | );\r | |
114 | \r | |
115 | if (!EFI_ERROR (Status)) {\r | |
1436aea4 MK |
116 | gPciRootHpcPool = HpcList;\r |
117 | gPciRootHpcCount = HpcCount;\r | |
118 | gPciRootHpcData = AllocateZeroPool (sizeof (ROOT_HPC_DATA) * gPciRootHpcCount);\r | |
9060e3ec | 119 | if (gPciRootHpcData == NULL) {\r |
120 | return EFI_OUT_OF_RESOURCES;\r | |
121 | }\r | |
122 | }\r | |
123 | \r | |
124 | return EFI_SUCCESS;\r | |
125 | }\r | |
126 | \r | |
127 | /**\r | |
128 | Test whether device path is for root pci hot plug bus.\r | |
129 | \r | |
130 | @param HpbDevicePath A pointer to device path data structure to be tested.\r | |
131 | @param HpIndex If HpIndex is not NULL, return the index of root hot\r | |
fcdfcdbf | 132 | plug in global array when TRUE is returned.\r |
9060e3ec | 133 | \r |
134 | @retval TRUE The device path is for root pci hot plug bus.\r | |
135 | @retval FALSE The device path is not for root pci hot plug bus.\r | |
136 | \r | |
137 | **/\r | |
138 | BOOLEAN\r | |
139 | IsRootPciHotPlugBus (\r | |
1436aea4 MK |
140 | IN EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath,\r |
141 | OUT UINTN *HpIndex OPTIONAL\r | |
9060e3ec | 142 | )\r |
143 | {\r | |
1436aea4 | 144 | UINTN Index;\r |
9060e3ec | 145 | \r |
146 | for (Index = 0; Index < gPciRootHpcCount; Index++) {\r | |
9060e3ec | 147 | if (EfiCompareDevicePath (gPciRootHpcPool[Index].HpbDevicePath, HpbDevicePath)) {\r |
9060e3ec | 148 | if (HpIndex != NULL) {\r |
149 | *HpIndex = Index;\r | |
150 | }\r | |
151 | \r | |
152 | return TRUE;\r | |
153 | }\r | |
154 | }\r | |
155 | \r | |
156 | return FALSE;\r | |
157 | }\r | |
158 | \r | |
159 | /**\r | |
160 | Test whether device path is for root pci hot plug controller.\r | |
161 | \r | |
162 | @param HpcDevicePath A pointer to device path data structure to be tested.\r | |
163 | @param HpIndex If HpIndex is not NULL, return the index of root hot\r | |
fcdfcdbf | 164 | plug in global array when TRUE is returned.\r |
9060e3ec | 165 | \r |
166 | @retval TRUE The device path is for root pci hot plug controller.\r | |
167 | @retval FALSE The device path is not for root pci hot plug controller.\r | |
168 | \r | |
169 | **/\r | |
170 | BOOLEAN\r | |
171 | IsRootPciHotPlugController (\r | |
1436aea4 MK |
172 | IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,\r |
173 | OUT UINTN *HpIndex\r | |
9060e3ec | 174 | )\r |
175 | {\r | |
1436aea4 | 176 | UINTN Index;\r |
9060e3ec | 177 | \r |
178 | for (Index = 0; Index < gPciRootHpcCount; Index++) {\r | |
9060e3ec | 179 | if (EfiCompareDevicePath (gPciRootHpcPool[Index].HpcDevicePath, HpcDevicePath)) {\r |
9060e3ec | 180 | if (HpIndex != NULL) {\r |
181 | *HpIndex = Index;\r | |
182 | }\r | |
183 | \r | |
184 | return TRUE;\r | |
185 | }\r | |
186 | }\r | |
187 | \r | |
188 | return FALSE;\r | |
189 | }\r | |
190 | \r | |
191 | /**\r | |
192 | Creating event object for PCI Hot Plug controller.\r | |
193 | \r | |
194 | @param HpIndex Index of hot plug device in global array.\r | |
fcdfcdbf | 195 | @param Event The returned event that invoke this function.\r |
9060e3ec | 196 | \r |
fcdfcdbf | 197 | @return Status of create event.\r |
9060e3ec | 198 | \r |
199 | **/\r | |
200 | EFI_STATUS\r | |
201 | CreateEventForHpc (\r | |
202 | IN UINTN HpIndex,\r | |
203 | OUT EFI_EVENT *Event\r | |
204 | )\r | |
205 | {\r | |
206 | EFI_STATUS Status;\r | |
207 | \r | |
208 | Status = gBS->CreateEvent (\r | |
209 | EVT_NOTIFY_SIGNAL,\r | |
210 | TPL_CALLBACK,\r | |
211 | PciHPCInitialized,\r | |
212 | gPciRootHpcData + HpIndex,\r | |
213 | &((gPciRootHpcData + HpIndex)->Event)\r | |
214 | );\r | |
215 | \r | |
216 | if (!EFI_ERROR (Status)) {\r | |
217 | *Event = (gPciRootHpcData + HpIndex)->Event;\r | |
218 | }\r | |
219 | \r | |
220 | return Status;\r | |
221 | }\r | |
222 | \r | |
223 | /**\r | |
224 | Wait for all root PCI Hot Plug controller finished initializing.\r | |
225 | \r | |
226 | @param TimeoutInMicroSeconds Microseconds to wait for all root HPCs' initialization.\r | |
227 | \r | |
228 | @retval EFI_SUCCESS All HPCs initialization finished.\r | |
229 | @retval EFI_TIMEOUT Not ALL HPCs initialization finished in Microseconds.\r | |
230 | \r | |
231 | **/\r | |
232 | EFI_STATUS\r | |
233 | AllRootHPCInitialized (\r | |
1436aea4 | 234 | IN UINTN TimeoutInMicroSeconds\r |
9060e3ec | 235 | )\r |
236 | {\r | |
237 | UINT32 Delay;\r | |
238 | UINTN Index;\r | |
239 | \r | |
1436aea4 | 240 | Delay = (UINT32)((TimeoutInMicroSeconds / 30) + 1);\r |
9060e3ec | 241 | \r |
242 | do {\r | |
243 | for (Index = 0; Index < gPciRootHpcCount; Index++) {\r | |
55565b08 | 244 | if (gPciRootHpcData[Index].Found && !gPciRootHpcData[Index].Initialized) {\r |
9060e3ec | 245 | break;\r |
246 | }\r | |
247 | }\r | |
248 | \r | |
249 | if (Index == gPciRootHpcCount) {\r | |
250 | return EFI_SUCCESS;\r | |
251 | }\r | |
252 | \r | |
253 | //\r | |
254 | // Stall for 30 microseconds..\r | |
255 | //\r | |
256 | gBS->Stall (30);\r | |
257 | \r | |
258 | Delay--;\r | |
9060e3ec | 259 | } while (Delay > 0);\r |
260 | \r | |
261 | return EFI_TIMEOUT;\r | |
262 | }\r | |
263 | \r | |
264 | /**\r | |
265 | Check whether PCI-PCI bridge has PCI Hot Plug capability register block.\r | |
266 | \r | |
267 | @param PciIoDevice A Pointer to the PCI-PCI bridge.\r | |
268 | \r | |
269 | @retval TRUE PCI device is HPC.\r | |
270 | @retval FALSE PCI device is not HPC.\r | |
271 | \r | |
272 | **/\r | |
273 | BOOLEAN\r | |
274 | IsSHPC (\r | |
1436aea4 | 275 | IN PCI_IO_DEVICE *PciIoDevice\r |
9060e3ec | 276 | )\r |
277 | {\r | |
9060e3ec | 278 | EFI_STATUS Status;\r |
279 | UINT8 Offset;\r | |
280 | \r | |
281 | if (PciIoDevice == NULL) {\r | |
282 | return FALSE;\r | |
283 | }\r | |
284 | \r | |
285 | Offset = 0;\r | |
286 | Status = LocateCapabilityRegBlock (\r | |
1436aea4 MK |
287 | PciIoDevice,\r |
288 | EFI_PCI_CAPABILITY_ID_SHPC,\r | |
289 | &Offset,\r | |
290 | NULL\r | |
291 | );\r | |
9060e3ec | 292 | \r |
293 | //\r | |
294 | // If the PCI-PCI bridge has the hot plug controller build-in,\r | |
295 | // then return TRUE;\r | |
296 | //\r | |
297 | if (!EFI_ERROR (Status)) {\r | |
298 | return TRUE;\r | |
299 | }\r | |
300 | \r | |
301 | return FALSE;\r | |
302 | }\r | |
303 | \r | |
ffdd3376 LE |
304 | /**\r |
305 | Check whether PciIoDevice supports PCIe hotplug.\r | |
306 | \r | |
307 | This is equivalent to the following condition:\r | |
308 | - the device is either a PCIe switch downstream port or a root port,\r | |
309 | - and the device has the SlotImplemented bit set in its PCIe capability\r | |
310 | register,\r | |
311 | - and the device has the HotPlugCapable bit set in its slot capabilities\r | |
312 | register.\r | |
313 | \r | |
314 | @param[in] PciIoDevice The device being checked.\r | |
315 | \r | |
fcdfcdbf | 316 | @retval TRUE PciIoDevice is a PCIe port that accepts a hot-plugged device.\r |
ffdd3376 LE |
317 | @retval FALSE Otherwise.\r |
318 | \r | |
319 | **/\r | |
320 | BOOLEAN\r | |
321 | SupportsPcieHotplug (\r | |
1436aea4 | 322 | IN PCI_IO_DEVICE *PciIoDevice\r |
ffdd3376 LE |
323 | )\r |
324 | {\r | |
1436aea4 MK |
325 | UINT32 Offset;\r |
326 | EFI_STATUS Status;\r | |
327 | PCI_REG_PCIE_CAPABILITY Capability;\r | |
328 | PCI_REG_PCIE_SLOT_CAPABILITY SlotCapability;\r | |
ffdd3376 LE |
329 | \r |
330 | if (PciIoDevice == NULL) {\r | |
331 | return FALSE;\r | |
332 | }\r | |
333 | \r | |
334 | //\r | |
335 | // Read the PCI Express Capabilities Register\r | |
336 | //\r | |
337 | if (!PciIoDevice->IsPciExp) {\r | |
338 | return FALSE;\r | |
339 | }\r | |
1436aea4 | 340 | \r |
ffdd3376 LE |
341 | Offset = PciIoDevice->PciExpressCapabilityOffset +\r |
342 | OFFSET_OF (PCI_CAPABILITY_PCIEXP, Capability);\r | |
343 | Status = PciIoDevice->PciIo.Pci.Read (\r | |
344 | &PciIoDevice->PciIo,\r | |
345 | EfiPciIoWidthUint16,\r | |
346 | Offset,\r | |
347 | 1,\r | |
348 | &Capability\r | |
349 | );\r | |
350 | if (EFI_ERROR (Status)) {\r | |
351 | return FALSE;\r | |
352 | }\r | |
353 | \r | |
354 | //\r | |
355 | // Check the contents of the register\r | |
356 | //\r | |
357 | switch (Capability.Bits.DevicePortType) {\r | |
1436aea4 MK |
358 | case PCIE_DEVICE_PORT_TYPE_ROOT_PORT:\r |
359 | case PCIE_DEVICE_PORT_TYPE_DOWNSTREAM_PORT:\r | |
360 | break;\r | |
361 | default:\r | |
362 | return FALSE;\r | |
ffdd3376 | 363 | }\r |
1436aea4 | 364 | \r |
ffdd3376 LE |
365 | if (!Capability.Bits.SlotImplemented) {\r |
366 | return FALSE;\r | |
367 | }\r | |
368 | \r | |
369 | //\r | |
370 | // Read the Slot Capabilities Register\r | |
371 | //\r | |
372 | Offset = PciIoDevice->PciExpressCapabilityOffset +\r | |
373 | OFFSET_OF (PCI_CAPABILITY_PCIEXP, SlotCapability);\r | |
374 | Status = PciIoDevice->PciIo.Pci.Read (\r | |
375 | &PciIoDevice->PciIo,\r | |
376 | EfiPciIoWidthUint32,\r | |
377 | Offset,\r | |
378 | 1,\r | |
379 | &SlotCapability\r | |
380 | );\r | |
381 | if (EFI_ERROR (Status)) {\r | |
382 | return FALSE;\r | |
383 | }\r | |
384 | \r | |
385 | //\r | |
386 | // Check the contents of the register\r | |
387 | //\r | |
388 | if (SlotCapability.Bits.HotPlugCapable) {\r | |
389 | return TRUE;\r | |
390 | }\r | |
1436aea4 | 391 | \r |
ffdd3376 LE |
392 | return FALSE;\r |
393 | }\r | |
394 | \r | |
9060e3ec | 395 | /**\r |
396 | Get resource padding if the specified PCI bridge is a hot plug bus.\r | |
397 | \r | |
398 | @param PciIoDevice PCI bridge instance.\r | |
399 | \r | |
400 | **/\r | |
401 | VOID\r | |
402 | GetResourcePaddingForHpb (\r | |
1436aea4 | 403 | IN PCI_IO_DEVICE *PciIoDevice\r |
9060e3ec | 404 | )\r |
405 | {\r | |
1436aea4 MK |
406 | EFI_STATUS Status;\r |
407 | EFI_HPC_STATE State;\r | |
408 | UINT64 PciAddress;\r | |
409 | EFI_HPC_PADDING_ATTRIBUTES Attributes;\r | |
410 | EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;\r | |
9060e3ec | 411 | \r |
412 | if (IsPciHotPlugBus (PciIoDevice)) {\r | |
413 | //\r | |
414 | // If PCI-PCI bridge device is PCI Hot Plug bus.\r | |
415 | //\r | |
416 | PciAddress = EFI_PCI_ADDRESS (PciIoDevice->BusNumber, PciIoDevice->DeviceNumber, PciIoDevice->FunctionNumber, 0);\r | |
1436aea4 MK |
417 | Status = gPciHotPlugInit->GetResourcePadding (\r |
418 | gPciHotPlugInit,\r | |
419 | PciIoDevice->DevicePath,\r | |
420 | PciAddress,\r | |
421 | &State,\r | |
422 | (VOID **)&Descriptors,\r | |
423 | &Attributes\r | |
424 | );\r | |
9060e3ec | 425 | \r |
426 | if (EFI_ERROR (Status)) {\r | |
427 | return;\r | |
428 | }\r | |
429 | \r | |
1436aea4 | 430 | if (((State & EFI_HPC_STATE_ENABLED) != 0) && ((State & EFI_HPC_STATE_INITIALIZED) != 0)) {\r |
9060e3ec | 431 | PciIoDevice->ResourcePaddingDescriptors = Descriptors;\r |
432 | PciIoDevice->PaddingAttributes = Attributes;\r | |
433 | }\r | |
434 | \r | |
435 | return;\r | |
436 | }\r | |
437 | }\r | |
438 | \r | |
439 | /**\r | |
440 | Test whether PCI device is hot plug bus.\r | |
441 | \r | |
442 | @param PciIoDevice PCI device instance.\r | |
443 | \r | |
444 | @retval TRUE PCI device is a hot plug bus.\r | |
445 | @retval FALSE PCI device is not a hot plug bus.\r | |
446 | \r | |
447 | **/\r | |
448 | BOOLEAN\r | |
449 | IsPciHotPlugBus (\r | |
1436aea4 | 450 | PCI_IO_DEVICE *PciIoDevice\r |
9060e3ec | 451 | )\r |
452 | {\r | |
453 | if (IsSHPC (PciIoDevice)) {\r | |
454 | //\r | |
455 | // If the PPB has the hot plug controller build-in,\r | |
456 | // then return TRUE;\r | |
457 | //\r | |
458 | return TRUE;\r | |
459 | }\r | |
460 | \r | |
ffdd3376 LE |
461 | if (SupportsPcieHotplug (PciIoDevice)) {\r |
462 | //\r | |
463 | // If the PPB is a PCIe root complex port or a switch downstream port, and\r | |
464 | // implements a hot-plug capable slot, then also return TRUE.\r | |
465 | //\r | |
466 | return TRUE;\r | |
467 | }\r | |
468 | \r | |
9060e3ec | 469 | //\r |
470 | // Otherwise, see if it is a Root HPC\r | |
471 | //\r | |
1436aea4 | 472 | if (IsRootPciHotPlugBus (PciIoDevice->DevicePath, NULL)) {\r |
9060e3ec | 473 | return TRUE;\r |
474 | }\r | |
475 | \r | |
476 | return FALSE;\r | |
477 | }\r |