]> git.proxmox.com Git - mirror_edk2.git/blame - MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride protocol
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / SdMmcPciHcDxe / EmmcDevice.c
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48555339
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1/** @file\r
2 This file provides some helper functions which are specific for EMMC device.\r
3\r
8c983d3e 4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
48555339
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5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "SdMmcPciHcDxe.h"\r
16\r
17/**\r
18 Send command GO_IDLE_STATE (CMD0 with argument of 0x00000000) to the device to\r
19 make it go to Idle State.\r
20\r
21 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
22\r
23 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
24 @param[in] Slot The slot number of the SD card to send the command to.\r
25\r
26 @retval EFI_SUCCESS The EMMC device is reset correctly.\r
27 @retval Others The device reset fails.\r
28\r
29**/\r
30EFI_STATUS\r
31EmmcReset (\r
32 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
33 IN UINT8 Slot\r
34 )\r
35{\r
36 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
37 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
38 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
39 EFI_STATUS Status;\r
40\r
41 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
42 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
43 ZeroMem (&Packet, sizeof (Packet));\r
44\r
45 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
46 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
47 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
48\r
49 SdMmcCmdBlk.CommandIndex = EMMC_GO_IDLE_STATE;\r
50 SdMmcCmdBlk.CommandType = SdMmcCommandTypeBc;\r
51 SdMmcCmdBlk.ResponseType = 0;\r
52 SdMmcCmdBlk.CommandArgument = 0;\r
53\r
9252d67a
JZ
54 gBS->Stall (1000);\r
55\r
48555339
FT
56 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
57\r
58 return Status;\r
59}\r
60\r
61/**\r
62 Send command SEND_OP_COND to the EMMC device to get the data of the OCR register.\r
63\r
64 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
65\r
66 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
67 @param[in] Slot The slot number of the SD card to send the command to.\r
68 @param[in, out] Argument On input, the argument of SEND_OP_COND is to send to the device.\r
69 On output, the argument is the value of OCR register.\r
70\r
71 @retval EFI_SUCCESS The operation is done correctly.\r
72 @retval Others The operation fails.\r
73\r
74**/\r
75EFI_STATUS\r
76EmmcGetOcr (\r
77 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
78 IN UINT8 Slot,\r
79 IN OUT UINT32 *Argument\r
80 )\r
81{\r
82 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
83 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
84 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
85 EFI_STATUS Status;\r
86\r
87 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
88 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
89 ZeroMem (&Packet, sizeof (Packet));\r
90\r
91 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
92 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
93 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
94\r
95 SdMmcCmdBlk.CommandIndex = EMMC_SEND_OP_COND;\r
96 SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;\r
97 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR3;\r
98 SdMmcCmdBlk.CommandArgument = *Argument;\r
99\r
100 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
101 if (!EFI_ERROR (Status)) {\r
102 //\r
103 // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.\r
104 //\r
105 *Argument = SdMmcStatusBlk.Resp0;\r
106 }\r
107\r
108 return Status;\r
109}\r
110\r
111/**\r
112 Broadcast command ALL_SEND_CID to the bus to ask all the EMMC devices to send the\r
113 data of their CID registers.\r
114\r
115 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
116\r
117 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
118 @param[in] Slot The slot number of the SD card to send the command to.\r
119\r
120 @retval EFI_SUCCESS The operation is done correctly.\r
121 @retval Others The operation fails.\r
122\r
123**/\r
124EFI_STATUS\r
125EmmcGetAllCid (\r
126 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
127 IN UINT8 Slot\r
128 )\r
129{\r
130 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
131 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
132 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
133 EFI_STATUS Status;\r
134\r
135 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
136 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
137 ZeroMem (&Packet, sizeof (Packet));\r
138\r
139 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
140 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
141 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
142\r
143 SdMmcCmdBlk.CommandIndex = EMMC_ALL_SEND_CID;\r
144 SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;\r
145 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;\r
146 SdMmcCmdBlk.CommandArgument = 0;\r
147\r
148 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
149\r
150 return Status;\r
151}\r
152\r
153/**\r
154 Send command SET_RELATIVE_ADDR to the EMMC device to assign a Relative device\r
155 Address (RCA).\r
156\r
157 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
158\r
159 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
160 @param[in] Slot The slot number of the SD card to send the command to.\r
161 @param[in] Rca The relative device address to be assigned.\r
162\r
163 @retval EFI_SUCCESS The operation is done correctly.\r
164 @retval Others The operation fails.\r
165\r
166**/\r
167EFI_STATUS\r
168EmmcSetRca (\r
169 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
170 IN UINT8 Slot,\r
171 IN UINT16 Rca\r
172 )\r
173{\r
174 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
175 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
176 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
177 EFI_STATUS Status;\r
178\r
179 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
180 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
181 ZeroMem (&Packet, sizeof (Packet));\r
182\r
183 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
184 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
185 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
186\r
187 SdMmcCmdBlk.CommandIndex = EMMC_SET_RELATIVE_ADDR;\r
188 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
189 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
190 SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
191\r
192 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
193\r
194 return Status;\r
195}\r
196\r
197/**\r
198 Send command SEND_CSD to the EMMC device to get the data of the CSD register.\r
199\r
200 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
201\r
202 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
203 @param[in] Slot The slot number of the SD card to send the command to.\r
204 @param[in] Rca The relative device address of selected device.\r
205 @param[out] Csd The buffer to store the content of the CSD register.\r
206 Note the caller should ignore the lowest byte of this\r
207 buffer as the content of this byte is meaningless even\r
208 if the operation succeeds.\r
209\r
210 @retval EFI_SUCCESS The operation is done correctly.\r
211 @retval Others The operation fails.\r
212\r
213**/\r
214EFI_STATUS\r
215EmmcGetCsd (\r
216 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
217 IN UINT8 Slot,\r
218 IN UINT16 Rca,\r
219 OUT EMMC_CSD *Csd\r
220 )\r
221{\r
222 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
223 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
224 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
225 EFI_STATUS Status;\r
226\r
227 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
228 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
229 ZeroMem (&Packet, sizeof (Packet));\r
230\r
231 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
232 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
233 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
234\r
235 SdMmcCmdBlk.CommandIndex = EMMC_SEND_CSD;\r
236 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
237 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;\r
238 SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
239\r
240 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
241 if (!EFI_ERROR (Status)) {\r
242 //\r
243 // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.\r
244 //\r
245 CopyMem (((UINT8*)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);\r
246 }\r
247\r
248 return Status;\r
249}\r
250\r
251/**\r
252 Send command SELECT_DESELECT_CARD to the EMMC device to select/deselect it.\r
253\r
254 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
255\r
256 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
257 @param[in] Slot The slot number of the SD card to send the command to.\r
258 @param[in] Rca The relative device address of selected device.\r
259\r
260 @retval EFI_SUCCESS The operation is done correctly.\r
261 @retval Others The operation fails.\r
262\r
263**/\r
264EFI_STATUS\r
265EmmcSelect (\r
266 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
267 IN UINT8 Slot,\r
268 IN UINT16 Rca\r
269 )\r
270{\r
271 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
272 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
273 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
274 EFI_STATUS Status;\r
275\r
276 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
277 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
278 ZeroMem (&Packet, sizeof (Packet));\r
279\r
280 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
281 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
282 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
283\r
284 SdMmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;\r
285 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
286 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
287 SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
288\r
289 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
290\r
291 return Status;\r
292}\r
293\r
294/**\r
295 Send command SEND_EXT_CSD to the EMMC device to get the data of the EXT_CSD register.\r
296\r
297 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
298\r
299 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
300 @param[in] Slot The slot number of the SD card to send the command to.\r
301 @param[out] ExtCsd The buffer to store the content of the EXT_CSD register.\r
302\r
303 @retval EFI_SUCCESS The operation is done correctly.\r
304 @retval Others The operation fails.\r
305\r
306**/\r
307EFI_STATUS\r
308EmmcGetExtCsd (\r
309 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
310 IN UINT8 Slot,\r
311 OUT EMMC_EXT_CSD *ExtCsd\r
312 )\r
313{\r
314 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
315 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
316 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
317 EFI_STATUS Status;\r
318\r
319 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
320 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
321 ZeroMem (&Packet, sizeof (Packet));\r
322\r
323 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
324 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
325 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
326\r
327 SdMmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;\r
328 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;\r
329 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
330 SdMmcCmdBlk.CommandArgument = 0x00000000;\r
331\r
332 Packet.InDataBuffer = ExtCsd;\r
333 Packet.InTransferLength = sizeof (EMMC_EXT_CSD);\r
334\r
335 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
336 return Status;\r
337}\r
338\r
339/**\r
340 Send command SWITCH to the EMMC device to switch the mode of operation of the\r
341 selected Device or modifies the EXT_CSD registers.\r
342\r
343 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
344\r
345 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
346 @param[in] Slot The slot number of the SD card to send the command to.\r
347 @param[in] Access The access mode of SWTICH command.\r
348 @param[in] Index The offset of the field to be access.\r
349 @param[in] Value The value to be set to the specified field of EXT_CSD register.\r
350 @param[in] CmdSet The value of CmdSet field of EXT_CSD register.\r
351\r
352 @retval EFI_SUCCESS The operation is done correctly.\r
353 @retval Others The operation fails.\r
354\r
355**/\r
356EFI_STATUS\r
357EmmcSwitch (\r
358 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
359 IN UINT8 Slot,\r
360 IN UINT8 Access,\r
361 IN UINT8 Index,\r
362 IN UINT8 Value,\r
363 IN UINT8 CmdSet\r
364 )\r
365{\r
366 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
367 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
368 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
369 EFI_STATUS Status;\r
370\r
371 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
372 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
373 ZeroMem (&Packet, sizeof (Packet));\r
374\r
375 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
376 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
377 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
378\r
379 SdMmcCmdBlk.CommandIndex = EMMC_SWITCH;\r
380 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
381 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1b;\r
382 SdMmcCmdBlk.CommandArgument = (Access << 24) | (Index << 16) | (Value << 8) | CmdSet;\r
383\r
384 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
385\r
386 return Status;\r
387}\r
388\r
389/**\r
390 Send command SEND_STATUS to the addressed EMMC device to get its status register.\r
391\r
392 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
393\r
394 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
395 @param[in] Slot The slot number of the SD card to send the command to.\r
396 @param[in] Rca The relative device address of addressed device.\r
397 @param[out] DevStatus The returned device status.\r
398\r
399 @retval EFI_SUCCESS The operation is done correctly.\r
400 @retval Others The operation fails.\r
401\r
402**/\r
403EFI_STATUS\r
404EmmcSendStatus (\r
405 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
406 IN UINT8 Slot,\r
407 IN UINT16 Rca,\r
408 OUT UINT32 *DevStatus\r
409 )\r
410{\r
411 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
412 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
413 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
414 EFI_STATUS Status;\r
415\r
416 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
417 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
418 ZeroMem (&Packet, sizeof (Packet));\r
419\r
420 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
421 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
422 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
423\r
424 SdMmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;\r
425 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
426 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
427 SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
428\r
429 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
430 if (!EFI_ERROR (Status)) {\r
431 *DevStatus = SdMmcStatusBlk.Resp0;\r
432 }\r
433\r
434 return Status;\r
435}\r
436\r
437/**\r
438 Send command SEND_TUNING_BLOCK to the EMMC device for HS200 optimal sampling point\r
439 detection.\r
440\r
441 It may be sent up to 40 times until the host finishes the tuning procedure.\r
442\r
443 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 for details.\r
444\r
445 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
446 @param[in] Slot The slot number of the SD card to send the command to.\r
447 @param[in] BusWidth The bus width to work.\r
448\r
449 @retval EFI_SUCCESS The operation is done correctly.\r
450 @retval Others The operation fails.\r
451\r
452**/\r
453EFI_STATUS\r
454EmmcSendTuningBlk (\r
455 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
456 IN UINT8 Slot,\r
457 IN UINT8 BusWidth\r
458 )\r
459{\r
460 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
461 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
462 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
463 EFI_STATUS Status;\r
464 UINT8 TuningBlock[128];\r
465\r
466 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
467 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
468 ZeroMem (&Packet, sizeof (Packet));\r
469\r
470 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
471 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
472 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
473\r
474 SdMmcCmdBlk.CommandIndex = EMMC_SEND_TUNING_BLOCK;\r
475 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;\r
476 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
477 SdMmcCmdBlk.CommandArgument = 0;\r
478\r
479 Packet.InDataBuffer = TuningBlock;\r
480 if (BusWidth == 8) {\r
481 Packet.InTransferLength = sizeof (TuningBlock);\r
482 } else {\r
483 Packet.InTransferLength = 64;\r
484 }\r
485\r
486 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
487\r
488 return Status;\r
489}\r
490\r
491/**\r
492 Tunning the clock to get HS200 optimal sampling point.\r
493\r
494 Command SEND_TUNING_BLOCK may be sent up to 40 times until the host finishes the\r
495 tuning procedure.\r
496\r
497 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
498 Simplified Spec 3.0 Figure 2-29 for details.\r
499\r
500 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
501 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
502 @param[in] Slot The slot number of the SD card to send the command to.\r
503 @param[in] BusWidth The bus width to work.\r
504\r
505 @retval EFI_SUCCESS The operation is done correctly.\r
506 @retval Others The operation fails.\r
507\r
508**/\r
509EFI_STATUS\r
510EmmcTuningClkForHs200 (\r
511 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
512 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
513 IN UINT8 Slot,\r
514 IN UINT8 BusWidth\r
515 )\r
516{\r
517 EFI_STATUS Status;\r
518 UINT8 HostCtrl2;\r
519 UINT8 Retry;\r
520\r
521 //\r
522 // Notify the host that the sampling clock tuning procedure starts.\r
523 //\r
524 HostCtrl2 = BIT6;\r
525 Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
526 if (EFI_ERROR (Status)) {\r
527 return Status;\r
528 }\r
529 //\r
530 // Ask the device to send a sequence of tuning blocks till the tuning procedure is done.\r
531 //\r
532 Retry = 0;\r
533 do {\r
534 Status = EmmcSendTuningBlk (PassThru, Slot, BusWidth);\r
535 if (EFI_ERROR (Status)) {\r
e27ccaba 536 DEBUG ((DEBUG_ERROR, "EmmcTuningClkForHs200: Send tuning block fails with %r\n", Status));\r
48555339
FT
537 return Status;\r
538 }\r
539\r
540 Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, TRUE, sizeof (HostCtrl2), &HostCtrl2);\r
541 if (EFI_ERROR (Status)) {\r
542 return Status;\r
543 }\r
544\r
8c983d3e 545 if ((HostCtrl2 & (BIT6 | BIT7)) == 0) {\r
48555339
FT
546 break;\r
547 }\r
8c983d3e
FT
548\r
549 if ((HostCtrl2 & (BIT6 | BIT7)) == BIT7) {\r
550 return EFI_SUCCESS;\r
551 }\r
48555339
FT
552 } while (++Retry < 40);\r
553\r
e27ccaba 554 DEBUG ((DEBUG_ERROR, "EmmcTuningClkForHs200: Send tuning block fails at %d times with HostCtrl2 %02x\n", Retry, HostCtrl2));\r
8c983d3e
FT
555 //\r
556 // Abort the tuning procedure and reset the tuning circuit.\r
557 //\r
558 HostCtrl2 = (UINT8)~(BIT6 | BIT7);\r
559 Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
560 if (EFI_ERROR (Status)) {\r
561 return Status;\r
48555339 562 }\r
8c983d3e 563 return EFI_DEVICE_ERROR;\r
48555339
FT
564}\r
565\r
566/**\r
567 Switch the bus width to specified width.\r
568\r
569 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.9 and SD Host Controller\r
570 Simplified Spec 3.0 Figure 3-7 for details.\r
571\r
572 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
573 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
574 @param[in] Slot The slot number of the SD card to send the command to.\r
575 @param[in] Rca The relative device address to be assigned.\r
576 @param[in] IsDdr If TRUE, use dual data rate data simpling method. Otherwise\r
577 use single data rate data simpling method.\r
578 @param[in] BusWidth The bus width to be set, it could be 4 or 8.\r
579\r
580 @retval EFI_SUCCESS The operation is done correctly.\r
581 @retval Others The operation fails.\r
582\r
583**/\r
584EFI_STATUS\r
585EmmcSwitchBusWidth (\r
586 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
587 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
588 IN UINT8 Slot,\r
589 IN UINT16 Rca,\r
590 IN BOOLEAN IsDdr,\r
591 IN UINT8 BusWidth\r
592 )\r
593{\r
594 EFI_STATUS Status;\r
595 UINT8 Access;\r
596 UINT8 Index;\r
597 UINT8 Value;\r
598 UINT8 CmdSet;\r
599 UINT32 DevStatus;\r
600\r
601 //\r
602 // Write Byte, the Value field is written into the byte pointed by Index.\r
603 //\r
604 Access = 0x03;\r
605 Index = OFFSET_OF (EMMC_EXT_CSD, BusWidth);\r
606 if (BusWidth == 4) {\r
607 Value = 1;\r
608 } else if (BusWidth == 8) {\r
609 Value = 2;\r
610 } else {\r
611 return EFI_INVALID_PARAMETER;\r
612 }\r
613\r
614 if (IsDdr) {\r
615 Value += 4;\r
616 }\r
617\r
618 CmdSet = 0;\r
619 Status = EmmcSwitch (PassThru, Slot, Access, Index, Value, CmdSet);\r
620 if (EFI_ERROR (Status)) {\r
e27ccaba 621 DEBUG ((DEBUG_ERROR, "EmmcSwitchBusWidth: Switch to bus width %d fails with %r\n", BusWidth, Status));\r
48555339
FT
622 return Status;\r
623 }\r
624\r
625 Status = EmmcSendStatus (PassThru, Slot, Rca, &DevStatus);\r
626 if (EFI_ERROR (Status)) {\r
e27ccaba 627 DEBUG ((DEBUG_ERROR, "EmmcSwitchBusWidth: Send status fails with %r\n", Status));\r
48555339
FT
628 return Status;\r
629 }\r
630 //\r
631 // Check the switch operation is really successful or not.\r
632 //\r
633 if ((DevStatus & BIT7) != 0) {\r
e27ccaba 634 DEBUG ((DEBUG_ERROR, "EmmcSwitchBusWidth: The switch operation fails as DevStatus is 0x%08x\n", DevStatus));\r
48555339
FT
635 return EFI_DEVICE_ERROR;\r
636 }\r
637\r
638 Status = SdMmcHcSetBusWidth (PciIo, Slot, BusWidth);\r
639\r
640 return Status;\r
641}\r
642\r
643/**\r
644 Switch the clock frequency to the specified value.\r
645\r
646 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6 and SD Host Controller\r
647 Simplified Spec 3.0 Figure 3-3 for details.\r
648\r
649 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
650 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
651 @param[in] Slot The slot number of the SD card to send the command to.\r
652 @param[in] Rca The relative device address to be assigned.\r
653 @param[in] HsTiming The value to be written to HS_TIMING field of EXT_CSD register.\r
654 @param[in] ClockFreq The max clock frequency to be set, the unit is MHz.\r
655\r
656 @retval EFI_SUCCESS The operation is done correctly.\r
657 @retval Others The operation fails.\r
658\r
659**/\r
660EFI_STATUS\r
661EmmcSwitchClockFreq (\r
662 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
663 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
664 IN UINT8 Slot,\r
665 IN UINT16 Rca,\r
666 IN UINT8 HsTiming,\r
667 IN UINT32 ClockFreq\r
668 )\r
669{\r
670 EFI_STATUS Status;\r
671 UINT8 Access;\r
672 UINT8 Index;\r
673 UINT8 Value;\r
674 UINT8 CmdSet;\r
675 UINT32 DevStatus;\r
676 SD_MMC_HC_PRIVATE_DATA *Private;\r
677\r
678 Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
679 //\r
680 // Write Byte, the Value field is written into the byte pointed by Index.\r
681 //\r
682 Access = 0x03;\r
683 Index = OFFSET_OF (EMMC_EXT_CSD, HsTiming);\r
684 Value = HsTiming;\r
685 CmdSet = 0;\r
686\r
687 Status = EmmcSwitch (PassThru, Slot, Access, Index, Value, CmdSet);\r
688 if (EFI_ERROR (Status)) {\r
e27ccaba 689 DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: Switch to hstiming %d fails with %r\n", HsTiming, Status));\r
48555339
FT
690 return Status;\r
691 }\r
692\r
693 Status = EmmcSendStatus (PassThru, Slot, Rca, &DevStatus);\r
694 if (EFI_ERROR (Status)) {\r
e27ccaba 695 DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: Send status fails with %r\n", Status));\r
48555339
FT
696 return Status;\r
697 }\r
698 //\r
699 // Check the switch operation is really successful or not.\r
700 //\r
701 if ((DevStatus & BIT7) != 0) {\r
e27ccaba 702 DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: The switch operation fails as DevStatus is 0x%08x\n", DevStatus));\r
48555339
FT
703 return EFI_DEVICE_ERROR;\r
704 }\r
705 //\r
706 // Convert the clock freq unit from MHz to KHz.\r
707 //\r
708 Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private->Capability[Slot]);\r
709\r
710 return Status;\r
711}\r
712\r
713/**\r
714 Switch to the High Speed timing according to request.\r
715\r
716 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
717 Simplified Spec 3.0 Figure 2-29 for details.\r
718\r
719 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
720 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
721 @param[in] Slot The slot number of the SD card to send the command to.\r
722 @param[in] Rca The relative device address to be assigned.\r
723 @param[in] ClockFreq The max clock frequency to be set.\r
724 @param[in] IsDdr If TRUE, use dual data rate data simpling method. Otherwise\r
725 use single data rate data simpling method.\r
726 @param[in] BusWidth The bus width to be set, it could be 4 or 8.\r
727\r
728 @retval EFI_SUCCESS The operation is done correctly.\r
729 @retval Others The operation fails.\r
730\r
731**/\r
732EFI_STATUS\r
733EmmcSwitchToHighSpeed (\r
734 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
735 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
736 IN UINT8 Slot,\r
737 IN UINT16 Rca,\r
738 IN UINT32 ClockFreq,\r
739 IN BOOLEAN IsDdr,\r
740 IN UINT8 BusWidth\r
741 )\r
742{\r
a4708009
TM
743 EFI_STATUS Status;\r
744 UINT8 HsTiming;\r
745 UINT8 HostCtrl1;\r
746 SD_MMC_BUS_MODE Timing;\r
747 SD_MMC_HC_PRIVATE_DATA *Private;\r
748\r
749 Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
48555339
FT
750\r
751 Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusWidth);\r
752 if (EFI_ERROR (Status)) {\r
753 return Status;\r
754 }\r
755 //\r
756 // Set to Hight Speed timing\r
757 //\r
758 HostCtrl1 = BIT2;\r
759 Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
760 if (EFI_ERROR (Status)) {\r
761 return Status;\r
762 }\r
763\r
48555339 764 if (IsDdr) {\r
a4708009 765 Timing = SdMmcMmcHsDdr;\r
48555339 766 } else if (ClockFreq == 52) {\r
a4708009 767 Timing = SdMmcMmcHsSdr;\r
48555339 768 } else {\r
a4708009 769 Timing = SdMmcMmcLegacy;\r
48555339 770 }\r
a4708009
TM
771\r
772 Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, Timing);\r
48555339
FT
773 if (EFI_ERROR (Status)) {\r
774 return Status;\r
775 }\r
776\r
777 HsTiming = 1;\r
778 Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, ClockFreq);\r
48555339
FT
779\r
780 return Status;\r
781}\r
782\r
783/**\r
784 Switch to the HS200 timing according to request.\r
785\r
786 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
787 Simplified Spec 3.0 Figure 2-29 for details.\r
788\r
789 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
790 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
791 @param[in] Slot The slot number of the SD card to send the command to.\r
792 @param[in] Rca The relative device address to be assigned.\r
793 @param[in] ClockFreq The max clock frequency to be set.\r
794 @param[in] BusWidth The bus width to be set, it could be 4 or 8.\r
795\r
796 @retval EFI_SUCCESS The operation is done correctly.\r
797 @retval Others The operation fails.\r
798\r
799**/\r
800EFI_STATUS\r
801EmmcSwitchToHS200 (\r
802 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
803 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
804 IN UINT8 Slot,\r
805 IN UINT16 Rca,\r
806 IN UINT32 ClockFreq,\r
807 IN UINT8 BusWidth\r
808 )\r
809{\r
a4708009
TM
810 EFI_STATUS Status;\r
811 UINT8 HsTiming;\r
812 UINT16 ClockCtrl;\r
813 SD_MMC_BUS_MODE Timing;\r
814 SD_MMC_HC_PRIVATE_DATA *Private;\r
815\r
816 Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
48555339
FT
817\r
818 if ((BusWidth != 4) && (BusWidth != 8)) {\r
819 return EFI_INVALID_PARAMETER;\r
820 }\r
821\r
822 Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, FALSE, BusWidth);\r
823 if (EFI_ERROR (Status)) {\r
824 return Status;\r
825 }\r
826 //\r
827 // Set to HS200/SDR104 timing\r
828 //\r
829 //\r
830 // Stop bus clock at first\r
831 //\r
832 Status = SdMmcHcStopClock (PciIo, Slot);\r
833 if (EFI_ERROR (Status)) {\r
834 return Status;\r
835 }\r
a4708009
TM
836\r
837 Timing = SdMmcMmcHs200;\r
838\r
839 Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, Timing);\r
48555339
FT
840 if (EFI_ERROR (Status)) {\r
841 return Status;\r
842 }\r
a4708009 843\r
48555339
FT
844 //\r
845 // Wait Internal Clock Stable in the Clock Control register to be 1 before set SD Clock Enable bit\r
846 //\r
847 Status = SdMmcHcWaitMmioSet (\r
848 PciIo,\r
849 Slot,\r
850 SD_MMC_HC_CLOCK_CTRL,\r
851 sizeof (ClockCtrl),\r
852 BIT1,\r
853 BIT1,\r
854 SD_MMC_HC_GENERIC_TIMEOUT\r
855 );\r
856 if (EFI_ERROR (Status)) {\r
857 return Status;\r
858 }\r
859 //\r
860 // Set SD Clock Enable in the Clock Control register to 1\r
861 //\r
862 ClockCtrl = BIT2;\r
863 Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);\r
864\r
865 HsTiming = 2;\r
866 Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, ClockFreq);\r
867 if (EFI_ERROR (Status)) {\r
868 return Status;\r
869 }\r
870\r
871 Status = EmmcTuningClkForHs200 (PciIo, PassThru, Slot, BusWidth);\r
872\r
873 return Status;\r
874}\r
875\r
876/**\r
877 Switch to the HS400 timing according to request.\r
878\r
879 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
880 Simplified Spec 3.0 Figure 2-29 for details.\r
881\r
882 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
883 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
884 @param[in] Slot The slot number of the SD card to send the command to.\r
885 @param[in] Rca The relative device address to be assigned.\r
886 @param[in] ClockFreq The max clock frequency to be set.\r
887\r
888 @retval EFI_SUCCESS The operation is done correctly.\r
889 @retval Others The operation fails.\r
890\r
891**/\r
892EFI_STATUS\r
893EmmcSwitchToHS400 (\r
894 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
895 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
896 IN UINT8 Slot,\r
897 IN UINT16 Rca,\r
898 IN UINT32 ClockFreq\r
899 )\r
900{\r
a4708009
TM
901 EFI_STATUS Status;\r
902 UINT8 HsTiming;\r
903 SD_MMC_BUS_MODE Timing;\r
904 SD_MMC_HC_PRIVATE_DATA *Private;\r
905\r
906 Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
48555339
FT
907\r
908 Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, ClockFreq, 8);\r
909 if (EFI_ERROR (Status)) {\r
910 return Status;\r
911 }\r
912 //\r
913 // Set to Hight Speed timing and set the clock frequency to a value less than 52MHz.\r
914 //\r
915 HsTiming = 1;\r
916 Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, 52);\r
917 if (EFI_ERROR (Status)) {\r
918 return Status;\r
919 }\r
920 //\r
921 // HS400 mode must use 8 data lines.\r
922 //\r
923 Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, TRUE, 8);\r
924 if (EFI_ERROR (Status)) {\r
925 return Status;\r
926 }\r
a4708009
TM
927\r
928 Timing = SdMmcMmcHs400;\r
929\r
930 Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, Timing);\r
48555339
FT
931 if (EFI_ERROR (Status)) {\r
932 return Status;\r
933 }\r
934\r
935 HsTiming = 3;\r
936 Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, ClockFreq);\r
937\r
938 return Status;\r
939}\r
940\r
941/**\r
942 Switch the high speed timing according to request.\r
943\r
944 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
945 Simplified Spec 3.0 Figure 2-29 for details.\r
946\r
947 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
948 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
949 @param[in] Slot The slot number of the SD card to send the command to.\r
950 @param[in] Rca The relative device address to be assigned.\r
951\r
952 @retval EFI_SUCCESS The operation is done correctly.\r
953 @retval Others The operation fails.\r
954\r
955**/\r
956EFI_STATUS\r
957EmmcSetBusMode (\r
958 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
959 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
960 IN UINT8 Slot,\r
961 IN UINT16 Rca\r
962 )\r
963{\r
964 EFI_STATUS Status;\r
965 EMMC_CSD Csd;\r
966 EMMC_EXT_CSD ExtCsd;\r
967 UINT8 HsTiming;\r
968 BOOLEAN IsDdr;\r
969 UINT32 ClockFreq;\r
970 UINT8 BusWidth;\r
971 SD_MMC_HC_PRIVATE_DATA *Private;\r
972\r
973 Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
974\r
975 Status = EmmcGetCsd (PassThru, Slot, Rca, &Csd);\r
976 if (EFI_ERROR (Status)) {\r
e27ccaba 977 DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: GetCsd fails with %r\n", Status));\r
48555339
FT
978 return Status;\r
979 }\r
980\r
981 Status = EmmcSelect (PassThru, Slot, Rca);\r
982 if (EFI_ERROR (Status)) {\r
e27ccaba 983 DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: Select fails with %r\n", Status));\r
48555339
FT
984 return Status;\r
985 }\r
986\r
987 ASSERT (Private->Capability[Slot].BaseClkFreq != 0);\r
988 //\r
989 // Check if the Host Controller support 8bits bus width.\r
990 //\r
991 if (Private->Capability[Slot].BusWidth8 != 0) {\r
992 BusWidth = 8;\r
993 } else {\r
994 BusWidth = 4;\r
995 }\r
996 //\r
997 // Get Deivce_Type from EXT_CSD register.\r
998 //\r
999 Status = EmmcGetExtCsd (PassThru, Slot, &ExtCsd);\r
1000 if (EFI_ERROR (Status)) {\r
e27ccaba 1001 DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: GetExtCsd fails with %r\n", Status));\r
48555339
FT
1002 return Status;\r
1003 }\r
1004 //\r
1005 // Calculate supported bus speed/bus width/clock frequency.\r
1006 //\r
1007 HsTiming = 0;\r
1008 IsDdr = FALSE;\r
1009 ClockFreq = 0;\r
1010 if (((ExtCsd.DeviceType & (BIT4 | BIT5)) != 0) && (Private->Capability[Slot].Sdr104 != 0)) {\r
1011 HsTiming = 2;\r
1012 IsDdr = FALSE;\r
1013 ClockFreq = 200;\r
1014 } else if (((ExtCsd.DeviceType & (BIT2 | BIT3)) != 0) && (Private->Capability[Slot].Ddr50 != 0)) {\r
1015 HsTiming = 1;\r
1016 IsDdr = TRUE;\r
1017 ClockFreq = 52;\r
1018 } else if (((ExtCsd.DeviceType & BIT1) != 0) && (Private->Capability[Slot].HighSpeed != 0)) {\r
1019 HsTiming = 1;\r
1020 IsDdr = FALSE;\r
1021 ClockFreq = 52;\r
1022 } else if (((ExtCsd.DeviceType & BIT0) != 0) && (Private->Capability[Slot].HighSpeed != 0)) {\r
1023 HsTiming = 1;\r
1024 IsDdr = FALSE;\r
1025 ClockFreq = 26;\r
1026 }\r
1027 //\r
1028 // Check if both of the device and the host controller support HS400 DDR mode.\r
1029 //\r
1030 if (((ExtCsd.DeviceType & (BIT6 | BIT7)) != 0) && (Private->Capability[Slot].Hs400 != 0)) {\r
1031 //\r
1032 // The host controller supports 8bits bus.\r
1033 //\r
1034 ASSERT (BusWidth == 8);\r
1035 HsTiming = 3;\r
1036 IsDdr = TRUE;\r
1037 ClockFreq = 200;\r
1038 }\r
1039\r
1040 if ((ClockFreq == 0) || (HsTiming == 0)) {\r
1041 //\r
1042 // Continue using default setting.\r
1043 //\r
1044 return EFI_SUCCESS;\r
1045 }\r
1046\r
e27ccaba 1047 DEBUG ((DEBUG_INFO, "EmmcSetBusMode: HsTiming %d ClockFreq %d BusWidth %d Ddr %a\n", HsTiming, ClockFreq, BusWidth, IsDdr ? "TRUE":"FALSE"));\r
48555339
FT
1048\r
1049 if (HsTiming == 3) {\r
1050 //\r
1051 // Execute HS400 timing switch procedure\r
1052 //\r
1053 Status = EmmcSwitchToHS400 (PciIo, PassThru, Slot, Rca, ClockFreq);\r
1054 } else if (HsTiming == 2) {\r
1055 //\r
1056 // Execute HS200 timing switch procedure\r
1057 //\r
1058 Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, ClockFreq, BusWidth);\r
1059 } else {\r
1060 //\r
1061 // Execute High Speed timing switch procedure\r
1062 //\r
91ff0f05 1063 Status = EmmcSwitchToHighSpeed (PciIo, PassThru, Slot, Rca, ClockFreq, IsDdr, BusWidth);\r
48555339
FT
1064 }\r
1065\r
e27ccaba 1066 DEBUG ((DEBUG_INFO, "EmmcSetBusMode: Switch to %a %r\n", (HsTiming == 3) ? "HS400" : ((HsTiming == 2) ? "HS200" : "HighSpeed"), Status));\r
48555339
FT
1067\r
1068 return Status;\r
1069}\r
1070\r
1071/**\r
1072 Execute EMMC device identification procedure.\r
1073\r
1074 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
1075\r
1076 @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.\r
1077 @param[in] Slot The slot number of the SD card to send the command to.\r
1078\r
1079 @retval EFI_SUCCESS There is a EMMC card.\r
1080 @retval Others There is not a EMMC card.\r
1081\r
1082**/\r
1083EFI_STATUS\r
1084EmmcIdentification (\r
1085 IN SD_MMC_HC_PRIVATE_DATA *Private,\r
1086 IN UINT8 Slot\r
1087 )\r
1088{\r
1089 EFI_STATUS Status;\r
1090 EFI_PCI_IO_PROTOCOL *PciIo;\r
1091 EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;\r
1092 UINT32 Ocr;\r
1093 UINT16 Rca;\r
ec86d285 1094 UINTN Retry;\r
48555339
FT
1095\r
1096 PciIo = Private->PciIo;\r
1097 PassThru = &Private->PassThru;\r
1098\r
1099 Status = EmmcReset (PassThru, Slot);\r
1100 if (EFI_ERROR (Status)) {\r
e27ccaba 1101 DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd0 fails with %r\n", Status));\r
48555339
FT
1102 return Status;\r
1103 }\r
1104\r
ec86d285
FT
1105 Ocr = 0;\r
1106 Retry = 0;\r
48555339
FT
1107 do {\r
1108 Status = EmmcGetOcr (PassThru, Slot, &Ocr);\r
1109 if (EFI_ERROR (Status)) {\r
e27ccaba 1110 DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd1 fails with %r\n", Status));\r
48555339
FT
1111 return Status;\r
1112 }\r
1113 Ocr |= BIT30;\r
ec86d285
FT
1114\r
1115 if (Retry++ == 100) {\r
1116 DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd1 fails too many times\n"));\r
1117 return EFI_DEVICE_ERROR;\r
1118 }\r
1119 gBS->Stall(10 * 1000);\r
48555339
FT
1120 } while ((Ocr & BIT31) == 0);\r
1121\r
1122 Status = EmmcGetAllCid (PassThru, Slot);\r
1123 if (EFI_ERROR (Status)) {\r
e27ccaba 1124 DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd2 fails with %r\n", Status));\r
48555339
FT
1125 return Status;\r
1126 }\r
1127 //\r
1128 // Slot starts from 0 and valid RCA starts from 1.\r
1129 // Here we takes a simple formula to calculate the RCA.\r
1130 // Don't support multiple devices on the slot, that is\r
1131 // shared bus slot feature.\r
1132 //\r
1133 Rca = Slot + 1;\r
1134 Status = EmmcSetRca (PassThru, Slot, Rca);\r
1135 if (EFI_ERROR (Status)) {\r
e27ccaba 1136 DEBUG ((DEBUG_ERROR, "EmmcIdentification: Executing Cmd3 fails with %r\n", Status));\r
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1137 return Status;\r
1138 }\r
1139 //\r
1140 // Enter Data Tranfer Mode.\r
1141 //\r
e27ccaba 1142 DEBUG ((DEBUG_INFO, "EmmcIdentification: Found a EMMC device at slot [%d], RCA [%d]\n", Slot, Rca));\r
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1143 Private->Slot[Slot].CardType = EmmcCardType;\r
1144\r
1145 Status = EmmcSetBusMode (PciIo, PassThru, Slot, Rca);\r
1146\r
1147 return Status;\r
1148}\r
1149\r