]>
Commit | Line | Data |
---|---|---|
0591696e FT |
1 | /** @file\r |
2 | UfsPciHcPei driver is used to provide platform-dependent info, mainly UFS host controller\r | |
3 | MMIO base, to upper layer UFS drivers.\r | |
4 | \r | |
d1102dba | 5 | Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9d510e61 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
0591696e FT |
7 | \r |
8 | **/\r | |
9 | \r | |
10 | #include "UfsPciHcPei.h"\r | |
11 | \r | |
12 | EDKII_UFS_HOST_CONTROLLER_PPI mUfsHostControllerPpi = { GetUfsHcMmioBar };\r | |
13 | \r | |
14 | EFI_PEI_PPI_DESCRIPTOR mPpiList = {\r | |
15 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
16 | &gEdkiiPeiUfsHostControllerPpiGuid,\r | |
17 | &mUfsHostControllerPpi\r | |
18 | };\r | |
19 | \r | |
20 | /**\r | |
21 | Get the MMIO base address of UFS host controller.\r | |
22 | \r | |
23 | @param[in] This The protocol instance pointer.\r | |
24 | @param[in] ControllerId The ID of the UFS host controller.\r | |
25 | @param[out] MmioBar Pointer to the UFS host controller MMIO base address.\r | |
26 | \r | |
27 | @retval EFI_SUCCESS The operation succeeds.\r | |
28 | @retval EFI_INVALID_PARAMETER The parameters are invalid.\r | |
29 | \r | |
30 | **/\r | |
31 | EFI_STATUS\r | |
32 | EFIAPI\r | |
33 | GetUfsHcMmioBar (\r | |
34 | IN EDKII_UFS_HOST_CONTROLLER_PPI *This,\r | |
35 | IN UINT8 ControllerId,\r | |
36 | OUT UINTN *MmioBar\r | |
37 | )\r | |
38 | {\r | |
39 | UFS_HC_PEI_PRIVATE_DATA *Private;\r | |
40 | \r | |
41 | if ((This == NULL) || (MmioBar == NULL)) {\r | |
42 | return EFI_INVALID_PARAMETER;\r | |
43 | }\r | |
44 | \r | |
45 | Private = UFS_HC_PEI_PRIVATE_DATA_FROM_THIS (This);\r | |
46 | \r | |
47 | if (ControllerId >= Private->TotalUfsHcs) {\r | |
48 | return EFI_INVALID_PARAMETER;\r | |
49 | }\r | |
d1102dba | 50 | \r |
0591696e FT |
51 | *MmioBar = (UINTN)Private->UfsHcPciAddr[ControllerId];\r |
52 | \r | |
53 | return EFI_SUCCESS;\r | |
54 | }\r | |
55 | \r | |
56 | /**\r | |
57 | The user code starts with this function.\r | |
d1102dba | 58 | \r |
0591696e FT |
59 | @param FileHandle Handle of the file being invoked.\r |
60 | @param PeiServices Describes the list of possible PEI Services.\r | |
61 | \r | |
62 | @retval EFI_SUCCESS The driver is successfully initialized.\r | |
63 | @retval Others Can't initialize the driver.\r | |
64 | \r | |
65 | **/\r | |
66 | EFI_STATUS\r | |
67 | EFIAPI\r | |
68 | InitializeUfsHcPeim (\r | |
69 | IN EFI_PEI_FILE_HANDLE FileHandle,\r | |
70 | IN CONST EFI_PEI_SERVICES **PeiServices\r | |
71 | )\r | |
72 | {\r | |
73 | EFI_BOOT_MODE BootMode;\r | |
74 | EFI_STATUS Status;\r | |
75 | UINT16 Bus;\r | |
76 | UINT16 Device;\r | |
77 | UINT16 Function;\r | |
78 | UINT32 Size;\r | |
79 | UINT8 SubClass;\r | |
80 | UINT8 BaseClass;\r | |
81 | UFS_HC_PEI_PRIVATE_DATA *Private;\r | |
82 | \r | |
83 | //\r | |
84 | // Shadow this PEIM to run from memory\r | |
85 | //\r | |
86 | if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle))) {\r | |
87 | return EFI_SUCCESS;\r | |
88 | }\r | |
89 | \r | |
90 | Status = PeiServicesGetBootMode (&BootMode);\r | |
91 | ///\r | |
92 | /// We do not export this in S3 boot path, because it is only for recovery.\r | |
93 | ///\r | |
94 | if (BootMode == BOOT_ON_S3_RESUME) {\r | |
95 | return EFI_SUCCESS;\r | |
96 | }\r | |
97 | \r | |
98 | Private = (UFS_HC_PEI_PRIVATE_DATA *) AllocateZeroPool (sizeof (UFS_HC_PEI_PRIVATE_DATA));\r | |
99 | if (Private == NULL) {\r | |
100 | DEBUG ((EFI_D_ERROR, "Failed to allocate memory for UFS_HC_PEI_PRIVATE_DATA! \n"));\r | |
101 | return EFI_OUT_OF_RESOURCES;\r | |
102 | }\r | |
103 | \r | |
104 | Private->Signature = UFS_HC_PEI_SIGNATURE;\r | |
105 | Private->UfsHostControllerPpi = mUfsHostControllerPpi;\r | |
106 | Private->PpiList = mPpiList;\r | |
107 | Private->PpiList.Ppi = &Private->UfsHostControllerPpi;\r | |
108 | \r | |
109 | for (Bus = 0; Bus < 256; Bus++) {\r | |
110 | for (Device = 0; Device < 32; Device++) {\r | |
111 | for (Function = 0; Function < 8; Function++) {\r | |
112 | SubClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0A));\r | |
113 | BaseClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0B));\r | |
114 | \r | |
115 | if ((SubClass == 0x09) && (BaseClass == PCI_CLASS_MASS_STORAGE)) {\r | |
116 | //\r | |
117 | // Get the Ufs Pci host controller's MMIO region size.\r | |
118 | //\r | |
119 | PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));\r | |
120 | PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), 0xFFFFFFFF);\r | |
121 | Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET));\r | |
122 | //\r | |
123 | // Assign resource to the Ufs Pci host controller's MMIO BAR.\r | |
124 | // Enable the Ufs Pci host controller by setting BME and MSE bits of PCI_CMD register.\r | |
125 | //\r | |
126 | PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), (UINT32)(PcdGet32 (PcdUfsPciHostControllerMmioBase) + Size * Private->TotalUfsHcs));\r | |
127 | PciOr16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));\r | |
128 | //\r | |
129 | // Record the allocated Mmio base address.\r | |
130 | //\r | |
131 | Private->UfsHcPciAddr[Private->TotalUfsHcs] = PcdGet32 (PcdUfsPciHostControllerMmioBase) + Size * Private->TotalUfsHcs;\r | |
132 | Private->TotalUfsHcs++;\r | |
133 | ASSERT (Private->TotalUfsHcs < MAX_UFS_HCS);\r | |
134 | }\r | |
135 | }\r | |
136 | }\r | |
137 | }\r | |
138 | \r | |
139 | ///\r | |
140 | /// Install Ufs Host Controller PPI\r | |
141 | ///\r | |
142 | Status = PeiServicesInstallPpi (&Private->PpiList);\r | |
143 | \r | |
144 | ASSERT_EFI_ERROR (Status);\r | |
145 | return Status;\r | |
146 | }\r |