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913cb9dc | 1 | /** @file\r |
2 | \r | |
ab6495ea | 3 | The definition for UHCI driver model and HC protocol routines.\r |
4 | \r | |
d1102dba | 5 | Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9d510e61 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
913cb9dc | 7 | \r |
913cb9dc | 8 | **/\r |
9 | \r | |
ab6495ea | 10 | #ifndef _EFI_UHCI_H_\r |
11 | #define _EFI_UHCI_H_\r | |
913cb9dc | 12 | \r |
60c93673 | 13 | #include <Uefi.h>\r |
ed7748fe | 14 | \r |
913cb9dc | 15 | #include <Protocol/Usb2HostController.h>\r |
16 | #include <Protocol/UsbHostController.h>\r | |
17 | #include <Protocol/PciIo.h>\r | |
ed7748fe | 18 | \r |
0428a6cb | 19 | #include <Guid/EventGroup.h>\r |
20 | \r | |
913cb9dc | 21 | #include <Library/DebugLib.h>\r |
22 | #include <Library/BaseMemoryLib.h>\r | |
23 | #include <Library/UefiDriverEntryPoint.h>\r | |
24 | #include <Library/UefiBootServicesTableLib.h>\r | |
25 | #include <Library/UefiLib.h>\r | |
26 | #include <Library/BaseLib.h>\r | |
27 | #include <Library/MemoryAllocationLib.h>\r | |
dd4047a5 | 28 | #include <Library/PcdLib.h>\r |
37623a5c | 29 | #include <Library/ReportStatusCodeLib.h>\r |
913cb9dc | 30 | \r |
a261044c | 31 | #include <IndustryStandard/Pci.h>\r |
913cb9dc | 32 | \r |
1436aea4 | 33 | typedef struct _USB_HC_DEV USB_HC_DEV;\r |
913cb9dc | 34 | \r |
35 | #include "UsbHcMem.h"\r | |
36 | #include "UhciQueue.h"\r | |
37 | #include "UhciReg.h"\r | |
38 | #include "UhciSched.h"\r | |
39 | #include "UhciDebug.h"\r | |
aa79b0b3 | 40 | #include "ComponentName.h"\r |
913cb9dc | 41 | \r |
1ccdbf2a | 42 | //\r |
43 | // UHC timeout experience values\r | |
44 | //\r | |
45 | \r | |
1436aea4 MK |
46 | #define UHC_1_MICROSECOND 1\r |
47 | #define UHC_1_MILLISECOND (1000 * UHC_1_MICROSECOND)\r | |
48 | #define UHC_1_SECOND (1000 * UHC_1_MILLISECOND)\r | |
1ccdbf2a | 49 | \r |
50 | //\r | |
51 | // UHCI register operation timeout, set by experience\r | |
52 | //\r | |
1436aea4 | 53 | #define UHC_GENERIC_TIMEOUT UHC_1_SECOND\r |
1ccdbf2a | 54 | \r |
55 | //\r | |
56 | // Wait for force global resume(FGR) complete, refers to\r | |
57 | // specification[UHCI11-2.1.1]\r | |
58 | //\r | |
1436aea4 | 59 | #define UHC_FORCE_GLOBAL_RESUME_STALL (20 * UHC_1_MILLISECOND)\r |
68246fa8 | 60 | \r |
1ccdbf2a | 61 | //\r |
62 | // Wait for roothub port reset and recovery, reset stall\r | |
63 | // is set by experience, and recovery stall refers to\r | |
64 | // specification[UHCI11-2.1.1]\r | |
65 | //\r | |
66 | #define UHC_ROOT_PORT_RESET_STALL (50 * UHC_1_MILLISECOND)\r | |
67 | #define UHC_ROOT_PORT_RECOVERY_STALL (10 * UHC_1_MILLISECOND)\r | |
68 | \r | |
69 | //\r | |
70 | // Sync and Async transfer polling interval, set by experience,\r | |
71 | // and the unit of Async is 100us.\r | |
72 | //\r | |
1436aea4 MK |
73 | #define UHC_SYNC_POLL_INTERVAL (1 * UHC_1_MILLISECOND)\r |
74 | #define UHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)\r | |
913cb9dc | 75 | \r |
ab6495ea | 76 | //\r |
77 | // UHC raises TPL to TPL_NOTIFY to serialize all its operations\r | |
78 | // to protect shared data structures.\r | |
79 | //\r | |
1436aea4 | 80 | #define UHCI_TPL TPL_NOTIFY\r |
ab6495ea | 81 | \r |
1436aea4 | 82 | #define USB_HC_DEV_SIGNATURE SIGNATURE_32 ('u', 'h', 'c', 'i')\r |
913cb9dc | 83 | \r |
84 | #pragma pack(1)\r | |
85 | typedef struct {\r | |
1436aea4 MK |
86 | UINT8 ProgInterface;\r |
87 | UINT8 SubClassCode;\r | |
88 | UINT8 BaseCode;\r | |
913cb9dc | 89 | } USB_CLASSC;\r |
90 | #pragma pack()\r | |
91 | \r | |
913cb9dc | 92 | #define UHC_FROM_USB2_HC_PROTO(This) CR(This, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)\r |
93 | \r | |
94 | //\r | |
95 | // USB_HC_DEV support the UHCI hardware controller. It schedules\r | |
96 | // the asynchronous interrupt transfer with the same method as\r | |
97 | // EHCI: a reversed tree structure. For synchronous interrupt,\r | |
98 | // control and bulk transfer, it uses three static queue head to\r | |
99 | // schedule them. SyncIntQh is for interrupt transfer. LsCtrlQh is\r | |
100 | // for LOW speed control transfer, and FsCtrlBulkQh is for FULL\r | |
101 | // speed control or bulk transfer. This is because FULL speed contrl\r | |
102 | // or bulk transfer can reclaim the unused bandwidth. Some USB\r | |
103 | // device requires this bandwidth reclamation capability.\r | |
104 | //\r | |
c52fa98c | 105 | struct _USB_HC_DEV {\r |
1436aea4 MK |
106 | UINT32 Signature;\r |
107 | EFI_USB2_HC_PROTOCOL Usb2Hc;\r | |
108 | EFI_PCI_IO_PROTOCOL *PciIo;\r | |
109 | EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r | |
110 | UINT64 OriginalPciAttributes;\r | |
913cb9dc | 111 | \r |
112 | //\r | |
113 | // Schedule data structures\r | |
114 | //\r | |
1436aea4 MK |
115 | UINT32 *FrameBase; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.\r |
116 | UINT32 *FrameBaseHostAddr; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.\r | |
117 | UHCI_QH_SW *SyncIntQh;\r | |
118 | UHCI_QH_SW *CtrlQh;\r | |
119 | UHCI_QH_SW *BulkQh;\r | |
913cb9dc | 120 | \r |
121 | //\r | |
122 | // Structures to maintain asynchronus interrupt transfers.\r | |
123 | // When asynchronous interrutp transfer is unlinked from\r | |
124 | // the frame list, the hardware may still hold a pointer\r | |
125 | // to it. To synchronize with hardware, its resoureces are\r | |
126 | // released in two steps using Recycle and RecycleWait.\r | |
127 | // Check the asynchronous interrupt management routines.\r | |
128 | //\r | |
1436aea4 MK |
129 | LIST_ENTRY AsyncIntList;\r |
130 | EFI_EVENT AsyncIntMonitor;\r | |
131 | UHCI_ASYNC_REQUEST *Recycle;\r | |
132 | UHCI_ASYNC_REQUEST *RecycleWait;\r | |
913cb9dc | 133 | \r |
1436aea4 MK |
134 | UINTN RootPorts;\r |
135 | USBHC_MEM_POOL *MemPool;\r | |
136 | EFI_UNICODE_STRING_TABLE *CtrlNameTable;\r | |
137 | VOID *FrameMapping;\r | |
0428a6cb | 138 | \r |
139 | //\r | |
d1102dba | 140 | // ExitBootServicesEvent is used to stop the EHC DMA operation\r |
0428a6cb | 141 | // after exit boot service.\r |
142 | //\r | |
1436aea4 | 143 | EFI_EVENT ExitBootServiceEvent;\r |
c52fa98c | 144 | };\r |
913cb9dc | 145 | \r |
f527bce3 | 146 | extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;\r |
147 | extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;\r | |
148 | extern EFI_COMPONENT_NAME2_PROTOCOL gUhciComponentName2;\r | |
913cb9dc | 149 | \r |
aa79b0b3 | 150 | /**\r |
151 | Test to see if this driver supports ControllerHandle. Any\r | |
152 | ControllerHandle that has UsbHcProtocol installed will be supported.\r | |
153 | \r | |
154 | @param This Protocol instance pointer.\r | |
155 | @param Controller Handle of device to test.\r | |
156 | @param RemainingDevicePath Not used.\r | |
157 | \r | |
158 | @return EFI_SUCCESS This driver supports this device.\r | |
159 | @return EFI_UNSUPPORTED This driver does not support this device.\r | |
160 | \r | |
161 | **/\r | |
162 | EFI_STATUS\r | |
163 | EFIAPI\r | |
164 | UhciDriverBindingSupported (\r | |
1436aea4 MK |
165 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r |
166 | IN EFI_HANDLE Controller,\r | |
167 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
aa79b0b3 | 168 | );\r |
169 | \r | |
170 | /**\r | |
171 | Starting the Usb UHCI Driver.\r | |
172 | \r | |
173 | @param This Protocol instance pointer.\r | |
174 | @param Controller Handle of device to test.\r | |
175 | @param RemainingDevicePath Not used.\r | |
176 | \r | |
177 | @retval EFI_SUCCESS This driver supports this device.\r | |
178 | @retval EFI_UNSUPPORTED This driver does not support this device.\r | |
179 | @retval EFI_DEVICE_ERROR This driver cannot be started due to device Error.\r | |
180 | EFI_OUT_OF_RESOURCES- Failed due to resource shortage.\r | |
181 | \r | |
182 | **/\r | |
183 | EFI_STATUS\r | |
184 | EFIAPI\r | |
185 | UhciDriverBindingStart (\r | |
1436aea4 MK |
186 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r |
187 | IN EFI_HANDLE Controller,\r | |
188 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
aa79b0b3 | 189 | );\r |
190 | \r | |
191 | /**\r | |
ed356b9e | 192 | Stop this driver on ControllerHandle. Support stopping any child handles\r |
aa79b0b3 | 193 | created by this driver.\r |
194 | \r | |
195 | @param This Protocol instance pointer.\r | |
196 | @param Controller Handle of device to stop driver on.\r | |
197 | @param NumberOfChildren Number of Children in the ChildHandleBuffer.\r | |
198 | @param ChildHandleBuffer List of handles for the children we need to stop.\r | |
199 | \r | |
200 | @return EFI_SUCCESS\r | |
201 | @return others\r | |
202 | \r | |
203 | **/\r | |
204 | EFI_STATUS\r | |
205 | EFIAPI\r | |
206 | UhciDriverBindingStop (\r | |
1436aea4 MK |
207 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r |
208 | IN EFI_HANDLE Controller,\r | |
209 | IN UINTN NumberOfChildren,\r | |
210 | IN EFI_HANDLE *ChildHandleBuffer\r | |
aa79b0b3 | 211 | );\r |
212 | \r | |
913cb9dc | 213 | #endif\r |