MdeModulePkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciDxe / UhciQueue.h

/** @file\r
\r
  The definition for UHCI register operation routines.\r
\r
Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef _EFI_UHCI_QUEUE_H_\r
#define _EFI_UHCI_QUEUE_H_\r
\r
//\r
// Macroes used to set various links in UHCI's driver.\r
// In this UHCI driver, QH's horizontal link always pointers to other QH,\r
// and its vertical link always pointers to TD. TD's next pointer always\r
// pointers to other sibling TD. Frame link always pointers to QH because\r
// ISO transfer isn't supported.\r
//\r
// We should use UINT32 to access these pointers to void race conditions\r
// with hardware.\r
//\r
#define QH_HLINK(Pointer, Terminate)  \\r
        (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | 0x02 | ((Terminate) ? 0x01 : 0))\r
\r
#define QH_VLINK(Pointer, Terminate)  \\r
        (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | ((Terminate) ? 0x01 : 0))\r
\r
#define TD_LINK(Pointer, VertFirst, Terminate) \\r
        (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | \\r
         ((VertFirst) ? 0x04 : 0) | ((Terminate) ? 0x01 : 0))\r
\r
#define LINK_TERMINATED(Link) (((Link) & 0x01) != 0)\r
\r
#define UHCI_ADDR(QhOrTd)     ((VOID *) (UINTN) ((QhOrTd) & 0xFFFFFFF0))\r
\r
#pragma pack(1)\r
//\r
// Both links in QH has this internal structure:\r
//   Next pointer: 28, Reserved: 2, NextIsQh: 1, Terminate: 1\r
// This is the same as frame list entry.\r
//\r
typedef struct {\r
  UINT32              HorizonLink;\r
  UINT32              VerticalLink;\r
} UHCI_QH_HW;\r
\r
//\r
// Next link in TD has this internal structure:\r
//   Next pointer: 28, Reserved: 1, Vertical First: 1, NextIsQh: 1, Terminate: 1\r
//\r
typedef struct {\r
  UINT32              NextLink;\r
  UINT32              ActualLen   : 11;\r
  UINT32              Reserved1   : 5;\r
  UINT32              Status      : 8;\r
  UINT32              IntOnCpl    : 1;\r
  UINT32              IsIsoch     : 1;\r
  UINT32              LowSpeed    : 1;\r
  UINT32              ErrorCount  : 2;\r
  UINT32              ShortPacket : 1;\r
  UINT32              Reserved2   : 2;\r
  UINT32              PidCode     : 8;\r
  UINT32              DeviceAddr  : 7;\r
  UINT32              EndPoint    : 4;\r
  UINT32              DataToggle  : 1;\r
  UINT32              Reserved3   : 1;\r
  UINT32              MaxPacketLen: 11;\r
  UINT32              DataBuffer;\r
} UHCI_TD_HW;\r
#pragma pack()\r
\r
typedef struct _UHCI_TD_SW  UHCI_TD_SW;\r
typedef struct _UHCI_QH_SW  UHCI_QH_SW;\r
\r
struct _UHCI_QH_SW {\r
  UHCI_QH_HW        QhHw;\r
  UHCI_QH_SW        *NextQh;\r
  UHCI_TD_SW        *TDs;\r
  UINTN             Interval;\r
};\r
\r
struct _UHCI_TD_SW {\r
  UHCI_TD_HW        TdHw;\r
  UHCI_TD_SW        *NextTd;\r
  UINT8             *Data;\r
  UINT16            DataLen;\r
};\r
\r
\r
/**\r
  Link the TD To QH.\r
\r
  @param  Uhc         The UHCI device.\r
  @param  Qh          The queue head for the TD to link to.\r
  @param  Td          The TD to link.\r
\r
**/\r
VOID\r
UhciLinkTdToQh (\r
  IN USB_HC_DEV           *Uhc,\r
  IN UHCI_QH_SW           *Qh,\r
  IN UHCI_TD_SW           *Td\r
  );\r
\r
\r
/**\r
  Unlink TD from the QH.\r
\r
  @param  Qh          The queue head to unlink from.\r
  @param  Td          The TD to unlink.\r
\r
  @return None.\r
\r
**/\r
VOID\r
UhciUnlinkTdFromQh (\r
  IN UHCI_QH_SW           *Qh,\r
  IN UHCI_TD_SW           *Td\r
  );\r
\r
\r
/**\r
  Map address of request structure buffer.\r
\r
  @param  Uhc                The UHCI device.\r
  @param  Request            The user request buffer.\r
  @param  MappedAddr         Mapped address of request.\r
  @param  Map                Identificaion of this mapping to return.\r
\r
  @return EFI_SUCCESS        Success.\r
  @return EFI_DEVICE_ERROR   Fail to map the user request.\r
\r
**/\r
EFI_STATUS\r
UhciMapUserRequest (\r
  IN  USB_HC_DEV          *Uhc,\r
  IN  OUT VOID            *Request,\r
  OUT UINT8               **MappedAddr,\r
  OUT VOID                **Map\r
  );\r
\r
\r
/**\r
  Map address of user data buffer.\r
\r
  @param  Uhc                The UHCI device.\r
  @param  Direction          Direction of the data transfer.\r
  @param  Data               The user data buffer.\r
  @param  Len                Length of the user data.\r
  @param  PktId              Packet identificaion.\r
  @param  MappedAddr         Mapped address to return.\r
  @param  Map                Identificaion of this mapping to return.\r
\r
  @return EFI_SUCCESS        Success.\r
  @return EFI_DEVICE_ERROR   Fail to map the user data.\r
\r
**/\r
EFI_STATUS\r
UhciMapUserData (\r
  IN  USB_HC_DEV              *Uhc,\r
  IN  EFI_USB_DATA_DIRECTION  Direction,\r
  IN  VOID                    *Data,\r
  IN  OUT UINTN               *Len,\r
  OUT UINT8                   *PktId,\r
  OUT UINT8                   **MappedAddr,\r
  OUT VOID                    **Map\r
  );\r
\r
\r
/**\r
  Delete a list of TDs.\r
\r
  @param  Uhc         The UHCI device.\r
  @param  FirstTd     TD link list head.\r
\r
  @return None.\r
\r
**/\r
VOID\r
UhciDestoryTds (\r
  IN USB_HC_DEV           *Uhc,\r
  IN UHCI_TD_SW           *FirstTd\r
  );\r
\r
\r
/**\r
  Create an initialize a new queue head.\r
\r
  @param  Uhc         The UHCI device.\r
  @param  Interval    The polling interval for the queue.\r
\r
  @return The newly created queue header.\r
\r
**/\r
UHCI_QH_SW *\r
UhciCreateQh (\r
  IN  USB_HC_DEV        *Uhc,\r
  IN  UINTN             Interval\r
  );\r
\r
\r
/**\r
  Create Tds list for Control Transfer.\r
\r
  @param  Uhc         The UHCI device.\r
  @param  DeviceAddr  The device address.\r
  @param  DataPktId   Packet Identification of Data Tds.\r
  @param  Request     A pointer to cpu memory address of request structure buffer to transfer.\r
  @param  RequestPhy  A pointer to pci memory address of request structure buffer to transfer.\r
  @param  Data        A pointer to cpu memory address of user data buffer to transfer.\r
  @param  DataPhy     A pointer to pci memory address of user data buffer to transfer.\r
  @param  DataLen     Length of user data to transfer.\r
  @param  MaxPacket   Maximum packet size for control transfer.\r
  @param  IsLow       Full speed or low speed.\r
\r
  @return The Td list head for the control transfer.\r
\r
**/\r
UHCI_TD_SW *\r
UhciCreateCtrlTds (\r
  IN USB_HC_DEV           *Uhc,\r
  IN UINT8                DeviceAddr,\r
  IN UINT8                DataPktId,\r
  IN UINT8                *Request,\r
  IN UINT8                *RequestPhy,\r
  IN UINT8                *Data,\r
  IN UINT8                *DataPhy,\r
  IN UINTN                DataLen,\r
  IN UINT8                MaxPacket,\r
  IN BOOLEAN              IsLow\r
  );\r
\r
\r
/**\r
  Create Tds list for Bulk/Interrupt Transfer.\r
\r
  @param  Uhc         USB_HC_DEV.\r
  @param  DevAddr     Address of Device.\r
  @param  EndPoint    Endpoint Number.\r
  @param  PktId       Packet Identification of Data Tds.\r
  @param  Data        A pointer to cpu memory address of user data buffer to transfer.\r
  @param  DataPhy     A pointer to pci memory address of user data buffer to transfer.\r
  @param  DataLen     Length of user data to transfer.\r
  @param  DataToggle  Data Toggle Pointer.\r
  @param  MaxPacket   Maximum packet size for Bulk/Interrupt transfer.\r
  @param  IsLow       Is Low Speed Device.\r
\r
  @return The Tds list head for the bulk transfer.\r
\r
**/\r
UHCI_TD_SW *\r
UhciCreateBulkOrIntTds (\r
  IN USB_HC_DEV           *Uhc,\r
  IN UINT8                DevAddr,\r
  IN UINT8                EndPoint,\r
  IN UINT8                PktId,\r
  IN UINT8                *Data,\r
  IN UINT8                *DataPhy,\r
  IN UINTN                DataLen,\r
  IN OUT UINT8            *DataToggle,\r
  IN UINT8                MaxPacket,\r
  IN BOOLEAN              IsLow\r
  );\r
\r
#endif\r