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42eedea9 | 1 | /** @file \r |
ee6c452c | 2 | ACPI 1.0b definitions from the ACPI Specification, revision 1.0b\r |
568eb0cb | 3 | \r |
2b1cf49a | 4 | Copyright (c) 2006 - 2008, Intel Corporation\r |
568eb0cb | 5 | All rights reserved. This program and the accompanying materials \r |
6 | are licensed and made available under the terms and conditions of the BSD License \r | |
7 | which accompanies this distribution. The full text of the license may be found at \r | |
8 | http://opensource.org/licenses/bsd-license.php \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | **/\r | |
13 | \r | |
14 | #ifndef _ACPI_1_0_H_\r | |
15 | #define _ACPI_1_0_H_\r | |
16 | \r | |
1bc5d021 | 17 | ///\r |
18 | /// Common table header, this prefaces all ACPI tables, including FACS, but\r | |
19 | /// excluding the RSD PTR structure\r | |
20 | ///\r | |
ecc40942 | 21 | typedef struct {\r |
22 | UINT32 Signature;\r | |
23 | UINT32 Length;\r | |
24 | } EFI_ACPI_COMMON_HEADER;\r | |
25 | \r | |
4f1afaac | 26 | #pragma pack(1)\r |
a2461f6b | 27 | ///\r |
28 | /// Common ACPI description table header. This structure prefaces most ACPI tables.\r | |
29 | ///\r | |
ecc40942 | 30 | typedef struct {\r |
31 | UINT32 Signature;\r | |
32 | UINT32 Length;\r | |
33 | UINT8 Revision;\r | |
34 | UINT8 Checksum;\r | |
35 | UINT8 OemId[6];\r | |
36 | UINT64 OemTableId;\r | |
37 | UINT32 OemRevision;\r | |
38 | UINT32 CreatorId;\r | |
39 | UINT32 CreatorRevision;\r | |
40 | } EFI_ACPI_DESCRIPTION_HEADER;\r | |
766f4bc1 | 41 | #pragma pack()\r |
a2461f6b | 42 | \r |
ecc40942 | 43 | //\r |
2b1cf49a | 44 | // Define for Desriptor\r |
ecc40942 | 45 | //\r |
46 | #define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A\r | |
47 | #define ACPI_END_TAG_DESCRIPTOR 0x79\r | |
48 | \r | |
2b1cf49a | 49 | //\r |
50 | // Resource Type\r | |
51 | //\r | |
ecc40942 | 52 | #define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00\r |
53 | #define ACPI_ADDRESS_SPACE_TYPE_IO 0x01\r | |
54 | #define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02\r | |
55 | \r | |
1bc5d021 | 56 | ///\r |
57 | /// Power Management Timer frequency is fixed at 3.579545MHz\r | |
58 | ///\r | |
ecc40942 | 59 | #define ACPI_TIMER_FREQUENCY 3579545\r |
60 | \r | |
98a33bf4 | 61 | //\r |
62 | // Ensure proper structure formats\r | |
63 | //\r | |
64 | #pragma pack(1)\r | |
a2461f6b | 65 | \r |
66 | ///\r | |
67 | /// The commond definition of QWORD, DWORD, and WORD\r | |
68 | /// Address Space Descriptors\r | |
69 | ///\r | |
ecc40942 | 70 | typedef struct {\r |
71 | UINT8 Desc;\r | |
72 | UINT16 Len;\r | |
73 | UINT8 ResType;\r | |
74 | UINT8 GenFlag;\r | |
75 | UINT8 SpecificFlag;\r | |
76 | UINT64 AddrSpaceGranularity;\r | |
77 | UINT64 AddrRangeMin;\r | |
78 | UINT64 AddrRangeMax;\r | |
79 | UINT64 AddrTranslationOffset;\r | |
80 | UINT64 AddrLen;\r | |
81 | } EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR;\r | |
82 | \r | |
98a33bf4 | 83 | #pragma pack()\r |
84 | \r | |
427987f5 | 85 | ///\r |
86 | /// the End tag identifies an end of resource data.\r | |
87 | ///\r | |
ecc40942 | 88 | typedef struct {\r |
89 | UINT8 Desc;\r | |
90 | UINT8 Checksum;\r | |
91 | } EFI_ACPI_END_TAG_DESCRIPTOR;\r | |
92 | \r | |
93 | //\r | |
94 | // General use definitions\r | |
95 | //\r | |
96 | #define EFI_ACPI_RESERVED_BYTE 0x00\r | |
97 | #define EFI_ACPI_RESERVED_WORD 0x0000\r | |
98 | #define EFI_ACPI_RESERVED_DWORD 0x00000000\r | |
99 | #define EFI_ACPI_RESERVED_QWORD 0x0000000000000000\r | |
100 | \r | |
101 | //\r | |
102 | // Resource Type Specific Flags\r | |
103 | // Ref ACPI specification 6.4.3.5.5\r | |
104 | //\r | |
105 | // Bit [0] : Write Status, _RW\r | |
106 | //\r | |
107 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)\r | |
108 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)\r | |
109 | //\r | |
110 | // Bit [2:1] : Memory Attributes, _MEM\r | |
111 | //\r | |
112 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)\r | |
113 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)\r | |
114 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)\r | |
115 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)\r | |
116 | //\r | |
117 | // Bit [4:3] : Memory Attributes, _MTP\r | |
118 | //\r | |
119 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)\r | |
120 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)\r | |
121 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)\r | |
122 | #define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)\r | |
123 | //\r | |
124 | // Bit [5] : Memory to I/O Translation, _TTP\r | |
125 | //\r | |
126 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)\r | |
127 | #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)\r | |
128 | \r | |
766f4bc1 | 129 | //\r |
130 | // Ensure proper structure formats\r | |
131 | //\r | |
132 | #pragma pack(1)\r | |
568eb0cb | 133 | //\r |
134 | // ACPI 1.0b table structures\r | |
135 | //\r | |
1bc5d021 | 136 | \r |
137 | ///\r | |
138 | /// Root System Description Pointer Structure\r | |
139 | ///\r | |
568eb0cb | 140 | typedef struct {\r |
141 | UINT64 Signature;\r | |
142 | UINT8 Checksum;\r | |
143 | UINT8 OemId[6];\r | |
144 | UINT8 Reserved;\r | |
145 | UINT32 RsdtAddress;\r | |
146 | } EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r | |
147 | \r | |
148 | //\r | |
149 | // Root System Description Table\r | |
2b1cf49a | 150 | // No definition needed as it is a common description table header, the same with \r |
151 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r | |
568eb0cb | 152 | //\r |
1bc5d021 | 153 | \r |
154 | ///\r | |
155 | /// RSDT Revision (as defined in ACPI 1.0b spec.)\r | |
156 | ///\r | |
568eb0cb | 157 | #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r |
158 | \r | |
1bc5d021 | 159 | ///\r |
160 | /// Fixed ACPI Description Table Structure (FADT)\r | |
161 | ///\r | |
568eb0cb | 162 | typedef struct {\r |
163 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
164 | UINT32 FirmwareCtrl;\r | |
165 | UINT32 Dsdt;\r | |
166 | UINT8 IntModel;\r | |
167 | UINT8 Reserved1;\r | |
168 | UINT16 SciInt;\r | |
169 | UINT32 SmiCmd;\r | |
170 | UINT8 AcpiEnable;\r | |
171 | UINT8 AcpiDisable;\r | |
172 | UINT8 S4BiosReq;\r | |
173 | UINT8 Reserved2;\r | |
174 | UINT32 Pm1aEvtBlk;\r | |
175 | UINT32 Pm1bEvtBlk;\r | |
176 | UINT32 Pm1aCntBlk;\r | |
177 | UINT32 Pm1bCntBlk;\r | |
178 | UINT32 Pm2CntBlk;\r | |
179 | UINT32 PmTmrBlk;\r | |
180 | UINT32 Gpe0Blk;\r | |
181 | UINT32 Gpe1Blk;\r | |
182 | UINT8 Pm1EvtLen;\r | |
183 | UINT8 Pm1CntLen;\r | |
184 | UINT8 Pm2CntLen;\r | |
185 | UINT8 PmTmLen;\r | |
186 | UINT8 Gpe0BlkLen;\r | |
187 | UINT8 Gpe1BlkLen;\r | |
188 | UINT8 Gpe1Base;\r | |
189 | UINT8 Reserved3;\r | |
190 | UINT16 PLvl2Lat;\r | |
191 | UINT16 PLvl3Lat;\r | |
192 | UINT16 FlushSize;\r | |
193 | UINT16 FlushStride;\r | |
194 | UINT8 DutyOffset;\r | |
195 | UINT8 DutyWidth;\r | |
196 | UINT8 DayAlrm;\r | |
197 | UINT8 MonAlrm;\r | |
198 | UINT8 Century;\r | |
199 | UINT8 Reserved4;\r | |
200 | UINT8 Reserved5;\r | |
201 | UINT8 Reserved6;\r | |
202 | UINT32 Flags;\r | |
203 | } EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;\r | |
204 | \r | |
1bc5d021 | 205 | ///\r |
206 | /// FADT Version (as defined in ACPI 1.0b spec.)\r | |
207 | ///\r | |
568eb0cb | 208 | #define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01\r |
209 | \r | |
210 | //\r | |
211 | // Fixed ACPI Description Table Fixed Feature Flags\r | |
212 | // All other bits are reserved and must be set to 0.\r | |
213 | //\r | |
a2461f6b | 214 | #define EFI_ACPI_1_0_WBINVD BIT0\r |
215 | #define EFI_ACPI_1_0_WBINVD_FLUSH BIT1\r | |
216 | #define EFI_ACPI_1_0_PROC_C1 BIT2\r | |
217 | #define EFI_ACPI_1_0_P_LVL2_UP BIT3\r | |
218 | #define EFI_ACPI_1_0_PWR_BUTTON BIT4\r | |
219 | #define EFI_ACPI_1_0_SLP_BUTTON BIT5\r | |
220 | #define EFI_ACPI_1_0_FIX_RTC BIT6\r | |
221 | #define EFI_ACPI_1_0_RTC_S4 BIT7\r | |
222 | #define EFI_ACPI_1_0_TMR_VAL_EXT BIT8\r | |
223 | #define EFI_ACPI_1_0_DCK_CAP BIT9\r | |
568eb0cb | 224 | \r |
1bc5d021 | 225 | ///\r |
226 | /// Firmware ACPI Control Structure\r | |
227 | ///\r | |
568eb0cb | 228 | typedef struct {\r |
229 | UINT32 Signature;\r | |
230 | UINT32 Length;\r | |
231 | UINT32 HardwareSignature;\r | |
232 | UINT32 FirmwareWakingVector;\r | |
233 | UINT32 GlobalLock;\r | |
234 | UINT32 Flags;\r | |
235 | UINT8 Reserved[40];\r | |
236 | } EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r | |
237 | \r | |
1bc5d021 | 238 | ///\r |
239 | /// Firmware Control Structure Feature Flags\r | |
240 | /// All other bits are reserved and must be set to 0.\r | |
241 | ///\r | |
a2461f6b | 242 | #define EFI_ACPI_1_0_S4BIOS_F BIT0\r |
568eb0cb | 243 | \r |
1bc5d021 | 244 | ///\r |
245 | /// Multiple APIC Description Table header definition. The rest of the table\r | |
246 | /// must be defined in a platform specific manner.\r | |
247 | ///\r | |
568eb0cb | 248 | typedef struct {\r |
249 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
250 | UINT32 LocalApicAddress;\r | |
251 | UINT32 Flags;\r | |
252 | } EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r | |
253 | \r | |
1bc5d021 | 254 | ///\r |
255 | /// MADT Revision (as defined in ACPI 1.0b spec.)\r | |
256 | ///\r | |
568eb0cb | 257 | #define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r |
258 | \r | |
1bc5d021 | 259 | ///\r |
260 | /// Multiple APIC Flags\r | |
261 | /// All other bits are reserved and must be set to 0.\r | |
262 | ///\r | |
a2461f6b | 263 | #define EFI_ACPI_1_0_PCAT_COMPAT BIT0\r |
568eb0cb | 264 | \r |
265 | //\r | |
266 | // Multiple APIC Description Table APIC structure types\r | |
2b1cf49a | 267 | // All other values between 0x05 an 0xFF are reserved and\r |
568eb0cb | 268 | // will be ignored by OSPM.\r |
269 | //\r | |
270 | #define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC 0x00\r | |
271 | #define EFI_ACPI_1_0_IO_APIC 0x01\r | |
272 | #define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r | |
273 | #define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r | |
274 | #define EFI_ACPI_1_0_LOCAL_APIC_NMI 0x04\r | |
275 | \r | |
276 | //\r | |
277 | // APIC Structure Definitions\r | |
278 | //\r | |
1bc5d021 | 279 | \r |
280 | ///\r | |
281 | /// Processor Local APIC Structure Definition\r | |
282 | ///\r | |
568eb0cb | 283 | typedef struct {\r |
284 | UINT8 Type;\r | |
285 | UINT8 Length;\r | |
286 | UINT8 AcpiProcessorId;\r | |
287 | UINT8 ApicId;\r | |
288 | UINT32 Flags;\r | |
289 | } EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r | |
290 | \r | |
1bc5d021 | 291 | ///\r |
292 | /// Local APIC Flags. All other bits are reserved and must be 0.\r | |
293 | ///\r | |
a2461f6b | 294 | #define EFI_ACPI_1_0_LOCAL_APIC_ENABLED BIT0\r |
568eb0cb | 295 | \r |
1bc5d021 | 296 | ///\r |
297 | /// IO APIC Structure\r | |
298 | ///\r | |
568eb0cb | 299 | typedef struct {\r |
300 | UINT8 Type;\r | |
301 | UINT8 Length;\r | |
302 | UINT8 IoApicId;\r | |
303 | UINT8 Reserved;\r | |
304 | UINT32 IoApicAddress;\r | |
305 | UINT32 SystemVectorBase;\r | |
306 | } EFI_ACPI_1_0_IO_APIC_STRUCTURE;\r | |
307 | \r | |
1bc5d021 | 308 | ///\r |
309 | /// Interrupt Source Override Structure\r | |
310 | ///\r | |
568eb0cb | 311 | typedef struct {\r |
312 | UINT8 Type;\r | |
313 | UINT8 Length;\r | |
314 | UINT8 Bus;\r | |
315 | UINT8 Source;\r | |
316 | UINT32 GlobalSystemInterruptVector;\r | |
317 | UINT16 Flags;\r | |
318 | } EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r | |
319 | \r | |
1bc5d021 | 320 | ///\r |
321 | /// Non-Maskable Interrupt Source Structure\r | |
322 | ///\r | |
568eb0cb | 323 | typedef struct {\r |
324 | UINT8 Type;\r | |
325 | UINT8 Length;\r | |
326 | UINT16 Flags;\r | |
327 | UINT32 GlobalSystemInterruptVector;\r | |
328 | } EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r | |
329 | \r | |
1bc5d021 | 330 | ///\r |
331 | /// Local APIC NMI Structure\r | |
332 | ///\r | |
568eb0cb | 333 | typedef struct {\r |
334 | UINT8 Type;\r | |
335 | UINT8 Length;\r | |
336 | UINT8 AcpiProcessorId;\r | |
337 | UINT16 Flags;\r | |
338 | UINT8 LocalApicInti;\r | |
339 | } EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;\r | |
340 | \r | |
1bc5d021 | 341 | ///\r |
342 | /// Smart Battery Description Table (SBST)\r | |
343 | ///\r | |
568eb0cb | 344 | typedef struct {\r |
345 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
346 | UINT32 WarningEnergyLevel;\r | |
347 | UINT32 LowEnergyLevel;\r | |
348 | UINT32 CriticalEnergyLevel;\r | |
349 | } EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;\r | |
350 | \r | |
351 | //\r | |
352 | // Known table signatures\r | |
353 | //\r | |
1bc5d021 | 354 | \r |
355 | ///\r | |
356 | /// "RSD PTR " Root System Description Pointer\r | |
357 | ///\r | |
13c31065 | 358 | #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r |
568eb0cb | 359 | \r |
1bc5d021 | 360 | ///\r |
361 | /// "APIC" Multiple APIC Description Table\r | |
362 | ///\r | |
13c31065 | 363 | #define EFI_ACPI_1_0_APIC_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r |
568eb0cb | 364 | \r |
1bc5d021 | 365 | ///\r |
366 | /// "DSDT" Differentiated System Description Table\r | |
367 | ///\r | |
13c31065 | 368 | #define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r |
568eb0cb | 369 | \r |
1bc5d021 | 370 | ///\r |
371 | /// "FACS" Firmware ACPI Control Structure\r | |
372 | ///\r | |
13c31065 | 373 | #define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r |
568eb0cb | 374 | \r |
1bc5d021 | 375 | ///\r |
376 | /// "FACP" Fixed ACPI Description Table\r | |
377 | ///\r | |
13c31065 | 378 | #define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r |
568eb0cb | 379 | \r |
1bc5d021 | 380 | ///\r |
381 | /// "PSDT" Persistent System Description Table\r | |
382 | ///\r | |
13c31065 | 383 | #define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r |
568eb0cb | 384 | \r |
1bc5d021 | 385 | ///\r |
386 | /// "RSDT" Root System Description Table\r | |
387 | ///\r | |
13c31065 | 388 | #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r |
568eb0cb | 389 | \r |
1bc5d021 | 390 | ///\r |
391 | /// "SBST" Smart Battery Specification Table\r | |
392 | ///\r | |
13c31065 | 393 | #define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r |
568eb0cb | 394 | \r |
1bc5d021 | 395 | ///\r |
396 | /// "SSDT" Secondary System Description Table\r | |
397 | ///\r | |
13c31065 | 398 | #define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r |
568eb0cb | 399 | \r |
766f4bc1 | 400 | #pragma pack()\r |
401 | \r | |
568eb0cb | 402 | #endif\r |