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a40f3039
KK		 1/** @file\r
2 ACPI 6.3 definitions from the ACPI Specification Revision 6.3 Jan, 2019.\r
3\r
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
5 Copyright (c) 2019, ARM Ltd. All rights reserved.<BR>\r
6\r
7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
8**/\r
9\r
10#ifndef _ACPI_6_3_H_\r
11#define _ACPI_6_3_H_\r
12\r
13#include <IndustryStandard/Acpi62.h>\r
14\r
15//\r
16// Ensure proper structure formats\r
17//\r
18#pragma pack(1)\r
19\r
20///\r
21/// ACPI 6.3 Generic Address Space definition\r
22///\r
23typedef struct {\r
24 UINT8 AddressSpaceId;\r
25 UINT8 RegisterBitWidth;\r
26 UINT8 RegisterBitOffset;\r
27 UINT8 AccessSize;\r
28 UINT64 Address;\r
29} EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE;\r
30\r
31//\r
32// Generic Address Space Address IDs\r
33//\r
34#define EFI_ACPI_6_3_SYSTEM_MEMORY 0x00\r
35#define EFI_ACPI_6_3_SYSTEM_IO 0x01\r
36#define EFI_ACPI_6_3_PCI_CONFIGURATION_SPACE 0x02\r
37#define EFI_ACPI_6_3_EMBEDDED_CONTROLLER 0x03\r
38#define EFI_ACPI_6_3_SMBUS 0x04\r
39#define EFI_ACPI_6_3_SYSTEM_CMOS 0x05\r
40#define EFI_ACPI_6_3_PCI_BAR_TARGET 0x06\r
41#define EFI_ACPI_6_3_IPMI 0x07\r
42#define EFI_ACPI_6_3_GENERAL_PURPOSE_IO 0x08\r
43#define EFI_ACPI_6_3_GENERIC_SERIAL_BUS 0x09\r
44#define EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
45#define EFI_ACPI_6_3_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
46\r
47//\r
48// Generic Address Space Access Sizes\r
49//\r
50#define EFI_ACPI_6_3_UNDEFINED 0\r
51#define EFI_ACPI_6_3_BYTE 1\r
52#define EFI_ACPI_6_3_WORD 2\r
53#define EFI_ACPI_6_3_DWORD 3\r
54#define EFI_ACPI_6_3_QWORD 4\r
55\r
56//\r
57// ACPI 6.3 table structures\r
58//\r
59\r
60///\r
61/// Root System Description Pointer Structure\r
62///\r
63typedef struct {\r
64 UINT64 Signature;\r
65 UINT8 Checksum;\r
66 UINT8 OemId[6];\r
67 UINT8 Revision;\r
68 UINT32 RsdtAddress;\r
69 UINT32 Length;\r
70 UINT64 XsdtAddress;\r
71 UINT8 ExtendedChecksum;\r
72 UINT8 Reserved[3];\r
73} EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
74\r
75///\r
76/// RSD_PTR Revision (as defined in ACPI 6.3 spec.)\r
77///\r
78#define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.3) says current value is 2\r
79\r
80///\r
81/// Common table header, this prefaces all ACPI tables, including FACS, but\r
82/// excluding the RSD PTR structure\r
83///\r
84typedef struct {\r
85 UINT32 Signature;\r
86 UINT32 Length;\r
87} EFI_ACPI_6_3_COMMON_HEADER;\r
88\r
89//\r
90// Root System Description Table\r
91// No definition needed as it is a common description table header, the same with\r
92// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
93//\r
94\r
95///\r
96/// RSDT Revision (as defined in ACPI 6.3 spec.)\r
97///\r
98#define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
99\r
100//\r
101// Extended System Description Table\r
102// No definition needed as it is a common description table header, the same with\r
103// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
104//\r
105\r
106///\r
107/// XSDT Revision (as defined in ACPI 6.3 spec.)\r
108///\r
109#define EFI_ACPI_6_3_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
110\r
111///\r
112/// Fixed ACPI Description Table Structure (FADT)\r
113///\r
114typedef struct {\r
115 EFI_ACPI_DESCRIPTION_HEADER Header;\r
116 UINT32 FirmwareCtrl;\r
117 UINT32 Dsdt;\r
118 UINT8 Reserved0;\r
119 UINT8 PreferredPmProfile;\r
120 UINT16 SciInt;\r
121 UINT32 SmiCmd;\r
122 UINT8 AcpiEnable;\r
123 UINT8 AcpiDisable;\r
124 UINT8 S4BiosReq;\r
125 UINT8 PstateCnt;\r
126 UINT32 Pm1aEvtBlk;\r
127 UINT32 Pm1bEvtBlk;\r
128 UINT32 Pm1aCntBlk;\r
129 UINT32 Pm1bCntBlk;\r
130 UINT32 Pm2CntBlk;\r
131 UINT32 PmTmrBlk;\r
132 UINT32 Gpe0Blk;\r
133 UINT32 Gpe1Blk;\r
134 UINT8 Pm1EvtLen;\r
135 UINT8 Pm1CntLen;\r
136 UINT8 Pm2CntLen;\r
137 UINT8 PmTmrLen;\r
138 UINT8 Gpe0BlkLen;\r
139 UINT8 Gpe1BlkLen;\r
140 UINT8 Gpe1Base;\r
141 UINT8 CstCnt;\r
142 UINT16 PLvl2Lat;\r
143 UINT16 PLvl3Lat;\r
144 UINT16 FlushSize;\r
145 UINT16 FlushStride;\r
146 UINT8 DutyOffset;\r
147 UINT8 DutyWidth;\r
148 UINT8 DayAlrm;\r
149 UINT8 MonAlrm;\r
150 UINT8 Century;\r
151 UINT16 IaPcBootArch;\r
152 UINT8 Reserved1;\r
153 UINT32 Flags;\r
154 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
155 UINT8 ResetValue;\r
156 UINT16 ArmBootArch;\r
157 UINT8 MinorVersion;\r
158 UINT64 XFirmwareCtrl;\r
159 UINT64 XDsdt;\r
160 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
161 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
162 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
163 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
164 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
165 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
166 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
167 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
168 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
169 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
170 UINT64 HypervisorVendorIdentity;\r
171} EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE;\r
172\r
173///\r
174/// FADT Version (as defined in ACPI 6.3 spec.)\r
175///\r
176#define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
177#define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x03\r
178\r
179//\r
180// Fixed ACPI Description Table Preferred Power Management Profile\r
181//\r
182#define EFI_ACPI_6_3_PM_PROFILE_UNSPECIFIED 0\r
183#define EFI_ACPI_6_3_PM_PROFILE_DESKTOP 1\r
184#define EFI_ACPI_6_3_PM_PROFILE_MOBILE 2\r
185#define EFI_ACPI_6_3_PM_PROFILE_WORKSTATION 3\r
186#define EFI_ACPI_6_3_PM_PROFILE_ENTERPRISE_SERVER 4\r
187#define EFI_ACPI_6_3_PM_PROFILE_SOHO_SERVER 5\r
188#define EFI_ACPI_6_3_PM_PROFILE_APPLIANCE_PC 6\r
189#define EFI_ACPI_6_3_PM_PROFILE_PERFORMANCE_SERVER 7\r
190#define EFI_ACPI_6_3_PM_PROFILE_TABLET 8\r
191\r
192//\r
193// Fixed ACPI Description Table Boot Architecture Flags\r
194// All other bits are reserved and must be set to 0.\r
195//\r
196#define EFI_ACPI_6_3_LEGACY_DEVICES BIT0\r
197#define EFI_ACPI_6_3_8042 BIT1\r
198#define EFI_ACPI_6_3_VGA_NOT_PRESENT BIT2\r
199#define EFI_ACPI_6_3_MSI_NOT_SUPPORTED BIT3\r
200#define EFI_ACPI_6_3_PCIE_ASPM_CONTROLS BIT4\r
201#define EFI_ACPI_6_3_CMOS_RTC_NOT_PRESENT BIT5\r
202\r
203//\r
204// Fixed ACPI Description Table Arm Boot Architecture Flags\r
205// All other bits are reserved and must be set to 0.\r
206//\r
207#define EFI_ACPI_6_3_ARM_PSCI_COMPLIANT BIT0\r
208#define EFI_ACPI_6_3_ARM_PSCI_USE_HVC BIT1\r
209\r
210//\r
211// Fixed ACPI Description Table Fixed Feature Flags\r
212// All other bits are reserved and must be set to 0.\r
213//\r
214#define EFI_ACPI_6_3_WBINVD BIT0\r
215#define EFI_ACPI_6_3_WBINVD_FLUSH BIT1\r
216#define EFI_ACPI_6_3_PROC_C1 BIT2\r
217#define EFI_ACPI_6_3_P_LVL2_UP BIT3\r
218#define EFI_ACPI_6_3_PWR_BUTTON BIT4\r
219#define EFI_ACPI_6_3_SLP_BUTTON BIT5\r
220#define EFI_ACPI_6_3_FIX_RTC BIT6\r
221#define EFI_ACPI_6_3_RTC_S4 BIT7\r
222#define EFI_ACPI_6_3_TMR_VAL_EXT BIT8\r
223#define EFI_ACPI_6_3_DCK_CAP BIT9\r
224#define EFI_ACPI_6_3_RESET_REG_SUP BIT10\r
225#define EFI_ACPI_6_3_SEALED_CASE BIT11\r
226#define EFI_ACPI_6_3_HEADLESS BIT12\r
227#define EFI_ACPI_6_3_CPU_SW_SLP BIT13\r
228#define EFI_ACPI_6_3_PCI_EXP_WAK BIT14\r
229#define EFI_ACPI_6_3_USE_PLATFORM_CLOCK BIT15\r
230#define EFI_ACPI_6_3_S4_RTC_STS_VALID BIT16\r
231#define EFI_ACPI_6_3_REMOTE_POWER_ON_CAPABLE BIT17\r
232#define EFI_ACPI_6_3_FORCE_APIC_CLUSTER_MODEL BIT18\r
233#define EFI_ACPI_6_3_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
234#define EFI_ACPI_6_3_HW_REDUCED_ACPI BIT20\r
235#define EFI_ACPI_6_3_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
236\r
237///\r
238/// Firmware ACPI Control Structure\r
239///\r
240typedef struct {\r
241 UINT32 Signature;\r
242 UINT32 Length;\r
243 UINT32 HardwareSignature;\r
244 UINT32 FirmwareWakingVector;\r
245 UINT32 GlobalLock;\r
246 UINT32 Flags;\r
247 UINT64 XFirmwareWakingVector;\r
248 UINT8 Version;\r
249 UINT8 Reserved0[3];\r
250 UINT32 OspmFlags;\r
251 UINT8 Reserved1[24];\r
252} EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
253\r
254///\r
255/// FACS Version (as defined in ACPI 6.3 spec.)\r
256///\r
257#define EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
258\r
259///\r
260/// Firmware Control Structure Feature Flags\r
261/// All other bits are reserved and must be set to 0.\r
262///\r
263#define EFI_ACPI_6_3_S4BIOS_F BIT0\r
264#define EFI_ACPI_6_3_64BIT_WAKE_SUPPORTED_F BIT1\r
265\r
266///\r
267/// OSPM Enabled Firmware Control Structure Flags\r
268/// All other bits are reserved and must be set to 0.\r
269///\r
270#define EFI_ACPI_6_3_OSPM_64BIT_WAKE_F BIT0\r
271\r
272//\r
273// Differentiated System Description Table,\r
274// Secondary System Description Table\r
275// and Persistent System Description Table,\r
276// no definition needed as they are common description table header, the same with\r
277// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
278//\r
279#define EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
280#define EFI_ACPI_6_3_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
281\r
282///\r
283/// Multiple APIC Description Table header definition. The rest of the table\r
284/// must be defined in a platform specific manner.\r
285///\r
286typedef struct {\r
287 EFI_ACPI_DESCRIPTION_HEADER Header;\r
288 UINT32 LocalApicAddress;\r
289 UINT32 Flags;\r
290} EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
291\r
292///\r
293/// MADT Revision (as defined in ACPI 6.3 spec.)\r
294///\r
295#define EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05\r
296\r
297///\r
298/// Multiple APIC Flags\r
299/// All other bits are reserved and must be set to 0.\r
300///\r
301#define EFI_ACPI_6_3_PCAT_COMPAT BIT0\r
302\r
303//\r
304// Multiple APIC Description Table APIC structure types\r
305// All other values between 0x0D and 0x7F are reserved and\r
306// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
307//\r
308#define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC 0x00\r
309#define EFI_ACPI_6_3_IO_APIC 0x01\r
310#define EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE 0x02\r
311#define EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
312#define EFI_ACPI_6_3_LOCAL_APIC_NMI 0x04\r
313#define EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
314#define EFI_ACPI_6_3_IO_SAPIC 0x06\r
315#define EFI_ACPI_6_3_LOCAL_SAPIC 0x07\r
316#define EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES 0x08\r
317#define EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC 0x09\r
318#define EFI_ACPI_6_3_LOCAL_X2APIC_NMI 0x0A\r
319#define EFI_ACPI_6_3_GIC 0x0B\r
320#define EFI_ACPI_6_3_GICD 0x0C\r
321#define EFI_ACPI_6_3_GIC_MSI_FRAME 0x0D\r
322#define EFI_ACPI_6_3_GICR 0x0E\r
323#define EFI_ACPI_6_3_GIC_ITS 0x0F\r
324\r
325//\r
326// APIC Structure Definitions\r
327//\r
328\r
329///\r
330/// Processor Local APIC Structure Definition\r
331///\r
332typedef struct {\r
333 UINT8 Type;\r
334 UINT8 Length;\r
335 UINT8 AcpiProcessorUid;\r
336 UINT8 ApicId;\r
337 UINT32 Flags;\r
338} EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
339\r
340///\r
341/// Local APIC Flags. All other bits are reserved and must be 0.\r
342///\r
343#define EFI_ACPI_6_3_LOCAL_APIC_ENABLED BIT0\r
344#define EFI_ACPI_6_3_LOCAL_APIC_ONLINE_CAPABLE BIT1\r
345\r
346///\r
347/// IO APIC Structure\r
348///\r
349typedef struct {\r
350 UINT8 Type;\r
351 UINT8 Length;\r
352 UINT8 IoApicId;\r
353 UINT8 Reserved;\r
354 UINT32 IoApicAddress;\r
355 UINT32 GlobalSystemInterruptBase;\r
356} EFI_ACPI_6_3_IO_APIC_STRUCTURE;\r
357\r
358///\r
359/// Interrupt Source Override Structure\r
360///\r
361typedef struct {\r
362 UINT8 Type;\r
363 UINT8 Length;\r
364 UINT8 Bus;\r
365 UINT8 Source;\r
366 UINT32 GlobalSystemInterrupt;\r
367 UINT16 Flags;\r
368} EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
369\r
370///\r
371/// Platform Interrupt Sources Structure Definition\r
372///\r
373typedef struct {\r
374 UINT8 Type;\r
375 UINT8 Length;\r
376 UINT16 Flags;\r
377 UINT8 InterruptType;\r
378 UINT8 ProcessorId;\r
379 UINT8 ProcessorEid;\r
380 UINT8 IoSapicVector;\r
381 UINT32 GlobalSystemInterrupt;\r
382 UINT32 PlatformInterruptSourceFlags;\r
383 UINT8 CpeiProcessorOverride;\r
384 UINT8 Reserved[31];\r
385} EFI_ACPI_6_3_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
386\r
387//\r
388// MPS INTI flags.\r
389// All other bits are reserved and must be set to 0.\r
390//\r
391#define EFI_ACPI_6_3_POLARITY (3 << 0)\r
392#define EFI_ACPI_6_3_TRIGGER_MODE (3 << 2)\r
393\r
394///\r
395/// Non-Maskable Interrupt Source Structure\r
396///\r
397typedef struct {\r
398 UINT8 Type;\r
399 UINT8 Length;\r
400 UINT16 Flags;\r
401 UINT32 GlobalSystemInterrupt;\r
402} EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
403\r
404///\r
405/// Local APIC NMI Structure\r
406///\r
407typedef struct {\r
408 UINT8 Type;\r
409 UINT8 Length;\r
410 UINT8 AcpiProcessorUid;\r
411 UINT16 Flags;\r
412 UINT8 LocalApicLint;\r
413} EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE;\r
414\r
415///\r
416/// Local APIC Address Override Structure\r
417///\r
418typedef struct {\r
419 UINT8 Type;\r
420 UINT8 Length;\r
421 UINT16 Reserved;\r
422 UINT64 LocalApicAddress;\r
423} EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
424\r
425///\r
426/// IO SAPIC Structure\r
427///\r
428typedef struct {\r
429 UINT8 Type;\r
430 UINT8 Length;\r
431 UINT8 IoApicId;\r
432 UINT8 Reserved;\r
433 UINT32 GlobalSystemInterruptBase;\r
434 UINT64 IoSapicAddress;\r
435} EFI_ACPI_6_3_IO_SAPIC_STRUCTURE;\r
436\r
437///\r
438/// Local SAPIC Structure\r
439/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
440///\r
441typedef struct {\r
442 UINT8 Type;\r
443 UINT8 Length;\r
444 UINT8 AcpiProcessorId;\r
445 UINT8 LocalSapicId;\r
446 UINT8 LocalSapicEid;\r
447 UINT8 Reserved[3];\r
448 UINT32 Flags;\r
449 UINT32 ACPIProcessorUIDValue;\r
450} EFI_ACPI_6_3_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
451\r
452///\r
453/// Platform Interrupt Sources Structure\r
454///\r
455typedef struct {\r
456 UINT8 Type;\r
457 UINT8 Length;\r
458 UINT16 Flags;\r
459 UINT8 InterruptType;\r
460 UINT8 ProcessorId;\r
461 UINT8 ProcessorEid;\r
462 UINT8 IoSapicVector;\r
463 UINT32 GlobalSystemInterrupt;\r
464 UINT32 PlatformInterruptSourceFlags;\r
465} EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
466\r
467///\r
468/// Platform Interrupt Source Flags.\r
469/// All other bits are reserved and must be set to 0.\r
470///\r
471#define EFI_ACPI_6_3_CPEI_PROCESSOR_OVERRIDE BIT0\r
472\r
473///\r
474/// Processor Local x2APIC Structure Definition\r
475///\r
476typedef struct {\r
477 UINT8 Type;\r
478 UINT8 Length;\r
479 UINT8 Reserved[2];\r
480 UINT32 X2ApicId;\r
481 UINT32 Flags;\r
482 UINT32 AcpiProcessorUid;\r
483} EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
484\r
485///\r
486/// Local x2APIC NMI Structure\r
487///\r
488typedef struct {\r
489 UINT8 Type;\r
490 UINT8 Length;\r
491 UINT16 Flags;\r
492 UINT32 AcpiProcessorUid;\r
493 UINT8 LocalX2ApicLint;\r
494 UINT8 Reserved[3];\r
495} EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE;\r
496\r
497///\r
498/// GIC Structure\r
499///\r
500typedef struct {\r
501 UINT8 Type;\r
502 UINT8 Length;\r
503 UINT16 Reserved;\r
504 UINT32 CPUInterfaceNumber;\r
505 UINT32 AcpiProcessorUid;\r
506 UINT32 Flags;\r
507 UINT32 ParkingProtocolVersion;\r
508 UINT32 PerformanceInterruptGsiv;\r
509 UINT64 ParkedAddress;\r
510 UINT64 PhysicalBaseAddress;\r
511 UINT64 GICV;\r
512 UINT64 GICH;\r
513 UINT32 VGICMaintenanceInterrupt;\r
514 UINT64 GICRBaseAddress;\r
515 UINT64 MPIDR;\r
516 UINT8 ProcessorPowerEfficiencyClass;\r
517 UINT8 Reserved2;\r
518 UINT16 SpeOverflowInterrupt;\r
519} EFI_ACPI_6_3_GIC_STRUCTURE;\r
520\r
521///\r
522/// GIC Flags. All other bits are reserved and must be 0.\r
523///\r
524#define EFI_ACPI_6_3_GIC_ENABLED BIT0\r
525#define EFI_ACPI_6_3_PERFORMANCE_INTERRUPT_MODEL BIT1\r
526#define EFI_ACPI_6_3_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
527\r
528///\r
529/// GIC Distributor Structure\r
530///\r
531typedef struct {\r
532 UINT8 Type;\r
533 UINT8 Length;\r
534 UINT16 Reserved1;\r
535 UINT32 GicId;\r
536 UINT64 PhysicalBaseAddress;\r
537 UINT32 SystemVectorBase;\r
538 UINT8 GicVersion;\r
539 UINT8 Reserved2[3];\r
540} EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE;\r
541\r
542///\r
543/// GIC Version\r
544///\r
545#define EFI_ACPI_6_3_GIC_V1 0x01\r
546#define EFI_ACPI_6_3_GIC_V2 0x02\r
547#define EFI_ACPI_6_3_GIC_V3 0x03\r
548#define EFI_ACPI_6_3_GIC_V4 0x04\r
549\r
550///\r
551/// GIC MSI Frame Structure\r
552///\r
553typedef struct {\r
554 UINT8 Type;\r
555 UINT8 Length;\r
556 UINT16 Reserved1;\r
557 UINT32 GicMsiFrameId;\r
558 UINT64 PhysicalBaseAddress;\r
559 UINT32 Flags;\r
560 UINT16 SPICount;\r
561 UINT16 SPIBase;\r
562} EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE;\r
563\r
564///\r
565/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
566///\r
567#define EFI_ACPI_6_3_SPI_COUNT_BASE_SELECT BIT0\r
568\r
569///\r
570/// GICR Structure\r
571///\r
572typedef struct {\r
573 UINT8 Type;\r
574 UINT8 Length;\r
575 UINT16 Reserved;\r
576 UINT64 DiscoveryRangeBaseAddress;\r
577 UINT32 DiscoveryRangeLength;\r
578} EFI_ACPI_6_3_GICR_STRUCTURE;\r
579\r
580///\r
581/// GIC Interrupt Translation Service Structure\r
582///\r
583typedef struct {\r
584 UINT8 Type;\r
585 UINT8 Length;\r
586 UINT16 Reserved;\r
587 UINT32 GicItsId;\r
588 UINT64 PhysicalBaseAddress;\r
589 UINT32 Reserved2;\r
590} EFI_ACPI_6_3_GIC_ITS_STRUCTURE;\r
591\r
592///\r
593/// Smart Battery Description Table (SBST)\r
594///\r
595typedef struct {\r
596 EFI_ACPI_DESCRIPTION_HEADER Header;\r
597 UINT32 WarningEnergyLevel;\r
598 UINT32 LowEnergyLevel;\r
599 UINT32 CriticalEnergyLevel;\r
600} EFI_ACPI_6_3_SMART_BATTERY_DESCRIPTION_TABLE;\r
601\r
602///\r
603/// SBST Version (as defined in ACPI 6.3 spec.)\r
604///\r
605#define EFI_ACPI_6_3_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
606\r
607///\r
608/// Embedded Controller Boot Resources Table (ECDT)\r
609/// The table is followed by a null terminated ASCII string that contains\r
610/// a fully qualified reference to the name space object.\r
611///\r
612typedef struct {\r
613 EFI_ACPI_DESCRIPTION_HEADER Header;\r
614 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE EcControl;\r
615 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE EcData;\r
616 UINT32 Uid;\r
617 UINT8 GpeBit;\r
618} EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
619\r
620///\r
621/// ECDT Version (as defined in ACPI 6.3 spec.)\r
622///\r
623#define EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
624\r
625///\r
626/// System Resource Affinity Table (SRAT). The rest of the table\r
627/// must be defined in a platform specific manner.\r
628///\r
629typedef struct {\r
630 EFI_ACPI_DESCRIPTION_HEADER Header;\r
631 UINT32 Reserved1; ///< Must be set to 1\r
632 UINT64 Reserved2;\r
633} EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
634\r
635///\r
636/// SRAT Version (as defined in ACPI 6.3 spec.)\r
637///\r
638#define EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
639\r
640//\r
641// SRAT structure types.\r
642// All other values between 0x05 an 0xFF are reserved and\r
643// will be ignored by OSPM.\r
644//\r
645#define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
646#define EFI_ACPI_6_3_MEMORY_AFFINITY 0x01\r
647#define EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
648#define EFI_ACPI_6_3_GICC_AFFINITY 0x03\r
649#define EFI_ACPI_6_3_GIC_ITS_AFFINITY 0x04\r
650\r
651///\r
652/// Processor Local APIC/SAPIC Affinity Structure Definition\r
653///\r
654typedef struct {\r
655 UINT8 Type;\r
656 UINT8 Length;\r
657 UINT8 ProximityDomain7To0;\r
658 UINT8 ApicId;\r
659 UINT32 Flags;\r
660 UINT8 LocalSapicEid;\r
661 UINT8 ProximityDomain31To8[3];\r
662 UINT32 ClockDomain;\r
663} EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
664\r
665///\r
666/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
667///\r
668#define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
669\r
670///\r
671/// Memory Affinity Structure Definition\r
672///\r
673typedef struct {\r
674 UINT8 Type;\r
675 UINT8 Length;\r
676 UINT32 ProximityDomain;\r
677 UINT16 Reserved1;\r
678 UINT32 AddressBaseLow;\r
679 UINT32 AddressBaseHigh;\r
680 UINT32 LengthLow;\r
681 UINT32 LengthHigh;\r
682 UINT32 Reserved2;\r
683 UINT32 Flags;\r
684 UINT64 Reserved3;\r
685} EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE;\r
686\r
687//\r
688// Memory Flags. All other bits are reserved and must be 0.\r
689//\r
690#define EFI_ACPI_6_3_MEMORY_ENABLED (1 << 0)\r
691#define EFI_ACPI_6_3_MEMORY_HOT_PLUGGABLE (1 << 1)\r
692#define EFI_ACPI_6_3_MEMORY_NONVOLATILE (1 << 2)\r
693\r
694///\r
695/// Processor Local x2APIC Affinity Structure Definition\r
696///\r
697typedef struct {\r
698 UINT8 Type;\r
699 UINT8 Length;\r
700 UINT8 Reserved1[2];\r
701 UINT32 ProximityDomain;\r
702 UINT32 X2ApicId;\r
703 UINT32 Flags;\r
704 UINT32 ClockDomain;\r
705 UINT8 Reserved2[4];\r
706} EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
707\r
708///\r
709/// GICC Affinity Structure Definition\r
710///\r
711typedef struct {\r
712 UINT8 Type;\r
713 UINT8 Length;\r
714 UINT32 ProximityDomain;\r
715 UINT32 AcpiProcessorUid;\r
716 UINT32 Flags;\r
717 UINT32 ClockDomain;\r
718} EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE;\r
719\r
720///\r
721/// GICC Flags. All other bits are reserved and must be 0.\r
722///\r
723#define EFI_ACPI_6_3_GICC_ENABLED (1 << 0)\r
724\r
725///\r
726/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition\r
727///\r
728typedef struct {\r
729 UINT8 Type;\r
730 UINT8 Length;\r
731 UINT32 ProximityDomain;\r
732 UINT8 Reserved[2];\r
733 UINT32 ItsId;\r
734} EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE;\r
735\r
736///\r
737/// Device Handle - ACPI\r
738///\r
739typedef struct {\r
740 UINT64 AcpiHid;\r
741 UINT32 AcpiUid;\r
742 UINT8 Reserved[4];\r
743} EFI_ACPI_6_3_DEVICE_HANDLE_ACPI;\r
744\r
745///\r
746/// Device Handle - PCI\r
747///\r
748typedef struct {\r
749 UINT16 PciSegment;\r
750 UINT16 PciBdfNumber;\r
751 UINT8 Reserved[12];\r
752} EFI_ACPI_6_3_DEVICE_HANDLE_PCI;\r
753\r
754///\r
755/// Generic Initiator Affinity Structure\r
756///\r
757typedef struct {\r
758 UINT8 Type;\r
759 UINT8 Length;\r
760 UINT8 Reserved1;\r
761 UINT8 DeviceHandleType;\r
762 UINT32 ProximityDomain;\r
763\r
764 union {\r
765 EFI_ACPI_6_3_DEVICE_HANDLE_ACPI Acpi;\r
766 EFI_ACPI_6_3_DEVICE_HANDLE_PCI Pci;\r
767 } DeviceHandle;\r
768\r
769 UINT32 Flags;\r
770 UINT8 Reserved2[4];\r
771} EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY_STRUCTURE;\r
772\r
773///\r
774/// Generic Initiator Affinity Structure Flags. All other bits are reserved\r
775/// and must be 0.\r
776///\r
777#define EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED (1 << 0)\r
778\r
779///\r
780/// System Locality Distance Information Table (SLIT).\r
781/// The rest of the table is a matrix.\r
782///\r
783typedef struct {\r
784 EFI_ACPI_DESCRIPTION_HEADER Header;\r
785 UINT64 NumberOfSystemLocalities;\r
786} EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
787\r
788///\r
789/// SLIT Version (as defined in ACPI 6.3 spec.)\r
790///\r
791#define EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
792\r
793///\r
794/// Corrected Platform Error Polling Table (CPEP)\r
795///\r
796typedef struct {\r
797 EFI_ACPI_DESCRIPTION_HEADER Header;\r
798 UINT8 Reserved[8];\r
799} EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
800\r
801///\r
802/// CPEP Version (as defined in ACPI 6.3 spec.)\r
803///\r
804#define EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
805\r
806//\r
807// CPEP processor structure types.\r
808//\r
809#define EFI_ACPI_6_3_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
810\r
811///\r
812/// Corrected Platform Error Polling Processor Structure Definition\r
813///\r
814typedef struct {\r
815 UINT8 Type;\r
816 UINT8 Length;\r
817 UINT8 ProcessorId;\r
818 UINT8 ProcessorEid;\r
819 UINT32 PollingInterval;\r
820} EFI_ACPI_6_3_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
821\r
822///\r
823/// Maximum System Characteristics Table (MSCT)\r
824///\r
825typedef struct {\r
826 EFI_ACPI_DESCRIPTION_HEADER Header;\r
827 UINT32 OffsetProxDomInfo;\r
828 UINT32 MaximumNumberOfProximityDomains;\r
829 UINT32 MaximumNumberOfClockDomains;\r
830 UINT64 MaximumPhysicalAddress;\r
831} EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
832\r
833///\r
834/// MSCT Version (as defined in ACPI 6.3 spec.)\r
835///\r
836#define EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
837\r
838///\r
839/// Maximum Proximity Domain Information Structure Definition\r
840///\r
841typedef struct {\r
842 UINT8 Revision;\r
843 UINT8 Length;\r
844 UINT32 ProximityDomainRangeLow;\r
845 UINT32 ProximityDomainRangeHigh;\r
846 UINT32 MaximumProcessorCapacity;\r
847 UINT64 MaximumMemoryCapacity;\r
848} EFI_ACPI_6_3_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
849\r
850///\r
851/// ACPI RAS Feature Table definition.\r
852///\r
853typedef struct {\r
854 EFI_ACPI_DESCRIPTION_HEADER Header;\r
855 UINT8 PlatformCommunicationChannelIdentifier[12];\r
856} EFI_ACPI_6_3_RAS_FEATURE_TABLE;\r
857\r
858///\r
859/// RASF Version (as defined in ACPI 6.3 spec.)\r
860///\r
861#define EFI_ACPI_6_3_RAS_FEATURE_TABLE_REVISION 0x01\r
862\r
863///\r
864/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
865///\r
866typedef struct {\r
867 UINT32 Signature;\r
868 UINT16 Command;\r
869 UINT16 Status;\r
870 UINT16 Version;\r
871 UINT8 RASCapabilities[16];\r
872 UINT8 SetRASCapabilities[16];\r
873 UINT16 NumberOfRASFParameterBlocks;\r
874 UINT32 SetRASCapabilitiesStatus;\r
875} EFI_ACPI_6_3_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
876\r
877///\r
878/// ACPI RASF PCC command code\r
879///\r
880#define EFI_ACPI_6_3_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
881\r
882///\r
883/// ACPI RASF Platform RAS Capabilities\r
884///\r
885#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0\r
886#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1\r
887#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2\r
888#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3\r
889#define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4\r
890\r
891///\r
892/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
893///\r
894typedef struct {\r
895 UINT16 Type;\r
896 UINT16 Version;\r
897 UINT16 Length;\r
898 UINT16 PatrolScrubCommand;\r
899 UINT64 RequestedAddressRange[2];\r
900 UINT64 ActualAddressRange[2];\r
901 UINT16 Flags;\r
902 UINT8 RequestedSpeed;\r
903} EFI_ACPI_6_3_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
904\r
905///\r
906/// ACPI RASF Patrol Scrub command\r
907///\r
908#define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
909#define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
910#define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
911\r
912///\r
913/// Memory Power State Table definition.\r
914///\r
915typedef struct {\r
916 EFI_ACPI_DESCRIPTION_HEADER Header;\r
917 UINT8 PlatformCommunicationChannelIdentifier;\r
918 UINT8 Reserved[3];\r
919// Memory Power Node Structure\r
920// Memory Power State Characteristics\r
921} EFI_ACPI_6_3_MEMORY_POWER_STATUS_TABLE;\r
922\r
923///\r
924/// MPST Version (as defined in ACPI 6.3 spec.)\r
925///\r
926#define EFI_ACPI_6_3_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
927\r
928///\r
929/// MPST Platform Communication Channel Shared Memory Region definition.\r
930///\r
931typedef struct {\r
932 UINT32 Signature;\r
933 UINT16 Command;\r
934 UINT16 Status;\r
935 UINT32 MemoryPowerCommandRegister;\r
936 UINT32 MemoryPowerStatusRegister;\r
937 UINT32 PowerStateId;\r
938 UINT32 MemoryPowerNodeId;\r
939 UINT64 MemoryEnergyConsumed;\r
940 UINT64 ExpectedAveragePowerComsuned;\r
941} EFI_ACPI_6_3_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
942\r
943///\r
944/// ACPI MPST PCC command code\r
945///\r
946#define EFI_ACPI_6_3_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
947\r
948///\r
949/// ACPI MPST Memory Power command\r
950///\r
951#define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
952#define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
953#define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
954#define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
955\r
956///\r
957/// MPST Memory Power Node Table\r
958///\r
959typedef struct {\r
960 UINT8 PowerStateValue;\r
961 UINT8 PowerStateInformationIndex;\r
962} EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE;\r
963\r
964typedef struct {\r
965 UINT8 Flag;\r
966 UINT8 Reserved;\r
967 UINT16 MemoryPowerNodeId;\r
968 UINT32 Length;\r
969 UINT64 AddressBase;\r
970 UINT64 AddressLength;\r
971 UINT32 NumberOfPowerStates;\r
972 UINT32 NumberOfPhysicalComponents;\r
973//EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
974//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
975} EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE;\r
976\r
977#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
978#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
979#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
980\r
981typedef struct {\r
982 UINT16 MemoryPowerNodeCount;\r
983 UINT8 Reserved[2];\r
984} EFI_ACPI_6_3_MPST_MEMORY_POWER_NODE_TABLE;\r
985\r
986///\r
987/// MPST Memory Power State Characteristics Table\r
988///\r
989typedef struct {\r
990 UINT8 PowerStateStructureID;\r
991 UINT8 Flag;\r
992 UINT16 Reserved;\r
993 UINT32 AveragePowerConsumedInMPS0;\r
994 UINT32 RelativePowerSavingToMPS0;\r
995 UINT64 ExitLatencyToMPS0;\r
996} EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
997\r
998#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
999#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
1000#define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
1001\r
1002typedef struct {\r
1003 UINT16 MemoryPowerStateCharacteristicsCount;\r
1004 UINT8 Reserved[2];\r
1005} EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
1006\r
1007///\r
1008/// Memory Topology Table definition.\r
1009///\r
1010typedef struct {\r
1011 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1012 UINT32 Reserved;\r
1013} EFI_ACPI_6_3_MEMORY_TOPOLOGY_TABLE;\r
1014\r
1015///\r
1016/// PMTT Version (as defined in ACPI 6.3 spec.)\r
1017///\r
1018#define EFI_ACPI_6_3_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
1019\r
1020///\r
1021/// Common Memory Aggregator Device Structure.\r
1022///\r
1023typedef struct {\r
1024 UINT8 Type;\r
1025 UINT8 Reserved;\r
1026 UINT16 Length;\r
1027 UINT16 Flags;\r
1028 UINT16 Reserved1;\r
1029} EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1030\r
1031///\r
1032/// Memory Aggregator Device Type\r
1033///\r
1034#define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
1035#define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
1036#define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
1037\r
1038///\r
1039/// Socket Memory Aggregator Device Structure.\r
1040///\r
1041typedef struct {\r
1042 EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1043 UINT16 SocketIdentifier;\r
1044 UINT16 Reserved;\r
1045//EFI_ACPI_6_3_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
1046} EFI_ACPI_6_3_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1047\r
1048///\r
1049/// MemoryController Memory Aggregator Device Structure.\r
1050///\r
1051typedef struct {\r
1052 EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1053 UINT32 ReadLatency;\r
1054 UINT32 WriteLatency;\r
1055 UINT32 ReadBandwidth;\r
1056 UINT32 WriteBandwidth;\r
1057 UINT16 OptimalAccessUnit;\r
1058 UINT16 OptimalAccessAlignment;\r
1059 UINT16 Reserved;\r
1060 UINT16 NumberOfProximityDomains;\r
1061//UINT32 ProximityDomain[NumberOfProximityDomains];\r
1062//EFI_ACPI_6_3_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
1063} EFI_ACPI_6_3_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1064\r
1065///\r
1066/// DIMM Memory Aggregator Device Structure.\r
1067///\r
1068typedef struct {\r
1069 EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1070 UINT16 PhysicalComponentIdentifier;\r
1071 UINT16 Reserved;\r
1072 UINT32 SizeOfDimm;\r
1073 UINT32 SmbiosHandle;\r
1074} EFI_ACPI_6_3_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1075\r
1076///\r
1077/// Boot Graphics Resource Table definition.\r
1078///\r
1079typedef struct {\r
1080 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1081 ///\r
1082 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1083 ///\r
1084 UINT16 Version;\r
1085 ///\r
1086 /// 1-byte status field indicating current status about the table.\r
1087 /// Bits[7:1] = Reserved (must be zero)\r
1088 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1089 ///\r
1090 UINT8 Status;\r
1091 ///\r
1092 /// 1-byte enumerated type field indicating format of the image.\r
1093 /// 0 = Bitmap\r
1094 /// 1 - 255 Reserved (for future use)\r
1095 ///\r
1096 UINT8 ImageType;\r
1097 ///\r
1098 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1099 /// of the image bitmap.\r
1100 ///\r
1101 UINT64 ImageAddress;\r
1102 ///\r
1103 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1104 /// (X, Y) display offset of the top left corner of the boot image.\r
1105 /// The top left corner of the display is at offset (0, 0).\r
1106 ///\r
1107 UINT32 ImageOffsetX;\r
1108 ///\r
1109 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1110 /// (X, Y) display offset of the top left corner of the boot image.\r
1111 /// The top left corner of the display is at offset (0, 0).\r
1112 ///\r
1113 UINT32 ImageOffsetY;\r
1114} EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1115\r
1116///\r
1117/// BGRT Revision\r
1118///\r
1119#define EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1120\r
1121///\r
1122/// BGRT Version\r
1123///\r
1124#define EFI_ACPI_6_3_BGRT_VERSION 0x01\r
1125\r
1126///\r
1127/// BGRT Status\r
1128///\r
1129#define EFI_ACPI_6_3_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1130#define EFI_ACPI_6_3_BGRT_STATUS_DISPLAYED 0x01\r
1131\r
1132///\r
1133/// BGRT Image Type\r
1134///\r
1135#define EFI_ACPI_6_3_BGRT_IMAGE_TYPE_BMP 0x00\r
1136\r
1137///\r
1138/// FPDT Version (as defined in ACPI 6.3 spec.)\r
1139///\r
1140#define EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1141\r
1142///\r
1143/// FPDT Performance Record Types\r
1144///\r
1145#define EFI_ACPI_6_3_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1146#define EFI_ACPI_6_3_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1147\r
1148///\r
1149/// FPDT Performance Record Revision\r
1150///\r
1151#define EFI_ACPI_6_3_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1152#define EFI_ACPI_6_3_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1153\r
1154///\r
1155/// FPDT Runtime Performance Record Types\r
1156///\r
1157#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1158#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1159#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1160\r
1161///\r
1162/// FPDT Runtime Performance Record Revision\r
1163///\r
1164#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1165#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1166#define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1167\r
1168///\r
1169/// FPDT Performance Record header\r
1170///\r
1171typedef struct {\r
1172 UINT16 Type;\r
1173 UINT8 Length;\r
1174 UINT8 Revision;\r
1175} EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER;\r
1176\r
1177///\r
1178/// FPDT Performance Table header\r
1179///\r
1180typedef struct {\r
1181 UINT32 Signature;\r
1182 UINT32 Length;\r
1183} EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER;\r
1184\r
1185///\r
1186/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1187///\r
1188typedef struct {\r
1189 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1190 UINT32 Reserved;\r
1191 ///\r
1192 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1193 ///\r
1194 UINT64 BootPerformanceTablePointer;\r
1195} EFI_ACPI_6_3_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1196\r
1197///\r
1198/// FPDT S3 Performance Table Pointer Record Structure\r
1199///\r
1200typedef struct {\r
1201 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1202 UINT32 Reserved;\r
1203 ///\r
1204 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1205 ///\r
1206 UINT64 S3PerformanceTablePointer;\r
1207} EFI_ACPI_6_3_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1208\r
1209///\r
1210/// FPDT Firmware Basic Boot Performance Record Structure\r
1211///\r
1212typedef struct {\r
1213 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1214 UINT32 Reserved;\r
1215 ///\r
1216 /// Timer value logged at the beginning of firmware image execution.\r
1217 /// This may not always be zero or near zero.\r
1218 ///\r
1219 UINT64 ResetEnd;\r
1220 ///\r
1221 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1222 /// For non-UEFI compatible boots, this field must be zero.\r
1223 ///\r
1224 UINT64 OsLoaderLoadImageStart;\r
1225 ///\r
1226 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1227 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1228 /// to the INT 19h handler invocation.\r
1229 ///\r
1230 UINT64 OsLoaderStartImageStart;\r
1231 ///\r
1232 /// Timer value logged at the point when the OS loader calls the\r
1233 /// ExitBootServices function for UEFI compatible firmware.\r
1234 /// For non-UEFI compatible boots, this field must be zero.\r
1235 ///\r
1236 UINT64 ExitBootServicesEntry;\r
1237 ///\r
1238 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1239 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1240 /// For non-UEFI compatible boots, this field must be zero.\r
1241 ///\r
1242 UINT64 ExitBootServicesExit;\r
1243} EFI_ACPI_6_3_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1244\r
1245///\r
1246/// FPDT Firmware Basic Boot Performance Table signature\r
1247///\r
1248#define EFI_ACPI_6_3_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1249\r
1250//\r
1251// FPDT Firmware Basic Boot Performance Table\r
1252//\r
1253typedef struct {\r
1254 EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1255 //\r
1256 // one or more Performance Records.\r
1257 //\r
1258} EFI_ACPI_6_3_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1259\r
1260///\r
1261/// FPDT "S3PT" S3 Performance Table\r
1262///\r
1263#define EFI_ACPI_6_3_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1264\r
1265//\r
1266// FPDT Firmware S3 Boot Performance Table\r
1267//\r
1268typedef struct {\r
1269 EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1270 //\r
1271 // one or more Performance Records.\r
1272 //\r
1273} EFI_ACPI_6_3_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1274\r
1275///\r
1276/// FPDT Basic S3 Resume Performance Record\r
1277///\r
1278typedef struct {\r
1279 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1280 ///\r
1281 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1282 ///\r
1283 UINT32 ResumeCount;\r
1284 ///\r
1285 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1286 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1287 ///\r
1288 UINT64 FullResume;\r
1289 ///\r
1290 /// Average timer value of all resume cycles logged since the last full boot\r
1291 /// sequence, including the most recent resume. Note that the entire log of\r
1292 /// timer values does not need to be retained in order to calculate this average.\r
1293 ///\r
1294 UINT64 AverageResume;\r
1295} EFI_ACPI_6_3_FPDT_S3_RESUME_RECORD;\r
1296\r
1297///\r
1298/// FPDT Basic S3 Suspend Performance Record\r
1299///\r
1300typedef struct {\r
1301 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1302 ///\r
1303 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1304 /// Only the most recent suspend cycle's timer value is retained.\r
1305 ///\r
1306 UINT64 SuspendStart;\r
1307 ///\r
1308 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1309 /// mechanism) used to trigger hardware entry to S3.\r
1310 /// Only the most recent suspend cycle's timer value is retained.\r
1311 ///\r
1312 UINT64 SuspendEnd;\r
1313} EFI_ACPI_6_3_FPDT_S3_SUSPEND_RECORD;\r
1314\r
1315///\r
1316/// Firmware Performance Record Table definition.\r
1317///\r
1318typedef struct {\r
1319 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1320} EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1321\r
1322///\r
1323/// Generic Timer Description Table definition.\r
1324///\r
1325typedef struct {\r
1326 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1327 UINT64 CntControlBasePhysicalAddress;\r
1328 UINT32 Reserved;\r
1329 UINT32 SecurePL1TimerGSIV;\r
1330 UINT32 SecurePL1TimerFlags;\r
1331 UINT32 NonSecurePL1TimerGSIV;\r
1332 UINT32 NonSecurePL1TimerFlags;\r
1333 UINT32 VirtualTimerGSIV;\r
1334 UINT32 VirtualTimerFlags;\r
1335 UINT32 NonSecurePL2TimerGSIV;\r
1336 UINT32 NonSecurePL2TimerFlags;\r
1337 UINT64 CntReadBasePhysicalAddress;\r
1338 UINT32 PlatformTimerCount;\r
1339 UINT32 PlatformTimerOffset;\r
1340 UINT32 VirtualPL2TimerGSIV;\r
1341 UINT32 VirtualPL2TimerFlags;\r
1342} EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1343\r
1344///\r
1345/// GTDT Version (as defined in ACPI 6.3 spec.)\r
1346///\r
1347#define EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03\r
1348\r
1349///\r
1350/// Timer Flags. All other bits are reserved and must be 0.\r
1351///\r
1352#define EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1353#define EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1354#define EFI_ACPI_6_3_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1355\r
1356///\r
1357/// Platform Timer Type\r
1358///\r
1359#define EFI_ACPI_6_3_GTDT_GT_BLOCK 0\r
1360#define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG 1\r
1361\r
1362///\r
1363/// GT Block Structure\r
1364///\r
1365typedef struct {\r
1366 UINT8 Type;\r
1367 UINT16 Length;\r
1368 UINT8 Reserved;\r
1369 UINT64 CntCtlBase;\r
1370 UINT32 GTBlockTimerCount;\r
1371 UINT32 GTBlockTimerOffset;\r
1372} EFI_ACPI_6_3_GTDT_GT_BLOCK_STRUCTURE;\r
1373\r
1374///\r
1375/// GT Block Timer Structure\r
1376///\r
1377typedef struct {\r
1378 UINT8 GTFrameNumber;\r
1379 UINT8 Reserved[3];\r
1380 UINT64 CntBaseX;\r
1381 UINT64 CntEL0BaseX;\r
1382 UINT32 GTxPhysicalTimerGSIV;\r
1383 UINT32 GTxPhysicalTimerFlags;\r
1384 UINT32 GTxVirtualTimerGSIV;\r
1385 UINT32 GTxVirtualTimerFlags;\r
1386 UINT32 GTxCommonFlags;\r
1387} EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1388\r
1389///\r
1390/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1391///\r
1392#define EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1393#define EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1394\r
1395///\r
1396/// Common Flags Flags. All other bits are reserved and must be 0.\r
1397///\r
1398#define EFI_ACPI_6_3_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1399#define EFI_ACPI_6_3_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1400\r
1401///\r
1402/// SBSA Generic Watchdog Structure\r
1403///\r
1404typedef struct {\r
1405 UINT8 Type;\r
1406 UINT16 Length;\r
1407 UINT8 Reserved;\r
1408 UINT64 RefreshFramePhysicalAddress;\r
1409 UINT64 WatchdogControlFramePhysicalAddress;\r
1410 UINT32 WatchdogTimerGSIV;\r
1411 UINT32 WatchdogTimerFlags;\r
1412} EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1413\r
1414///\r
1415/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1416///\r
1417#define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1418#define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1419#define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1420\r
1421//\r
1422// NVDIMM Firmware Interface Table definition.\r
1423//\r
1424typedef struct {\r
1425 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1426 UINT32 Reserved;\r
1427} EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1428\r
1429//\r
1430// NFIT Version (as defined in ACPI 6.3 spec.)\r
1431//\r
1432#define EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1433\r
1434//\r
1435// Definition for NFIT Table Structure Types\r
1436//\r
1437#define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1438#define EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1\r
1439#define EFI_ACPI_6_3_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1440#define EFI_ACPI_6_3_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1441#define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1442#define EFI_ACPI_6_3_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1443#define EFI_ACPI_6_3_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1444\r
1445//\r
1446// Definition for NFIT Structure Header\r
1447//\r
1448typedef struct {\r
1449 UINT16 Type;\r
1450 UINT16 Length;\r
1451} EFI_ACPI_6_3_NFIT_STRUCTURE_HEADER;\r
1452\r
1453//\r
1454// Definition for System Physical Address Range Structure\r
1455//\r
1456#define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1457#define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
1458#define EFI_ACPI_6_3_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}\r
1459#define EFI_ACPI_6_3_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}\r
1460#define EFI_ACPI_6_3_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}\r
1461#define EFI_ACPI_6_3_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}\r
1462#define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}\r
1463#define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}\r
1464#define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
1465#define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}\r
1466typedef struct {\r
1467 UINT16 Type;\r
1468 UINT16 Length;\r
1469 UINT16 SPARangeStructureIndex;\r
1470 UINT16 Flags;\r
1471 UINT32 Reserved_8;\r
1472 UINT32 ProximityDomain;\r
1473 GUID AddressRangeTypeGUID;\r
1474 UINT64 SystemPhysicalAddressRangeBase;\r
1475 UINT64 SystemPhysicalAddressRangeLength;\r
1476 UINT64 AddressRangeMemoryMappingAttribute;\r
1477} EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1478\r
1479//\r
1480// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1481//\r
1482typedef struct {\r
1483 UINT32 DIMMNumber:4;\r
1484 UINT32 MemoryChannelNumber:4;\r
1485 UINT32 MemoryControllerID:4;\r
1486 UINT32 SocketID:4;\r
1487 UINT32 NodeControllerID:12;\r
1488 UINT32 Reserved_28:4;\r
1489} EFI_ACPI_6_3_NFIT_DEVICE_HANDLE;\r
1490\r
1491#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1492#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1493#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1494#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1495#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1496#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1497#define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6\r
1498typedef struct {\r
1499 UINT16 Type;\r
1500 UINT16 Length;\r
1501 EFI_ACPI_6_3_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1502 UINT16 NVDIMMPhysicalID;\r
1503 UINT16 NVDIMMRegionID;\r
1504 UINT16 SPARangeStructureIndex ;\r
1505 UINT16 NVDIMMControlRegionStructureIndex;\r
1506 UINT64 NVDIMMRegionSize;\r
1507 UINT64 RegionOffset;\r
1508 UINT64 NVDIMMPhysicalAddressRegionBase;\r
1509 UINT16 InterleaveStructureIndex;\r
1510 UINT16 InterleaveWays;\r
1511 UINT16 NVDIMMStateFlags;\r
1512 UINT16 Reserved_46;\r
1513} EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;\r
1514\r
1515//\r
1516// Definition for Interleave Structure\r
1517//\r
1518typedef struct {\r
1519 UINT16 Type;\r
1520 UINT16 Length;\r
1521 UINT16 InterleaveStructureIndex;\r
1522 UINT16 Reserved_6;\r
1523 UINT32 NumberOfLines;\r
1524 UINT32 LineSize;\r
1525//UINT32 LineOffset[NumberOfLines];\r
1526} EFI_ACPI_6_3_NFIT_INTERLEAVE_STRUCTURE;\r
1527\r
1528//\r
1529// Definition for SMBIOS Management Information Structure\r
1530//\r
1531typedef struct {\r
1532 UINT16 Type;\r
1533 UINT16 Length;\r
1534 UINT32 Reserved_4;\r
1535//UINT8 Data[];\r
1536} EFI_ACPI_6_3_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1537\r
1538//\r
1539// Definition for NVDIMM Control Region Structure\r
1540//\r
1541#define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0\r
1542\r
1543#define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
1544typedef struct {\r
1545 UINT16 Type;\r
1546 UINT16 Length;\r
1547 UINT16 NVDIMMControlRegionStructureIndex;\r
1548 UINT16 VendorID;\r
1549 UINT16 DeviceID;\r
1550 UINT16 RevisionID;\r
1551 UINT16 SubsystemVendorID;\r
1552 UINT16 SubsystemDeviceID;\r
1553 UINT16 SubsystemRevisionID;\r
1554 UINT8 ValidFields;\r
1555 UINT8 ManufacturingLocation;\r
1556 UINT16 ManufacturingDate;\r
1557 UINT8 Reserved_22[2];\r
1558 UINT32 SerialNumber;\r
1559 UINT16 RegionFormatInterfaceCode;\r
1560 UINT16 NumberOfBlockControlWindows;\r
1561 UINT64 SizeOfBlockControlWindow;\r
1562 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1563 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1564 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1565 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1566 UINT16 NVDIMMControlRegionFlag;\r
1567 UINT8 Reserved_74[6];\r
1568} EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1569\r
1570//\r
1571// Definition for NVDIMM Block Data Window Region Structure\r
1572//\r
1573typedef struct {\r
1574 UINT16 Type;\r
1575 UINT16 Length;\r
1576 UINT16 NVDIMMControlRegionStructureIndex;\r
1577 UINT16 NumberOfBlockDataWindows;\r
1578 UINT64 BlockDataWindowStartOffset;\r
1579 UINT64 SizeOfBlockDataWindow;\r
1580 UINT64 BlockAccessibleMemoryCapacity;\r
1581 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1582} EFI_ACPI_6_3_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1583\r
1584//\r
1585// Definition for Flush Hint Address Structure\r
1586//\r
1587typedef struct {\r
1588 UINT16 Type;\r
1589 UINT16 Length;\r
1590 EFI_ACPI_6_3_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1591 UINT16 NumberOfFlushHintAddresses;\r
1592 UINT8 Reserved_10[6];\r
1593//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1594} EFI_ACPI_6_3_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1595\r
1596///\r
1597/// Secure DEVices Table (SDEV)\r
1598///\r
1599typedef struct {\r
1600 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1601} EFI_ACPI_6_3_SECURE_DEVICES_TABLE_HEADER;\r
1602\r
1603///\r
1604/// SDEV Revision (as defined in ACPI 6.3 spec.)\r
1605///\r
1606#define EFI_ACPI_6_3_SECURE_DEVICES_TABLE_REVISION 0x01\r
1607\r
1608///\r
1609/// Secure Devcice types\r
1610///\r
1611#define EFI_ACPI_6_3_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
1612#define EFI_ACPI_6_3_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00\r
1613\r
1614///\r
1615/// Secure Devcice flags\r
1616///\r
1617#define EFI_ACPI_6_3_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
1618\r
1619///\r
1620/// SDEV Structure Header\r
1621///\r
1622typedef struct {\r
1623 UINT8 Type;\r
1624 UINT8 Flags;\r
1625 UINT16 Length;\r
1626} EFI_ACPI_6_3_SDEV_STRUCTURE_HEADER;\r
1627\r
1628///\r
1629/// PCIe Endpoint Device based Secure Device Structure\r
1630///\r
1631typedef struct {\r
1632 UINT8 Type;\r
1633 UINT8 Flags;\r
1634 UINT16 Length;\r
1635 UINT16 PciSegmentNumber;\r
1636 UINT16 StartBusNumber;\r
1637 UINT16 PciPathOffset;\r
1638 UINT16 PciPathLength;\r
1639 UINT16 VendorSpecificDataOffset;\r
1640 UINT16 VendorSpecificDataLength;\r
1641} EFI_ACPI_6_3_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
1642\r
1643///\r
1644/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
1645///\r
1646typedef struct {\r
1647 UINT8 Type;\r
1648 UINT8 Flags;\r
1649 UINT16 Length;\r
1650 UINT16 DeviceIdentifierOffset;\r
1651 UINT16 DeviceIdentifierLength;\r
1652 UINT16 VendorSpecificDataOffset;\r
1653 UINT16 VendorSpecificDataLength;\r
1654} EFI_ACPI_6_3_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
1655\r
1656///\r
1657/// Boot Error Record Table (BERT)\r
1658///\r
1659typedef struct {\r
1660 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1661 UINT32 BootErrorRegionLength;\r
1662 UINT64 BootErrorRegion;\r
1663} EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1664\r
1665///\r
1666/// BERT Version (as defined in ACPI 6.3 spec.)\r
1667///\r
1668#define EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1669\r
1670///\r
1671/// Boot Error Region Block Status Definition\r
1672///\r
1673typedef struct {\r
1674 UINT32 UncorrectableErrorValid:1;\r
1675 UINT32 CorrectableErrorValid:1;\r
1676 UINT32 MultipleUncorrectableErrors:1;\r
1677 UINT32 MultipleCorrectableErrors:1;\r
1678 UINT32 ErrorDataEntryCount:10;\r
1679 UINT32 Reserved:18;\r
1680} EFI_ACPI_6_3_ERROR_BLOCK_STATUS;\r
1681\r
1682///\r
1683/// Boot Error Region Definition\r
1684///\r
1685typedef struct {\r
1686 EFI_ACPI_6_3_ERROR_BLOCK_STATUS BlockStatus;\r
1687 UINT32 RawDataOffset;\r
1688 UINT32 RawDataLength;\r
1689 UINT32 DataLength;\r
1690 UINT32 ErrorSeverity;\r
1691} EFI_ACPI_6_3_BOOT_ERROR_REGION_STRUCTURE;\r
1692\r
1693//\r
1694// Boot Error Severity types\r
1695//\r
1696#define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTABLE 0x00\r
1697#define EFI_ACPI_6_3_ERROR_SEVERITY_FATAL 0x01\r
1698#define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED 0x02\r
1699#define EFI_ACPI_6_3_ERROR_SEVERITY_NONE 0x03\r
1700\r
1701///\r
1702/// Generic Error Data Entry Definition\r
1703///\r
1704typedef struct {\r
1705 UINT8 SectionType[16];\r
1706 UINT32 ErrorSeverity;\r
1707 UINT16 Revision;\r
1708 UINT8 ValidationBits;\r
1709 UINT8 Flags;\r
1710 UINT32 ErrorDataLength;\r
1711 UINT8 FruId[16];\r
1712 UINT8 FruText[20];\r
1713 UINT8 Timestamp[8];\r
1714} EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1715\r
1716///\r
1717/// Generic Error Data Entry Version (as defined in ACPI 6.3 spec.)\r
1718///\r
1719#define EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300\r
1720\r
1721///\r
1722/// HEST - Hardware Error Source Table\r
1723///\r
1724typedef struct {\r
1725 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1726 UINT32 ErrorSourceCount;\r
1727} EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1728\r
1729///\r
1730/// HEST Version (as defined in ACPI 6.3 spec.)\r
1731///\r
1732#define EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1733\r
1734//\r
1735// Error Source structure types.\r
1736//\r
1737#define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1738#define EFI_ACPI_6_3_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1739#define EFI_ACPI_6_3_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1740#define EFI_ACPI_6_3_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1741#define EFI_ACPI_6_3_PCI_EXPRESS_DEVICE_AER 0x07\r
1742#define EFI_ACPI_6_3_PCI_EXPRESS_BRIDGE_AER 0x08\r
1743#define EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR 0x09\r
1744#define EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A\r
1745#define EFI_ACPI_6_3_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B\r
1746\r
1747//\r
1748// Error Source structure flags.\r
1749//\r
1750#define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1751#define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1752#define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)\r
1753\r
1754///\r
1755/// IA-32 Architecture Machine Check Exception Structure Definition\r
1756///\r
1757typedef struct {\r
1758 UINT16 Type;\r
1759 UINT16 SourceId;\r
1760 UINT8 Reserved0[2];\r
1761 UINT8 Flags;\r
1762 UINT8 Enabled;\r
1763 UINT32 NumberOfRecordsToPreAllocate;\r
1764 UINT32 MaxSectionsPerRecord;\r
1765 UINT64 GlobalCapabilityInitData;\r
1766 UINT64 GlobalControlInitData;\r
1767 UINT8 NumberOfHardwareBanks;\r
1768 UINT8 Reserved1[7];\r
1769} EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1770\r
1771///\r
1772/// IA-32 Architecture Machine Check Bank Structure Definition\r
1773///\r
1774typedef struct {\r
1775 UINT8 BankNumber;\r
1776 UINT8 ClearStatusOnInitialization;\r
1777 UINT8 StatusDataFormat;\r
1778 UINT8 Reserved0;\r
1779 UINT32 ControlRegisterMsrAddress;\r
1780 UINT64 ControlInitData;\r
1781 UINT32 StatusRegisterMsrAddress;\r
1782 UINT32 AddressRegisterMsrAddress;\r
1783 UINT32 MiscRegisterMsrAddress;\r
1784} EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1785\r
1786///\r
1787/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1788///\r
1789#define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1790#define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1791#define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1792\r
1793//\r
1794// Hardware Error Notification types. All other values are reserved\r
1795//\r
1796#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1797#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1798#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1799#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1800#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1801#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05\r
1802#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_MCE 0x06\r
1803#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07\r
1804#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08\r
1805#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09\r
1806#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A\r
1807#define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B\r
1808\r
1809///\r
1810/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1811///\r
1812typedef struct {\r
1813 UINT16 Type:1;\r
1814 UINT16 PollInterval:1;\r
1815 UINT16 SwitchToPollingThresholdValue:1;\r
1816 UINT16 SwitchToPollingThresholdWindow:1;\r
1817 UINT16 ErrorThresholdValue:1;\r
1818 UINT16 ErrorThresholdWindow:1;\r
1819 UINT16 Reserved:10;\r
1820} EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1821\r
1822///\r
1823/// Hardware Error Notification Structure Definition\r
1824///\r
1825typedef struct {\r
1826 UINT8 Type;\r
1827 UINT8 Length;\r
1828 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1829 UINT32 PollInterval;\r
1830 UINT32 Vector;\r
1831 UINT32 SwitchToPollingThresholdValue;\r
1832 UINT32 SwitchToPollingThresholdWindow;\r
1833 UINT32 ErrorThresholdValue;\r
1834 UINT32 ErrorThresholdWindow;\r
1835} EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1836\r
1837///\r
1838/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1839///\r
1840typedef struct {\r
1841 UINT16 Type;\r
1842 UINT16 SourceId;\r
1843 UINT8 Reserved0[2];\r
1844 UINT8 Flags;\r
1845 UINT8 Enabled;\r
1846 UINT32 NumberOfRecordsToPreAllocate;\r
1847 UINT32 MaxSectionsPerRecord;\r
1848 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1849 UINT8 NumberOfHardwareBanks;\r
1850 UINT8 Reserved1[3];\r
1851} EFI_ACPI_6_3_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1852\r
1853///\r
1854/// IA-32 Architecture NMI Error Structure Definition\r
1855///\r
1856typedef struct {\r
1857 UINT16 Type;\r
1858 UINT16 SourceId;\r
1859 UINT8 Reserved0[2];\r
1860 UINT32 NumberOfRecordsToPreAllocate;\r
1861 UINT32 MaxSectionsPerRecord;\r
1862 UINT32 MaxRawDataLength;\r
1863} EFI_ACPI_6_3_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1864\r
1865///\r
1866/// PCI Express Root Port AER Structure Definition\r
1867///\r
1868typedef struct {\r
1869 UINT16 Type;\r
1870 UINT16 SourceId;\r
1871 UINT8 Reserved0[2];\r
1872 UINT8 Flags;\r
1873 UINT8 Enabled;\r
1874 UINT32 NumberOfRecordsToPreAllocate;\r
1875 UINT32 MaxSectionsPerRecord;\r
1876 UINT32 Bus;\r
1877 UINT16 Device;\r
1878 UINT16 Function;\r
1879 UINT16 DeviceControl;\r
1880 UINT8 Reserved1[2];\r
1881 UINT32 UncorrectableErrorMask;\r
1882 UINT32 UncorrectableErrorSeverity;\r
1883 UINT32 CorrectableErrorMask;\r
1884 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1885 UINT32 RootErrorCommand;\r
1886} EFI_ACPI_6_3_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1887\r
1888///\r
1889/// PCI Express Device AER Structure Definition\r
1890///\r
1891typedef struct {\r
1892 UINT16 Type;\r
1893 UINT16 SourceId;\r
1894 UINT8 Reserved0[2];\r
1895 UINT8 Flags;\r
1896 UINT8 Enabled;\r
1897 UINT32 NumberOfRecordsToPreAllocate;\r
1898 UINT32 MaxSectionsPerRecord;\r
1899 UINT32 Bus;\r
1900 UINT16 Device;\r
1901 UINT16 Function;\r
1902 UINT16 DeviceControl;\r
1903 UINT8 Reserved1[2];\r
1904 UINT32 UncorrectableErrorMask;\r
1905 UINT32 UncorrectableErrorSeverity;\r
1906 UINT32 CorrectableErrorMask;\r
1907 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1908} EFI_ACPI_6_3_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1909\r
1910///\r
1911/// PCI Express Bridge AER Structure Definition\r
1912///\r
1913typedef struct {\r
1914 UINT16 Type;\r
1915 UINT16 SourceId;\r
1916 UINT8 Reserved0[2];\r
1917 UINT8 Flags;\r
1918 UINT8 Enabled;\r
1919 UINT32 NumberOfRecordsToPreAllocate;\r
1920 UINT32 MaxSectionsPerRecord;\r
1921 UINT32 Bus;\r
1922 UINT16 Device;\r
1923 UINT16 Function;\r
1924 UINT16 DeviceControl;\r
1925 UINT8 Reserved1[2];\r
1926 UINT32 UncorrectableErrorMask;\r
1927 UINT32 UncorrectableErrorSeverity;\r
1928 UINT32 CorrectableErrorMask;\r
1929 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1930 UINT32 SecondaryUncorrectableErrorMask;\r
1931 UINT32 SecondaryUncorrectableErrorSeverity;\r
1932 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1933} EFI_ACPI_6_3_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1934\r
1935///\r
1936/// Generic Hardware Error Source Structure Definition\r
1937///\r
1938typedef struct {\r
1939 UINT16 Type;\r
1940 UINT16 SourceId;\r
1941 UINT16 RelatedSourceId;\r
1942 UINT8 Flags;\r
1943 UINT8 Enabled;\r
1944 UINT32 NumberOfRecordsToPreAllocate;\r
1945 UINT32 MaxSectionsPerRecord;\r
1946 UINT32 MaxRawDataLength;\r
1947 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1948 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1949 UINT32 ErrorStatusBlockLength;\r
1950} EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1951\r
1952///\r
1953/// Generic Hardware Error Source Version 2 Structure Definition\r
1954///\r
1955typedef struct {\r
1956 UINT16 Type;\r
1957 UINT16 SourceId;\r
1958 UINT16 RelatedSourceId;\r
1959 UINT8 Flags;\r
1960 UINT8 Enabled;\r
1961 UINT32 NumberOfRecordsToPreAllocate;\r
1962 UINT32 MaxSectionsPerRecord;\r
1963 UINT32 MaxRawDataLength;\r
1964 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1965 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1966 UINT32 ErrorStatusBlockLength;\r
1967 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;\r
1968 UINT64 ReadAckPreserve;\r
1969 UINT64 ReadAckWrite;\r
1970} EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;\r
1971\r
1972///\r
1973/// Generic Error Status Definition\r
1974///\r
1975typedef struct {\r
1976 EFI_ACPI_6_3_ERROR_BLOCK_STATUS BlockStatus;\r
1977 UINT32 RawDataOffset;\r
1978 UINT32 RawDataLength;\r
1979 UINT32 DataLength;\r
1980 UINT32 ErrorSeverity;\r
1981} EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE;\r
1982\r
1983///\r
1984/// IA-32 Architecture Deferred Machine Check Structure Definition\r
1985///\r
1986typedef struct {\r
1987 UINT16 Type;\r
1988 UINT16 SourceId;\r
1989 UINT8 Reserved0[2];\r
1990 UINT8 Flags;\r
1991 UINT8 Enabled;\r
1992 UINT32 NumberOfRecordsToPreAllocate;\r
1993 UINT32 MaxSectionsPerRecord;\r
1994 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1995 UINT8 NumberOfHardwareBanks;\r
1996 UINT8 Reserved1[3];\r
1997} EFI_ACPI_6_3_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;;\r
1998\r
1999///\r
2000/// HMAT - Heterogeneous Memory Attribute Table\r
2001///\r
2002typedef struct {\r
2003 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2004 UINT8 Reserved[4];\r
2005} EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;\r
2006\r
2007///\r
2008/// HMAT Revision (as defined in ACPI 6.3 spec.)\r
2009///\r
2010#define EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02\r
2011\r
2012///\r
2013/// HMAT types\r
2014///\r
2015#define EFI_ACPI_6_3_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00\r
2016#define EFI_ACPI_6_3_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01\r
2017#define EFI_ACPI_6_3_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02\r
2018\r
2019///\r
2020/// HMAT Structure Header\r
2021///\r
2022typedef struct {\r
2023 UINT16 Type;\r
2024 UINT8 Reserved[2];\r
2025 UINT32 Length;\r
2026} EFI_ACPI_6_3_HMAT_STRUCTURE_HEADER;\r
2027\r
2028///\r
2029/// Memory Proximity Domain Attributes Structure flags\r
2030///\r
2031typedef struct {\r
2032 UINT16 InitiatorProximityDomainValid:1;\r
2033 UINT16 Reserved:15;\r
2034} EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;\r
2035\r
2036///\r
2037/// Memory Proximity Domain Attributes Structure\r
2038///\r
2039typedef struct {\r
2040 UINT16 Type;\r
2041 UINT8 Reserved[2];\r
2042 UINT32 Length;\r
2043 EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags;\r
2044 UINT8 Reserved1[2];\r
2045 UINT32 InitiatorProximityDomain;\r
2046 UINT32 MemoryProximityDomain;\r
2047 UINT8 Reserved2[20];\r
2048} EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;\r
2049\r
2050///\r
2051/// System Locality Latency and Bandwidth Information Structure flags\r
2052///\r
2053typedef struct {\r
2054 UINT8 MemoryHierarchy:4;\r
2055 UINT8 Reserved:4;\r
2056} EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;\r
2057\r
2058///\r
2059/// System Locality Latency and Bandwidth Information Structure\r
2060///\r
2061typedef struct {\r
2062 UINT16 Type;\r
2063 UINT8 Reserved[2];\r
2064 UINT32 Length;\r
2065 EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;\r
2066 UINT8 DataType;\r
2067 UINT8 Reserved1[2];\r
2068 UINT32 NumberOfInitiatorProximityDomains;\r
2069 UINT32 NumberOfTargetProximityDomains;\r
2070 UINT8 Reserved2[4];\r
2071 UINT64 EntryBaseUnit;\r
2072} EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;\r
2073\r
2074///\r
2075/// Memory Side Cache Information Structure cache attributes\r
2076///\r
2077typedef struct {\r
2078 UINT32 TotalCacheLevels:4;\r
2079 UINT32 CacheLevel:4;\r
2080 UINT32 CacheAssociativity:4;\r
2081 UINT32 WritePolicy:4;\r
2082 UINT32 CacheLineSize:16;\r
2083} EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;\r
2084\r
2085///\r
2086/// Memory Side Cache Information Structure\r
2087///\r
2088typedef struct {\r
2089 UINT16 Type;\r
2090 UINT8 Reserved[2];\r
2091 UINT32 Length;\r
2092 UINT32 MemoryProximityDomain;\r
2093 UINT8 Reserved1[4];\r
2094 UINT64 MemorySideCacheSize;\r
2095 EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;\r
2096 UINT8 Reserved2[2];\r
2097 UINT16 NumberOfSmbiosHandles;\r
2098} EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;\r
2099\r
2100///\r
2101/// ERST - Error Record Serialization Table\r
2102///\r
2103typedef struct {\r
2104 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2105 UINT32 SerializationHeaderSize;\r
2106 UINT8 Reserved0[4];\r
2107 UINT32 InstructionEntryCount;\r
2108} EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
2109\r
2110///\r
2111/// ERST Version (as defined in ACPI 6.3 spec.)\r
2112///\r
2113#define EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
2114\r
2115///\r
2116/// ERST Serialization Actions\r
2117///\r
2118#define EFI_ACPI_6_3_ERST_BEGIN_WRITE_OPERATION 0x00\r
2119#define EFI_ACPI_6_3_ERST_BEGIN_READ_OPERATION 0x01\r
2120#define EFI_ACPI_6_3_ERST_BEGIN_CLEAR_OPERATION 0x02\r
2121#define EFI_ACPI_6_3_ERST_END_OPERATION 0x03\r
2122#define EFI_ACPI_6_3_ERST_SET_RECORD_OFFSET 0x04\r
2123#define EFI_ACPI_6_3_ERST_EXECUTE_OPERATION 0x05\r
2124#define EFI_ACPI_6_3_ERST_CHECK_BUSY_STATUS 0x06\r
2125#define EFI_ACPI_6_3_ERST_GET_COMMAND_STATUS 0x07\r
2126#define EFI_ACPI_6_3_ERST_GET_RECORD_IDENTIFIER 0x08\r
2127#define EFI_ACPI_6_3_ERST_SET_RECORD_IDENTIFIER 0x09\r
2128#define EFI_ACPI_6_3_ERST_GET_RECORD_COUNT 0x0A\r
2129#define EFI_ACPI_6_3_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
2130#define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
2131#define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
2132#define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
2133#define EFI_ACPI_6_3_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10\r
2134\r
2135///\r
2136/// ERST Action Command Status\r
2137///\r
2138#define EFI_ACPI_6_3_ERST_STATUS_SUCCESS 0x00\r
2139#define EFI_ACPI_6_3_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
2140#define EFI_ACPI_6_3_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
2141#define EFI_ACPI_6_3_ERST_STATUS_FAILED 0x03\r
2142#define EFI_ACPI_6_3_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
2143#define EFI_ACPI_6_3_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
2144\r
2145///\r
2146/// ERST Serialization Instructions\r
2147///\r
2148#define EFI_ACPI_6_3_ERST_READ_REGISTER 0x00\r
2149#define EFI_ACPI_6_3_ERST_READ_REGISTER_VALUE 0x01\r
2150#define EFI_ACPI_6_3_ERST_WRITE_REGISTER 0x02\r
2151#define EFI_ACPI_6_3_ERST_WRITE_REGISTER_VALUE 0x03\r
2152#define EFI_ACPI_6_3_ERST_NOOP 0x04\r
2153#define EFI_ACPI_6_3_ERST_LOAD_VAR1 0x05\r
2154#define EFI_ACPI_6_3_ERST_LOAD_VAR2 0x06\r
2155#define EFI_ACPI_6_3_ERST_STORE_VAR1 0x07\r
2156#define EFI_ACPI_6_3_ERST_ADD 0x08\r
2157#define EFI_ACPI_6_3_ERST_SUBTRACT 0x09\r
2158#define EFI_ACPI_6_3_ERST_ADD_VALUE 0x0A\r
2159#define EFI_ACPI_6_3_ERST_SUBTRACT_VALUE 0x0B\r
2160#define EFI_ACPI_6_3_ERST_STALL 0x0C\r
2161#define EFI_ACPI_6_3_ERST_STALL_WHILE_TRUE 0x0D\r
2162#define EFI_ACPI_6_3_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
2163#define EFI_ACPI_6_3_ERST_GOTO 0x0F\r
2164#define EFI_ACPI_6_3_ERST_SET_SRC_ADDRESS_BASE 0x10\r
2165#define EFI_ACPI_6_3_ERST_SET_DST_ADDRESS_BASE 0x11\r
2166#define EFI_ACPI_6_3_ERST_MOVE_DATA 0x12\r
2167\r
2168///\r
2169/// ERST Instruction Flags\r
2170///\r
2171#define EFI_ACPI_6_3_ERST_PRESERVE_REGISTER 0x01\r
2172\r
2173///\r
2174/// ERST Serialization Instruction Entry\r
2175///\r
2176typedef struct {\r
2177 UINT8 SerializationAction;\r
2178 UINT8 Instruction;\r
2179 UINT8 Flags;\r
2180 UINT8 Reserved0;\r
2181 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2182 UINT64 Value;\r
2183 UINT64 Mask;\r
2184} EFI_ACPI_6_3_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
2185\r
2186///\r
2187/// EINJ - Error Injection Table\r
2188///\r
2189typedef struct {\r
2190 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2191 UINT32 InjectionHeaderSize;\r
2192 UINT8 InjectionFlags;\r
2193 UINT8 Reserved0[3];\r
2194 UINT32 InjectionEntryCount;\r
2195} EFI_ACPI_6_3_ERROR_INJECTION_TABLE_HEADER;\r
2196\r
2197///\r
2198/// EINJ Version (as defined in ACPI 6.3 spec.)\r
2199///\r
2200#define EFI_ACPI_6_3_ERROR_INJECTION_TABLE_REVISION 0x01\r
2201\r
2202///\r
2203/// EINJ Error Injection Actions\r
2204///\r
2205#define EFI_ACPI_6_3_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
2206#define EFI_ACPI_6_3_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
2207#define EFI_ACPI_6_3_EINJ_SET_ERROR_TYPE 0x02\r
2208#define EFI_ACPI_6_3_EINJ_GET_ERROR_TYPE 0x03\r
2209#define EFI_ACPI_6_3_EINJ_END_OPERATION 0x04\r
2210#define EFI_ACPI_6_3_EINJ_EXECUTE_OPERATION 0x05\r
2211#define EFI_ACPI_6_3_EINJ_CHECK_BUSY_STATUS 0x06\r
2212#define EFI_ACPI_6_3_EINJ_GET_COMMAND_STATUS 0x07\r
2213#define EFI_ACPI_6_3_EINJ_TRIGGER_ERROR 0xFF\r
2214\r
2215///\r
2216/// EINJ Action Command Status\r
2217///\r
2218#define EFI_ACPI_6_3_EINJ_STATUS_SUCCESS 0x00\r
2219#define EFI_ACPI_6_3_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
2220#define EFI_ACPI_6_3_EINJ_STATUS_INVALID_ACCESS 0x02\r
2221\r
2222///\r
2223/// EINJ Error Type Definition\r
2224///\r
2225#define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
2226#define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
2227#define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
2228#define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
2229#define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
2230#define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
2231#define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
2232#define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
2233#define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
2234#define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
2235#define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
2236#define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
2237\r
2238///\r
2239/// EINJ Injection Instructions\r
2240///\r
2241#define EFI_ACPI_6_3_EINJ_READ_REGISTER 0x00\r
2242#define EFI_ACPI_6_3_EINJ_READ_REGISTER_VALUE 0x01\r
2243#define EFI_ACPI_6_3_EINJ_WRITE_REGISTER 0x02\r
2244#define EFI_ACPI_6_3_EINJ_WRITE_REGISTER_VALUE 0x03\r
2245#define EFI_ACPI_6_3_EINJ_NOOP 0x04\r
2246\r
2247///\r
2248/// EINJ Instruction Flags\r
2249///\r
2250#define EFI_ACPI_6_3_EINJ_PRESERVE_REGISTER 0x01\r
2251\r
2252///\r
2253/// EINJ Injection Instruction Entry\r
2254///\r
2255typedef struct {\r
2256 UINT8 InjectionAction;\r
2257 UINT8 Instruction;\r
2258 UINT8 Flags;\r
2259 UINT8 Reserved0;\r
2260 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2261 UINT64 Value;\r
2262 UINT64 Mask;\r
2263} EFI_ACPI_6_3_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
2264\r
2265///\r
2266/// EINJ Trigger Action Table\r
2267///\r
2268typedef struct {\r
2269 UINT32 HeaderSize;\r
2270 UINT32 Revision;\r
2271 UINT32 TableSize;\r
2272 UINT32 EntryCount;\r
2273} EFI_ACPI_6_3_EINJ_TRIGGER_ACTION_TABLE;\r
2274\r
2275///\r
2276/// Platform Communications Channel Table (PCCT)\r
2277///\r
2278typedef struct {\r
2279 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2280 UINT32 Flags;\r
2281 UINT64 Reserved;\r
2282} EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
2283\r
2284///\r
2285/// PCCT Version (as defined in ACPI 6.3 spec.)\r
2286///\r
2287#define EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02\r
2288\r
2289///\r
2290/// PCCT Global Flags\r
2291///\r
2292#define EFI_ACPI_6_3_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0\r
2293\r
2294//\r
2295// PCCT Subspace type\r
2296//\r
2297#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2298#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01\r
2299#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02\r
2300#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03\r
2301#define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04\r
2302\r
2303///\r
2304/// PCC Subspace Structure Header\r
2305///\r
2306typedef struct {\r
2307 UINT8 Type;\r
2308 UINT8 Length;\r
2309} EFI_ACPI_6_3_PCCT_SUBSPACE_HEADER;\r
2310\r
2311///\r
2312/// Generic Communications Subspace Structure\r
2313///\r
2314typedef struct {\r
2315 UINT8 Type;\r
2316 UINT8 Length;\r
2317 UINT8 Reserved[6];\r
2318 UINT64 BaseAddress;\r
2319 UINT64 AddressLength;\r
2320 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2321 UINT64 DoorbellPreserve;\r
2322 UINT64 DoorbellWrite;\r
2323 UINT32 NominalLatency;\r
2324 UINT32 MaximumPeriodicAccessRate;\r
2325 UINT16 MinimumRequestTurnaroundTime;\r
2326} EFI_ACPI_6_3_PCCT_SUBSPACE_GENERIC;\r
2327\r
2328///\r
2329/// Generic Communications Channel Shared Memory Region\r
2330///\r
2331\r
2332typedef struct {\r
2333 UINT8 Command;\r
2334 UINT8 Reserved:7;\r
2335 UINT8 NotifyOnCompletion:1;\r
2336} EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2337\r
2338typedef struct {\r
2339 UINT8 CommandComplete:1;\r
2340 UINT8 PlatformInterrupt:1;\r
2341 UINT8 Error:1;\r
2342 UINT8 PlatformNotification:1;\r
2343 UINT8 Reserved:4;\r
2344 UINT8 Reserved1;\r
2345} EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2346\r
2347typedef struct {\r
2348 UINT32 Signature;\r
2349 EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2350 EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2351} EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2352\r
2353#define EFI_ACPI_6_3_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0\r
2354#define EFI_ACPI_6_3_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1\r
2355\r
2356///\r
2357/// Type 1 HW-Reduced Communications Subspace Structure\r
2358///\r
2359typedef struct {\r
2360 UINT8 Type;\r
2361 UINT8 Length;\r
2362 UINT32 PlatformInterrupt;\r
2363 UINT8 PlatformInterruptFlags;\r
2364 UINT8 Reserved;\r
2365 UINT64 BaseAddress;\r
2366 UINT64 AddressLength;\r
2367 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2368 UINT64 DoorbellPreserve;\r
2369 UINT64 DoorbellWrite;\r
2370 UINT32 NominalLatency;\r
2371 UINT32 MaximumPeriodicAccessRate;\r
2372 UINT16 MinimumRequestTurnaroundTime;\r
2373} EFI_ACPI_6_3_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;\r
2374\r
2375///\r
2376/// Type 2 HW-Reduced Communications Subspace Structure\r
2377///\r
2378typedef struct {\r
2379 UINT8 Type;\r
2380 UINT8 Length;\r
2381 UINT32 PlatformInterrupt;\r
2382 UINT8 PlatformInterruptFlags;\r
2383 UINT8 Reserved;\r
2384 UINT64 BaseAddress;\r
2385 UINT64 AddressLength;\r
2386 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2387 UINT64 DoorbellPreserve;\r
2388 UINT64 DoorbellWrite;\r
2389 UINT32 NominalLatency;\r
2390 UINT32 MaximumPeriodicAccessRate;\r
2391 UINT16 MinimumRequestTurnaroundTime;\r
2392 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2393 UINT64 PlatformInterruptAckPreserve;\r
2394 UINT64 PlatformInterruptAckWrite;\r
2395} EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;\r
2396\r
2397///\r
2398/// Type 3 Extended PCC Subspace Structure\r
2399///\r
2400typedef struct {\r
2401 UINT8 Type;\r
2402 UINT8 Length;\r
2403 UINT32 PlatformInterrupt;\r
2404 UINT8 PlatformInterruptFlags;\r
2405 UINT8 Reserved;\r
2406 UINT64 BaseAddress;\r
2407 UINT32 AddressLength;\r
2408 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2409 UINT64 DoorbellPreserve;\r
2410 UINT64 DoorbellWrite;\r
2411 UINT32 NominalLatency;\r
2412 UINT32 MaximumPeriodicAccessRate;\r
2413 UINT32 MinimumRequestTurnaroundTime;\r
2414 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2415 UINT64 PlatformInterruptAckPreserve;\r
2416 UINT64 PlatformInterruptAckSet;\r
2417 UINT8 Reserved1[8];\r
2418 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2419 UINT64 CommandCompleteCheckMask;\r
2420 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;\r
2421 UINT64 CommandCompleteUpdatePreserve;\r
2422 UINT64 CommandCompleteUpdateSet;\r
2423 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2424 UINT64 ErrorStatusMask;\r
2425} EFI_ACPI_6_3_PCCT_SUBSPACE_3_EXTENDED_PCC;\r
2426\r
2427///\r
2428/// Type 4 Extended PCC Subspace Structure\r
2429///\r
2430typedef EFI_ACPI_6_3_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_3_PCCT_SUBSPACE_4_EXTENDED_PCC;\r
2431\r
2432#define EFI_ACPI_6_3_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0\r
2433\r
2434typedef struct {\r
2435 UINT32 Signature;\r
2436 UINT32 Flags;\r
2437 UINT32 Length;\r
2438 UINT32 Command;\r
2439} EFI_ACPI_6_3_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;\r
2440\r
2441///\r
2442/// Platform Debug Trigger Table (PDTT)\r
2443///\r
2444typedef struct {\r
2445 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2446 UINT8 TriggerCount;\r
2447 UINT8 Reserved[3];\r
2448 UINT32 TriggerIdentifierArrayOffset;\r
2449} EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;\r
2450\r
2451///\r
2452/// PDTT Revision (as defined in ACPI 6.3 spec.)\r
2453///\r
2454#define EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00\r
2455\r
2456///\r
2457/// PDTT Platform Communication Channel Identifier Structure\r
2458///\r
2459typedef struct {\r
2460 UINT16 SubChannelIdentifer:8;\r
2461 UINT16 Runtime:1;\r
2462 UINT16 WaitForCompletion:1;\r
2463 UINT16 TriggerOrder:1;\r
2464 UINT16 Reserved:5;\r
2465} EFI_ACPI_6_3_PDTT_PCC_IDENTIFIER;\r
2466\r
2467///\r
2468/// PCC Commands Codes used by Platform Debug Trigger Table\r
2469///\r
2470#define EFI_ACPI_6_3_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00\r
2471#define EFI_ACPI_6_3_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01\r
2472\r
2473///\r
2474/// PPTT Platform Communication Channel\r
2475///\r
2476typedef EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_3_PDTT_PCC;\r
2477\r
2478///\r
2479/// Processor Properties Topology Table (PPTT)\r
2480///\r
2481typedef struct {\r
2482 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2483} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;\r
2484\r
2485///\r
2486/// PPTT Revision (as defined in ACPI 6.3 spec.)\r
2487///\r
2488#define EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x02\r
2489\r
2490///\r
2491/// PPTT types\r
2492///\r
2493#define EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR 0x00\r
2494#define EFI_ACPI_6_3_PPTT_TYPE_CACHE 0x01\r
2495#define EFI_ACPI_6_3_PPTT_TYPE_ID 0x02\r
2496\r
2497///\r
2498/// PPTT Structure Header\r
2499///\r
2500typedef struct {\r
2501 UINT8 Type;\r
2502 UINT8 Length;\r
2503 UINT8 Reserved[2];\r
2504} EFI_ACPI_6_3_PPTT_STRUCTURE_HEADER;\r
2505\r
2506///\r
2507/// For PPTT struct processor flags\r
2508///\r
2509#define EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL 0x0\r
2510#define EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL 0x1\r
2511#define EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID 0x0\r
2512#define EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID 0x1\r
2513#define EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD 0x0\r
2514#define EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD 0x1\r
2515#define EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF 0x0\r
2516#define EFI_ACPI_6_3_PPTT_NODE_IS_LEAF 0x1\r
2517#define EFI_ACPI_6_3_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0\r
2518#define EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL 0x1\r
2519\r
2520///\r
2521/// Processor hierarchy node structure flags\r
2522///\r
2523typedef struct {\r
2524 UINT32 PhysicalPackage:1;\r
2525 UINT32 AcpiProcessorIdValid:1;\r
2526 UINT32 ProcessorIsAThread:1;\r
2527 UINT32 NodeIsALeaf:1;\r
2528 UINT32 IdenticalImplementation:1;\r
2529 UINT32 Reserved:27;\r
2530} EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS;\r
2531\r
2532///\r
2533/// Processor hierarchy node structure\r
2534///\r
2535typedef struct {\r
2536 UINT8 Type;\r
2537 UINT8 Length;\r
2538 UINT8 Reserved[2];\r
2539 EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;\r
2540 UINT32 Parent;\r
2541 UINT32 AcpiProcessorId;\r
2542 UINT32 NumberOfPrivateResources;\r
2543} EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR;\r
2544\r
2545///\r
2546/// For PPTT struct cache flags\r
2547///\r
2548#define EFI_ACPI_6_3_PPTT_CACHE_SIZE_INVALID 0x0\r
2549#define EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID 0x1\r
2550#define EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_INVALID 0x0\r
2551#define EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID 0x1\r
2552#define EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_INVALID 0x0\r
2553#define EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID 0x1\r
2554#define EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_INVALID 0x0\r
2555#define EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID 0x1\r
2556#define EFI_ACPI_6_3_PPTT_CACHE_TYPE_INVALID 0x0\r
2557#define EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID 0x1\r
2558#define EFI_ACPI_6_3_PPTT_WRITE_POLICY_INVALID 0x0\r
2559#define EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID 0x1\r
2560#define EFI_ACPI_6_3_PPTT_LINE_SIZE_INVALID 0x0\r
2561#define EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID 0x1\r
2562\r
2563///\r
2564/// Cache Type Structure flags\r
2565///\r
2566typedef struct {\r
2567 UINT32 SizePropertyValid:1;\r
2568 UINT32 NumberOfSetsValid:1;\r
2569 UINT32 AssociativityValid:1;\r
2570 UINT32 AllocationTypeValid:1;\r
2571 UINT32 CacheTypeValid:1;\r
2572 UINT32 WritePolicyValid:1;\r
2573 UINT32 LineSizeValid:1;\r
2574 UINT32 Reserved:25;\r
2575} EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_FLAGS;\r
2576\r
2577///\r
2578/// For cache attributes\r
2579///\r
2580#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0\r
2581#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1\r
2582#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2\r
2583#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0\r
2584#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1\r
2585#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2\r
2586#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0\r
2587#define EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1\r
2588\r
2589///\r
2590/// Cache Type Structure cache attributes\r
2591///\r
2592typedef struct {\r
2593 UINT8 AllocationType:2;\r
2594 UINT8 CacheType:2;\r
2595 UINT8 WritePolicy:1;\r
2596 UINT8 Reserved:3;\r
2597} EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_ATTRIBUTES;\r
2598\r
2599///\r
2600/// Cache Type Structure\r
2601///\r
2602typedef struct {\r
2603 UINT8 Type;\r
2604 UINT8 Length;\r
2605 UINT8 Reserved[2];\r
2606 EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_FLAGS Flags;\r
2607 UINT32 NextLevelOfCache;\r
2608 UINT32 Size;\r
2609 UINT32 NumberOfSets;\r
2610 UINT8 Associativity;\r
2611 EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;\r
2612 UINT16 LineSize;\r
2613} EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE;\r
2614\r
2615///\r
2616/// ID structure\r
2617///\r
2618typedef struct {\r
2619 UINT8 Type;\r
2620 UINT8 Length;\r
2621 UINT8 Reserved[2];\r
2622 UINT32 VendorId;\r
2623 UINT64 Level1Id;\r
2624 UINT64 Level2Id;\r
2625 UINT16 MajorRev;\r
2626 UINT16 MinorRev;\r
2627 UINT16 SpinRev;\r
2628} EFI_ACPI_6_3_PPTT_STRUCTURE_ID;\r
2629\r
2630//\r
2631// Known table signatures\r
2632//\r
2633\r
2634///\r
2635/// "RSD PTR " Root System Description Pointer\r
2636///\r
2637#define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
2638\r
2639///\r
2640/// "APIC" Multiple APIC Description Table\r
2641///\r
2642#define EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2643\r
2644///\r
2645/// "BERT" Boot Error Record Table\r
2646///\r
2647#define EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2648\r
2649///\r
2650/// "BGRT" Boot Graphics Resource Table\r
2651///\r
2652#define EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2653\r
2654///\r
2655/// "CDIT" Component Distance Information Table\r
2656///\r
2657#define EFI_ACPI_6_3_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T')\r
2658\r
2659///\r
2660/// "CPEP" Corrected Platform Error Polling Table\r
2661///\r
2662#define EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2663\r
2664///\r
2665/// "CRAT" Component Resource Attribute Table\r
2666///\r
2667#define EFI_ACPI_6_3_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T')\r
2668\r
2669///\r
2670/// "DSDT" Differentiated System Description Table\r
2671///\r
2672#define EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2673\r
2674///\r
2675/// "ECDT" Embedded Controller Boot Resources Table\r
2676///\r
2677#define EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2678\r
2679///\r
2680/// "EINJ" Error Injection Table\r
2681///\r
2682#define EFI_ACPI_6_3_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2683\r
2684///\r
2685/// "ERST" Error Record Serialization Table\r
2686///\r
2687#define EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2688\r
2689///\r
2690/// "FACP" Fixed ACPI Description Table\r
2691///\r
2692#define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2693\r
2694///\r
2695/// "FACS" Firmware ACPI Control Structure\r
2696///\r
2697#define EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
2698\r
2699///\r
2700/// "FPDT" Firmware Performance Data Table\r
2701///\r
2702#define EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
2703\r
2704///\r
2705/// "GTDT" Generic Timer Description Table\r
2706///\r
2707#define EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
2708\r
2709///\r
2710/// "HEST" Hardware Error Source Table\r
2711///\r
2712#define EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
2713\r
2714///\r
2715/// "HMAT" Heterogeneous Memory Attribute Table\r
2716///\r
2717#define EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')\r
2718\r
2719///\r
2720/// "MPST" Memory Power State Table\r
2721///\r
2722#define EFI_ACPI_6_3_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
2723\r
2724///\r
2725/// "MSCT" Maximum System Characteristics Table\r
2726///\r
2727#define EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
2728\r
2729///\r
2730/// "NFIT" NVDIMM Firmware Interface Table\r
2731///\r
2732#define EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
2733\r
2734///\r
2735/// "PDTT" Platform Debug Trigger Table\r
2736///\r
2737#define EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')\r
2738\r
2739///\r
2740/// "PMTT" Platform Memory Topology Table\r
2741///\r
2742#define EFI_ACPI_6_3_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
2743\r
2744///\r
2745/// "PPTT" Processor Properties Topology Table\r
2746///\r
2747#define EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')\r
2748\r
2749///\r
2750/// "PSDT" Persistent System Description Table\r
2751///\r
2752#define EFI_ACPI_6_3_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
2753\r
2754///\r
2755/// "RASF" ACPI RAS Feature Table\r
2756///\r
2757#define EFI_ACPI_6_3_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
2758\r
2759///\r
2760/// "RSDT" Root System Description Table\r
2761///\r
2762#define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
2763\r
2764///\r
2765/// "SBST" Smart Battery Specification Table\r
2766///\r
2767#define EFI_ACPI_6_3_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
2768\r
2769///\r
2770/// "SDEV" Secure DEVices Table\r
2771///\r
2772#define EFI_ACPI_6_3_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')\r
2773\r
2774///\r
2775/// "SLIT" System Locality Information Table\r
2776///\r
2777#define EFI_ACPI_6_3_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2778\r
2779///\r
2780/// "SRAT" System Resource Affinity Table\r
2781///\r
2782#define EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2783\r
2784///\r
2785/// "SSDT" Secondary System Description Table\r
2786///\r
2787#define EFI_ACPI_6_3_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2788\r
2789///\r
2790/// "XSDT" Extended System Description Table\r
2791///\r
2792#define EFI_ACPI_6_3_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2793\r
2794///\r
2795/// "BOOT" MS Simple Boot Spec\r
2796///\r
2797#define EFI_ACPI_6_3_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2798\r
2799///\r
2800/// "CSRT" MS Core System Resource Table\r
2801///\r
2802#define EFI_ACPI_6_3_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2803\r
2804///\r
2805/// "DBG2" MS Debug Port 2 Spec\r
2806///\r
2807#define EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2808\r
2809///\r
2810/// "DBGP" MS Debug Port Spec\r
2811///\r
2812#define EFI_ACPI_6_3_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2813\r
2814///\r
2815/// "DMAR" DMA Remapping Table\r
2816///\r
2817#define EFI_ACPI_6_3_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2818\r
2819///\r
2820/// "DPPT" DMA Protection Policy Table\r
2821///\r
2822#define EFI_ACPI_6_3_DMA_PROTECTION_POLICY_TABLE_SIGNATURE SIGNATURE_32('D', 'P', 'P', 'T')\r
2823\r
2824///\r
2825/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2826///\r
2827#define EFI_ACPI_6_3_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2828\r
2829///\r
2830/// "ETDT" Event Timer Description Table\r
2831///\r
2832#define EFI_ACPI_6_3_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2833\r
2834///\r
2835/// "HPET" IA-PC High Precision Event Timer Table\r
2836///\r
2837#define EFI_ACPI_6_3_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2838\r
2839///\r
2840/// "iBFT" iSCSI Boot Firmware Table\r
2841///\r
2842#define EFI_ACPI_6_3_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2843\r
2844///\r
2845/// "IORT" I/O Remapping Table\r
2846///\r
2847#define EFI_ACPI_6_3_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
2848\r
2849///\r
2850/// "IVRS" I/O Virtualization Reporting Structure\r
2851///\r
2852#define EFI_ACPI_6_3_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2853\r
2854///\r
2855/// "LPIT" Low Power Idle Table\r
2856///\r
2857#define EFI_ACPI_6_3_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2858\r
2859///\r
2860/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2861///\r
2862#define EFI_ACPI_6_3_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2863\r
2864///\r
2865/// "MCHI" Management Controller Host Interface Table\r
2866///\r
2867#define EFI_ACPI_6_3_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2868\r
2869///\r
2870/// "MSDM" MS Data Management Table\r
2871///\r
2872#define EFI_ACPI_6_3_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2873\r
2874///\r
2875/// "SDEI" Software Delegated Exceptions Interface Table\r
2876///\r
2877#define EFI_ACPI_6_3_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')\r
2878\r
2879///\r
2880/// "SLIC" MS Software Licensing Table Specification\r
2881///\r
2882#define EFI_ACPI_6_3_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2883\r
2884///\r
2885/// "SPCR" Serial Port Concole Redirection Table\r
2886///\r
2887#define EFI_ACPI_6_3_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2888\r
2889///\r
2890/// "SPMI" Server Platform Management Interface Table\r
2891///\r
2892#define EFI_ACPI_6_3_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2893\r
2894///\r
2895/// "STAO" _STA Override Table\r
2896///\r
2897#define EFI_ACPI_6_3_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
2898\r
2899///\r
2900/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2901///\r
2902#define EFI_ACPI_6_3_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2903\r
2904///\r
2905/// "TPM2" Trusted Computing Platform 1 Table\r
2906///\r
2907#define EFI_ACPI_6_3_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2908\r
2909///\r
2910/// "UEFI" UEFI ACPI Data Table\r
2911///\r
2912#define EFI_ACPI_6_3_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2913\r
2914///\r
2915/// "WAET" Windows ACPI Emulated Devices Table\r
2916///\r
2917#define EFI_ACPI_6_3_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2918\r
2919///\r
2920/// "WDAT" Watchdog Action Table\r
2921///\r
2922#define EFI_ACPI_6_3_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2923\r
2924///\r
2925/// "WDRT" Watchdog Resource Table\r
2926///\r
2927#define EFI_ACPI_6_3_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2928\r
2929///\r
2930/// "WPBT" MS Platform Binary Table\r
2931///\r
2932#define EFI_ACPI_6_3_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2933\r
2934///\r
2935/// "WSMT" Windows SMM Security Mitigation Table\r
2936///\r
2937#define EFI_ACPI_6_3_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')\r
2938\r
2939///\r
2940/// "XENV" Xen Project Table\r
2941///\r
2942#define EFI_ACPI_6_3_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
2943\r
2944#pragma pack()\r
2945\r
2946#endif\r
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