]> git.proxmox.com Git - mirror_edk2.git/blame - MdePkg/Include/IndustryStandard/Acpi65.h
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
MdePkg: Add ACPI 6.5 header
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi65.h
CommitLineData
c5ef1f01
CL		 1/** @file\r
2 ACPI 6.5 definitions from the ACPI Specification Revision 6.5 Aug, 2022.\r
3\r
4 Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>\r
5 Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>\r
6 Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
7\r
8 SPDX-License-Identifier: BSD-2-Clause-Patent\r
9**/\r
10\r
11#ifndef ACPI_6_5_H_\r
12#define ACPI_6_5_H_\r
13\r
14#include <IndustryStandard/Acpi64.h>\r
15\r
16//\r
17// Ensure proper structure formats\r
18//\r
19#pragma pack(1)\r
20\r
21///\r
22/// ACPI 6.5 Generic Address Space definition\r
23///\r
24typedef struct {\r
25 UINT8 AddressSpaceId;\r
26 UINT8 RegisterBitWidth;\r
27 UINT8 RegisterBitOffset;\r
28 UINT8 AccessSize;\r
29 UINT64 Address;\r
30} EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE;\r
31\r
32//\r
33// Generic Address Space Address IDs\r
34//\r
35#define EFI_ACPI_6_5_SYSTEM_MEMORY 0x00\r
36#define EFI_ACPI_6_5_SYSTEM_IO 0x01\r
37#define EFI_ACPI_6_5_PCI_CONFIGURATION_SPACE 0x02\r
38#define EFI_ACPI_6_5_EMBEDDED_CONTROLLER 0x03\r
39#define EFI_ACPI_6_5_SMBUS 0x04\r
40#define EFI_ACPI_6_5_SYSTEM_CMOS 0x05\r
41#define EFI_ACPI_6_5_PCI_BAR_TARGET 0x06\r
42#define EFI_ACPI_6_5_IPMI 0x07\r
43#define EFI_ACPI_6_5_GENERAL_PURPOSE_IO 0x08\r
44#define EFI_ACPI_6_5_GENERIC_SERIAL_BUS 0x09\r
45#define EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
46#define EFI_ACPI_6_5_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
47\r
48//\r
49// Generic Address Space Access Sizes\r
50//\r
51#define EFI_ACPI_6_5_UNDEFINED 0\r
52#define EFI_ACPI_6_5_BYTE 1\r
53#define EFI_ACPI_6_5_WORD 2\r
54#define EFI_ACPI_6_5_DWORD 3\r
55#define EFI_ACPI_6_5_QWORD 4\r
56\r
57//\r
58// ACPI 6.5 table structures\r
59//\r
60\r
61///\r
62/// Root System Description Pointer Structure\r
63///\r
64typedef struct {\r
65 UINT64 Signature;\r
66 UINT8 Checksum;\r
67 UINT8 OemId[6];\r
68 UINT8 Revision;\r
69 UINT32 RsdtAddress;\r
70 UINT32 Length;\r
71 UINT64 XsdtAddress;\r
72 UINT8 ExtendedChecksum;\r
73 UINT8 Reserved[3];\r
74} EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
75\r
76///\r
77/// RSD_PTR Revision (as defined in ACPI 6.5 spec.)\r
78///\r
79#define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.5) says current value is 2\r
80\r
81///\r
82/// Common table header, this prefaces all ACPI tables, including FACS, but\r
83/// excluding the RSD PTR structure\r
84///\r
85typedef struct {\r
86 UINT32 Signature;\r
87 UINT32 Length;\r
88} EFI_ACPI_6_5_COMMON_HEADER;\r
89\r
90//\r
91// Root System Description Table\r
92// No definition needed as it is a common description table header, the same with\r
93// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
94//\r
95\r
96///\r
97/// RSDT Revision (as defined in ACPI 6.5 spec.)\r
98///\r
99#define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
100\r
101//\r
102// Extended System Description Table\r
103// No definition needed as it is a common description table header, the same with\r
104// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
105//\r
106\r
107///\r
108/// XSDT Revision (as defined in ACPI 6.5 spec.)\r
109///\r
110#define EFI_ACPI_6_5_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
111\r
112///\r
113/// Fixed ACPI Description Table Structure (FADT)\r
114///\r
115typedef struct {\r
116 EFI_ACPI_DESCRIPTION_HEADER Header;\r
117 UINT32 FirmwareCtrl;\r
118 UINT32 Dsdt;\r
119 UINT8 Reserved0;\r
120 UINT8 PreferredPmProfile;\r
121 UINT16 SciInt;\r
122 UINT32 SmiCmd;\r
123 UINT8 AcpiEnable;\r
124 UINT8 AcpiDisable;\r
125 UINT8 S4BiosReq;\r
126 UINT8 PstateCnt;\r
127 UINT32 Pm1aEvtBlk;\r
128 UINT32 Pm1bEvtBlk;\r
129 UINT32 Pm1aCntBlk;\r
130 UINT32 Pm1bCntBlk;\r
131 UINT32 Pm2CntBlk;\r
132 UINT32 PmTmrBlk;\r
133 UINT32 Gpe0Blk;\r
134 UINT32 Gpe1Blk;\r
135 UINT8 Pm1EvtLen;\r
136 UINT8 Pm1CntLen;\r
137 UINT8 Pm2CntLen;\r
138 UINT8 PmTmrLen;\r
139 UINT8 Gpe0BlkLen;\r
140 UINT8 Gpe1BlkLen;\r
141 UINT8 Gpe1Base;\r
142 UINT8 CstCnt;\r
143 UINT16 PLvl2Lat;\r
144 UINT16 PLvl3Lat;\r
145 UINT16 FlushSize;\r
146 UINT16 FlushStride;\r
147 UINT8 DutyOffset;\r
148 UINT8 DutyWidth;\r
149 UINT8 DayAlrm;\r
150 UINT8 MonAlrm;\r
151 UINT8 Century;\r
152 UINT16 IaPcBootArch;\r
153 UINT8 Reserved1;\r
154 UINT32 Flags;\r
155 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
156 UINT8 ResetValue;\r
157 UINT16 ArmBootArch;\r
158 UINT8 MinorVersion;\r
159 UINT64 XFirmwareCtrl;\r
160 UINT64 XDsdt;\r
161 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
162 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
163 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
164 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
165 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
166 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
167 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
168 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
169 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
170 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
171 UINT64 HypervisorVendorIdentity;\r
172} EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE;\r
173\r
174///\r
175/// FADT Version (as defined in ACPI 6.5 spec.)\r
176///\r
177#define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
178#define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x05\r
179\r
180//\r
181// Fixed ACPI Description Table Preferred Power Management Profile\r
182//\r
183#define EFI_ACPI_6_5_PM_PROFILE_UNSPECIFIED 0\r
184#define EFI_ACPI_6_5_PM_PROFILE_DESKTOP 1\r
185#define EFI_ACPI_6_5_PM_PROFILE_MOBILE 2\r
186#define EFI_ACPI_6_5_PM_PROFILE_WORKSTATION 3\r
187#define EFI_ACPI_6_5_PM_PROFILE_ENTERPRISE_SERVER 4\r
188#define EFI_ACPI_6_5_PM_PROFILE_SOHO_SERVER 5\r
189#define EFI_ACPI_6_5_PM_PROFILE_APPLIANCE_PC 6\r
190#define EFI_ACPI_6_5_PM_PROFILE_PERFORMANCE_SERVER 7\r
191#define EFI_ACPI_6_5_PM_PROFILE_TABLET 8\r
192\r
193//\r
194// Fixed ACPI Description Table Boot Architecture Flags\r
195// All other bits are reserved and must be set to 0.\r
196//\r
197#define EFI_ACPI_6_5_LEGACY_DEVICES BIT0\r
198#define EFI_ACPI_6_5_8042 BIT1\r
199#define EFI_ACPI_6_5_VGA_NOT_PRESENT BIT2\r
200#define EFI_ACPI_6_5_MSI_NOT_SUPPORTED BIT3\r
201#define EFI_ACPI_6_5_PCIE_ASPM_CONTROLS BIT4\r
202#define EFI_ACPI_6_5_CMOS_RTC_NOT_PRESENT BIT5\r
203\r
204//\r
205// Fixed ACPI Description Table Arm Boot Architecture Flags\r
206// All other bits are reserved and must be set to 0.\r
207//\r
208#define EFI_ACPI_6_5_ARM_PSCI_COMPLIANT BIT0\r
209#define EFI_ACPI_6_5_ARM_PSCI_USE_HVC BIT1\r
210\r
211//\r
212// Fixed ACPI Description Table Fixed Feature Flags\r
213// All other bits are reserved and must be set to 0.\r
214//\r
215#define EFI_ACPI_6_5_WBINVD BIT0\r
216#define EFI_ACPI_6_5_WBINVD_FLUSH BIT1\r
217#define EFI_ACPI_6_5_PROC_C1 BIT2\r
218#define EFI_ACPI_6_5_P_LVL2_UP BIT3\r
219#define EFI_ACPI_6_5_PWR_BUTTON BIT4\r
220#define EFI_ACPI_6_5_SLP_BUTTON BIT5\r
221#define EFI_ACPI_6_5_FIX_RTC BIT6\r
222#define EFI_ACPI_6_5_RTC_S4 BIT7\r
223#define EFI_ACPI_6_5_TMR_VAL_EXT BIT8\r
224#define EFI_ACPI_6_5_DCK_CAP BIT9\r
225#define EFI_ACPI_6_5_RESET_REG_SUP BIT10\r
226#define EFI_ACPI_6_5_SEALED_CASE BIT11\r
227#define EFI_ACPI_6_5_HEADLESS BIT12\r
228#define EFI_ACPI_6_5_CPU_SW_SLP BIT13\r
229#define EFI_ACPI_6_5_PCI_EXP_WAK BIT14\r
230#define EFI_ACPI_6_5_USE_PLATFORM_CLOCK BIT15\r
231#define EFI_ACPI_6_5_S4_RTC_STS_VALID BIT16\r
232#define EFI_ACPI_6_5_REMOTE_POWER_ON_CAPABLE BIT17\r
233#define EFI_ACPI_6_5_FORCE_APIC_CLUSTER_MODEL BIT18\r
234#define EFI_ACPI_6_5_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
235#define EFI_ACPI_6_5_HW_REDUCED_ACPI BIT20\r
236#define EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
237\r
238///\r
239/// Firmware ACPI Control Structure\r
240///\r
241typedef struct {\r
242 UINT32 Signature;\r
243 UINT32 Length;\r
244 UINT32 HardwareSignature;\r
245 UINT32 FirmwareWakingVector;\r
246 UINT32 GlobalLock;\r
247 UINT32 Flags;\r
248 UINT64 XFirmwareWakingVector;\r
249 UINT8 Version;\r
250 UINT8 Reserved0[3];\r
251 UINT32 OspmFlags;\r
252 UINT8 Reserved1[24];\r
253} EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
254\r
255///\r
256/// FACS Version (as defined in ACPI 6.5 spec.)\r
257///\r
258#define EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
259\r
260///\r
261/// Firmware Control Structure Feature Flags\r
262/// All other bits are reserved and must be set to 0.\r
263///\r
264#define EFI_ACPI_6_5_S4BIOS_F BIT0\r
265#define EFI_ACPI_6_5_64BIT_WAKE_SUPPORTED_F BIT1\r
266\r
267///\r
268/// OSPM Enabled Firmware Control Structure Flags\r
269/// All other bits are reserved and must be set to 0.\r
270///\r
271#define EFI_ACPI_6_5_OSPM_64BIT_WAKE_F BIT0\r
272\r
273//\r
274// Differentiated System Description Table,\r
275// Secondary System Description Table\r
276// and Persistent System Description Table,\r
277// no definition needed as they are common description table header, the same with\r
278// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
279//\r
280#define EFI_ACPI_6_5_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
281#define EFI_ACPI_6_5_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
282\r
283///\r
284/// Multiple APIC Description Table header definition. The rest of the table\r
285/// must be defined in a platform specific manner.\r
286///\r
287typedef struct {\r
288 EFI_ACPI_DESCRIPTION_HEADER Header;\r
289 UINT32 LocalApicAddress;\r
290 UINT32 Flags;\r
291} EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
292\r
293///\r
294/// MADT Revision (as defined in ACPI 6.5 spec.)\r
295///\r
296#define EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05\r
297\r
298///\r
299/// Multiple APIC Flags\r
300/// All other bits are reserved and must be set to 0.\r
301///\r
302#define EFI_ACPI_6_5_PCAT_COMPAT BIT0\r
303\r
304//\r
305// Multiple APIC Description Table APIC structure types\r
306// All other values between 0x10 and 0x7F are reserved and\r
307// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
308//\r
309#define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC 0x00\r
310#define EFI_ACPI_6_5_IO_APIC 0x01\r
311#define EFI_ACPI_6_5_INTERRUPT_SOURCE_OVERRIDE 0x02\r
312#define EFI_ACPI_6_5_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
313#define EFI_ACPI_6_5_LOCAL_APIC_NMI 0x04\r
314#define EFI_ACPI_6_5_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
315#define EFI_ACPI_6_5_IO_SAPIC 0x06\r
316#define EFI_ACPI_6_5_LOCAL_SAPIC 0x07\r
317#define EFI_ACPI_6_5_PLATFORM_INTERRUPT_SOURCES 0x08\r
318#define EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC 0x09\r
319#define EFI_ACPI_6_5_LOCAL_X2APIC_NMI 0x0A\r
320#define EFI_ACPI_6_5_GIC 0x0B\r
321#define EFI_ACPI_6_5_GICD 0x0C\r
322#define EFI_ACPI_6_5_GIC_MSI_FRAME 0x0D\r
323#define EFI_ACPI_6_5_GICR 0x0E\r
324#define EFI_ACPI_6_5_GIC_ITS 0x0F\r
325#define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP 0x10\r
326\r
327//\r
328// APIC Structure Definitions\r
329//\r
330\r
331///\r
332/// Processor Local APIC Structure Definition\r
333///\r
334typedef struct {\r
335 UINT8 Type;\r
336 UINT8 Length;\r
337 UINT8 AcpiProcessorUid;\r
338 UINT8 ApicId;\r
339 UINT32 Flags;\r
340} EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
341\r
342///\r
343/// Local APIC Flags. All other bits are reserved and must be 0.\r
344///\r
345#define EFI_ACPI_6_5_LOCAL_APIC_ENABLED BIT0\r
346#define EFI_ACPI_6_5_LOCAL_APIC_ONLINE_CAPABLE BIT1\r
347\r
348///\r
349/// IO APIC Structure\r
350///\r
351typedef struct {\r
352 UINT8 Type;\r
353 UINT8 Length;\r
354 UINT8 IoApicId;\r
355 UINT8 Reserved;\r
356 UINT32 IoApicAddress;\r
357 UINT32 GlobalSystemInterruptBase;\r
358} EFI_ACPI_6_5_IO_APIC_STRUCTURE;\r
359\r
360///\r
361/// Interrupt Source Override Structure\r
362///\r
363typedef struct {\r
364 UINT8 Type;\r
365 UINT8 Length;\r
366 UINT8 Bus;\r
367 UINT8 Source;\r
368 UINT32 GlobalSystemInterrupt;\r
369 UINT16 Flags;\r
370} EFI_ACPI_6_5_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
371\r
372///\r
373/// Platform Interrupt Sources Structure Definition\r
374///\r
375typedef struct {\r
376 UINT8 Type;\r
377 UINT8 Length;\r
378 UINT16 Flags;\r
379 UINT8 InterruptType;\r
380 UINT8 ProcessorId;\r
381 UINT8 ProcessorEid;\r
382 UINT8 IoSapicVector;\r
383 UINT32 GlobalSystemInterrupt;\r
384 UINT32 PlatformInterruptSourceFlags;\r
385 UINT8 CpeiProcessorOverride;\r
386 UINT8 Reserved[31];\r
387} EFI_ACPI_6_5_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
388\r
389//\r
390// MPS INTI flags.\r
391// All other bits are reserved and must be set to 0.\r
392//\r
393#define EFI_ACPI_6_5_POLARITY (3 << 0)\r
394#define EFI_ACPI_6_5_TRIGGER_MODE (3 << 2)\r
395\r
396///\r
397/// Non-Maskable Interrupt Source Structure\r
398///\r
399typedef struct {\r
400 UINT8 Type;\r
401 UINT8 Length;\r
402 UINT16 Flags;\r
403 UINT32 GlobalSystemInterrupt;\r
404} EFI_ACPI_6_5_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
405\r
406///\r
407/// Local APIC NMI Structure\r
408///\r
409typedef struct {\r
410 UINT8 Type;\r
411 UINT8 Length;\r
412 UINT8 AcpiProcessorUid;\r
413 UINT16 Flags;\r
414 UINT8 LocalApicLint;\r
415} EFI_ACPI_6_5_LOCAL_APIC_NMI_STRUCTURE;\r
416\r
417///\r
418/// Local APIC Address Override Structure\r
419///\r
420typedef struct {\r
421 UINT8 Type;\r
422 UINT8 Length;\r
423 UINT16 Reserved;\r
424 UINT64 LocalApicAddress;\r
425} EFI_ACPI_6_5_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
426\r
427///\r
428/// IO SAPIC Structure\r
429///\r
430typedef struct {\r
431 UINT8 Type;\r
432 UINT8 Length;\r
433 UINT8 IoApicId;\r
434 UINT8 Reserved;\r
435 UINT32 GlobalSystemInterruptBase;\r
436 UINT64 IoSapicAddress;\r
437} EFI_ACPI_6_5_IO_SAPIC_STRUCTURE;\r
438\r
439///\r
440/// Local SAPIC Structure\r
441/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
442///\r
443typedef struct {\r
444 UINT8 Type;\r
445 UINT8 Length;\r
446 UINT8 AcpiProcessorId;\r
447 UINT8 LocalSapicId;\r
448 UINT8 LocalSapicEid;\r
449 UINT8 Reserved[3];\r
450 UINT32 Flags;\r
451 UINT32 ACPIProcessorUIDValue;\r
452} EFI_ACPI_6_5_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
453\r
454///\r
455/// Platform Interrupt Sources Structure\r
456///\r
457typedef struct {\r
458 UINT8 Type;\r
459 UINT8 Length;\r
460 UINT16 Flags;\r
461 UINT8 InterruptType;\r
462 UINT8 ProcessorId;\r
463 UINT8 ProcessorEid;\r
464 UINT8 IoSapicVector;\r
465 UINT32 GlobalSystemInterrupt;\r
466 UINT32 PlatformInterruptSourceFlags;\r
467} EFI_ACPI_6_5_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
468\r
469///\r
470/// Platform Interrupt Source Flags.\r
471/// All other bits are reserved and must be set to 0.\r
472///\r
473#define EFI_ACPI_6_5_CPEI_PROCESSOR_OVERRIDE BIT0\r
474\r
475///\r
476/// Processor Local x2APIC Structure Definition\r
477///\r
478typedef struct {\r
479 UINT8 Type;\r
480 UINT8 Length;\r
481 UINT8 Reserved[2];\r
482 UINT32 X2ApicId;\r
483 UINT32 Flags;\r
484 UINT32 AcpiProcessorUid;\r
485} EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
486\r
487///\r
488/// Local x2APIC NMI Structure\r
489///\r
490typedef struct {\r
491 UINT8 Type;\r
492 UINT8 Length;\r
493 UINT16 Flags;\r
494 UINT32 AcpiProcessorUid;\r
495 UINT8 LocalX2ApicLint;\r
496 UINT8 Reserved[3];\r
497} EFI_ACPI_6_5_LOCAL_X2APIC_NMI_STRUCTURE;\r
498\r
499///\r
500/// GIC Structure\r
501///\r
502typedef struct {\r
503 UINT8 Type;\r
504 UINT8 Length;\r
505 UINT16 Reserved;\r
506 UINT32 CPUInterfaceNumber;\r
507 UINT32 AcpiProcessorUid;\r
508 UINT32 Flags;\r
509 UINT32 ParkingProtocolVersion;\r
510 UINT32 PerformanceInterruptGsiv;\r
511 UINT64 ParkedAddress;\r
512 UINT64 PhysicalBaseAddress;\r
513 UINT64 GICV;\r
514 UINT64 GICH;\r
515 UINT32 VGICMaintenanceInterrupt;\r
516 UINT64 GICRBaseAddress;\r
517 UINT64 MPIDR;\r
518 UINT8 ProcessorPowerEfficiencyClass;\r
519 UINT8 Reserved2;\r
520 UINT16 SpeOverflowInterrupt;\r
521} EFI_ACPI_6_5_GIC_STRUCTURE;\r
522\r
523///\r
524/// GIC Flags. All other bits are reserved and must be 0.\r
525///\r
526#define EFI_ACPI_6_5_GIC_ENABLED BIT0\r
527#define EFI_ACPI_6_5_PERFORMANCE_INTERRUPT_MODEL BIT1\r
528#define EFI_ACPI_6_5_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
529\r
530///\r
531/// GIC Distributor Structure\r
532///\r
533typedef struct {\r
534 UINT8 Type;\r
535 UINT8 Length;\r
536 UINT16 Reserved1;\r
537 UINT32 GicId;\r
538 UINT64 PhysicalBaseAddress;\r
539 UINT32 SystemVectorBase;\r
540 UINT8 GicVersion;\r
541 UINT8 Reserved2[3];\r
542} EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE;\r
543\r
544///\r
545/// GIC Version\r
546///\r
547#define EFI_ACPI_6_5_GIC_V1 0x01\r
548#define EFI_ACPI_6_5_GIC_V2 0x02\r
549#define EFI_ACPI_6_5_GIC_V3 0x03\r
550#define EFI_ACPI_6_5_GIC_V4 0x04\r
551\r
552///\r
553/// GIC MSI Frame Structure\r
554///\r
555typedef struct {\r
556 UINT8 Type;\r
557 UINT8 Length;\r
558 UINT16 Reserved1;\r
559 UINT32 GicMsiFrameId;\r
560 UINT64 PhysicalBaseAddress;\r
561 UINT32 Flags;\r
562 UINT16 SPICount;\r
563 UINT16 SPIBase;\r
564} EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE;\r
565\r
566///\r
567/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
568///\r
569#define EFI_ACPI_6_5_SPI_COUNT_BASE_SELECT BIT0\r
570\r
571///\r
572/// GICR Structure\r
573///\r
574typedef struct {\r
575 UINT8 Type;\r
576 UINT8 Length;\r
577 UINT16 Reserved;\r
578 UINT64 DiscoveryRangeBaseAddress;\r
579 UINT32 DiscoveryRangeLength;\r
580} EFI_ACPI_6_5_GICR_STRUCTURE;\r
581\r
582///\r
583/// GIC Interrupt Translation Service Structure\r
584///\r
585typedef struct {\r
586 UINT8 Type;\r
587 UINT8 Length;\r
588 UINT16 Reserved;\r
589 UINT32 GicItsId;\r
590 UINT64 PhysicalBaseAddress;\r
591 UINT32 Reserved2;\r
592} EFI_ACPI_6_5_GIC_ITS_STRUCTURE;\r
593\r
594///\r
595/// Multiprocessor Wakeup Structure\r
596///\r
597typedef struct {\r
598 UINT8 Type;\r
599 UINT8 Length;\r
600 UINT16 MailBoxVersion;\r
601 UINT32 Reserved;\r
602 UINT64 MailBoxAddress;\r
603} EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_STRUCTURE;\r
604\r
605///\r
606/// Multiprocessor Wakeup Mailbox Structure\r
607///\r
608typedef struct {\r
609 UINT16 Command;\r
610 UINT16 Reserved;\r
611 UINT32 AcpiId;\r
612 UINT64 WakeupVector;\r
613 UINT8 ReservedForOs[2032];\r
614 UINT8 ReservedForFirmware[2048];\r
615} EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_STRUCTURE;\r
616\r
617#define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_NOOP 0x0000\r
618#define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_WAKEUP 0x0001\r
619\r
620///\r
621/// Smart Battery Description Table (SBST)\r
622///\r
623typedef struct {\r
624 EFI_ACPI_DESCRIPTION_HEADER Header;\r
625 UINT32 WarningEnergyLevel;\r
626 UINT32 LowEnergyLevel;\r
627 UINT32 CriticalEnergyLevel;\r
628} EFI_ACPI_6_5_SMART_BATTERY_DESCRIPTION_TABLE;\r
629\r
630///\r
631/// SBST Version (as defined in ACPI 6.5 spec.)\r
632///\r
633#define EFI_ACPI_6_5_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
634\r
635///\r
636/// Embedded Controller Boot Resources Table (ECDT)\r
637/// The table is followed by a null terminated ASCII string that contains\r
638/// a fully qualified reference to the name space object.\r
639///\r
640typedef struct {\r
641 EFI_ACPI_DESCRIPTION_HEADER Header;\r
642 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE EcControl;\r
643 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE EcData;\r
644 UINT32 Uid;\r
645 UINT8 GpeBit;\r
646} EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
647\r
648///\r
649/// ECDT Version (as defined in ACPI 6.5 spec.)\r
650///\r
651#define EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
652\r
653///\r
654/// System Resource Affinity Table (SRAT). The rest of the table\r
655/// must be defined in a platform specific manner.\r
656///\r
657typedef struct {\r
658 EFI_ACPI_DESCRIPTION_HEADER Header;\r
659 UINT32 Reserved1; ///< Must be set to 1\r
660 UINT64 Reserved2;\r
661} EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
662\r
663///\r
664/// SRAT Version (as defined in ACPI 6.5 spec.)\r
665///\r
666#define EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
667\r
668//\r
669// SRAT structure types.\r
670// All other values between 0x06 an 0xFF are reserved and\r
671// will be ignored by OSPM.\r
672//\r
673#define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
674#define EFI_ACPI_6_5_MEMORY_AFFINITY 0x01\r
675#define EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
676#define EFI_ACPI_6_5_GICC_AFFINITY 0x03\r
677#define EFI_ACPI_6_5_GIC_ITS_AFFINITY 0x04\r
678#define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY 0x05\r
679\r
680///\r
681/// Processor Local APIC/SAPIC Affinity Structure Definition\r
682///\r
683typedef struct {\r
684 UINT8 Type;\r
685 UINT8 Length;\r
686 UINT8 ProximityDomain7To0;\r
687 UINT8 ApicId;\r
688 UINT32 Flags;\r
689 UINT8 LocalSapicEid;\r
690 UINT8 ProximityDomain31To8[3];\r
691 UINT32 ClockDomain;\r
692} EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
693\r
694///\r
695/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
696///\r
697#define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
698\r
699///\r
700/// Memory Affinity Structure Definition\r
701///\r
702typedef struct {\r
703 UINT8 Type;\r
704 UINT8 Length;\r
705 UINT32 ProximityDomain;\r
706 UINT16 Reserved1;\r
707 UINT32 AddressBaseLow;\r
708 UINT32 AddressBaseHigh;\r
709 UINT32 LengthLow;\r
710 UINT32 LengthHigh;\r
711 UINT32 Reserved2;\r
712 UINT32 Flags;\r
713 UINT64 Reserved3;\r
714} EFI_ACPI_6_5_MEMORY_AFFINITY_STRUCTURE;\r
715\r
716//\r
717// Memory Flags. All other bits are reserved and must be 0.\r
718//\r
719#define EFI_ACPI_6_5_MEMORY_ENABLED (1 << 0)\r
720#define EFI_ACPI_6_5_MEMORY_HOT_PLUGGABLE (1 << 1)\r
721#define EFI_ACPI_6_5_MEMORY_NONVOLATILE (1 << 2)\r
722\r
723///\r
724/// Processor Local x2APIC Affinity Structure Definition\r
725///\r
726typedef struct {\r
727 UINT8 Type;\r
728 UINT8 Length;\r
729 UINT8 Reserved1[2];\r
730 UINT32 ProximityDomain;\r
731 UINT32 X2ApicId;\r
732 UINT32 Flags;\r
733 UINT32 ClockDomain;\r
734 UINT8 Reserved2[4];\r
735} EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
736\r
737///\r
738/// GICC Affinity Structure Definition\r
739///\r
740typedef struct {\r
741 UINT8 Type;\r
742 UINT8 Length;\r
743 UINT32 ProximityDomain;\r
744 UINT32 AcpiProcessorUid;\r
745 UINT32 Flags;\r
746 UINT32 ClockDomain;\r
747} EFI_ACPI_6_5_GICC_AFFINITY_STRUCTURE;\r
748\r
749///\r
750/// GICC Flags. All other bits are reserved and must be 0.\r
751///\r
752#define EFI_ACPI_6_5_GICC_ENABLED (1 << 0)\r
753\r
754///\r
755/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition\r
756///\r
757typedef struct {\r
758 UINT8 Type;\r
759 UINT8 Length;\r
760 UINT32 ProximityDomain;\r
761 UINT8 Reserved[2];\r
762 UINT32 ItsId;\r
763} EFI_ACPI_6_5_GIC_ITS_AFFINITY_STRUCTURE;\r
764\r
765//\r
766// Generic Initiator Affinity Structure Device Handle Types\r
767// All other values between 0x02 an 0xFF are reserved and\r
768// will be ignored by OSPM.\r
769//\r
770#define EFI_ACPI_6_5_ACPI_DEVICE_HANDLE 0x00\r
771#define EFI_ACPI_6_5_PCI_DEVICE_HANDLE 0x01\r
772\r
773///\r
774/// Device Handle - ACPI\r
775///\r
776typedef struct {\r
777 UINT64 AcpiHid;\r
778 UINT32 AcpiUid;\r
779 UINT8 Reserved[4];\r
780} EFI_ACPI_6_5_DEVICE_HANDLE_ACPI;\r
781\r
782///\r
783/// Device Handle - PCI\r
784///\r
785typedef struct {\r
786 UINT16 PciSegment;\r
787 UINT16 PciBdfNumber;\r
788 UINT8 Reserved[12];\r
789} EFI_ACPI_6_5_DEVICE_HANDLE_PCI;\r
790\r
791///\r
792/// Device Handle\r
793///\r
794typedef union {\r
795 EFI_ACPI_6_5_DEVICE_HANDLE_ACPI Acpi;\r
796 EFI_ACPI_6_5_DEVICE_HANDLE_PCI Pci;\r
797} EFI_ACPI_6_5_DEVICE_HANDLE;\r
798\r
799///\r
800/// Generic Initiator Affinity Structure\r
801///\r
802typedef struct {\r
803 UINT8 Type;\r
804 UINT8 Length;\r
805 UINT8 Reserved1;\r
806 UINT8 DeviceHandleType;\r
807 UINT32 ProximityDomain;\r
808 EFI_ACPI_6_5_DEVICE_HANDLE DeviceHandle;\r
809 UINT32 Flags;\r
810 UINT8 Reserved2[4];\r
811} EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE;\r
812\r
813///\r
814/// Generic Initiator Affinity Structure Flags. All other bits are reserved\r
815/// and must be 0.\r
816///\r
817#define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED BIT0\r
818#define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ARCHITECTURAL_TRANSACTIONS BIT1\r
819\r
820///\r
821/// System Locality Distance Information Table (SLIT).\r
822/// The rest of the table is a matrix.\r
823///\r
824typedef struct {\r
825 EFI_ACPI_DESCRIPTION_HEADER Header;\r
826 UINT64 NumberOfSystemLocalities;\r
827} EFI_ACPI_6_5_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
828\r
829///\r
830/// SLIT Version (as defined in ACPI 6.5 spec.)\r
831///\r
832#define EFI_ACPI_6_5_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
833\r
834///\r
835/// Corrected Platform Error Polling Table (CPEP)\r
836///\r
837typedef struct {\r
838 EFI_ACPI_DESCRIPTION_HEADER Header;\r
839 UINT8 Reserved[8];\r
840} EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
841\r
842///\r
843/// CPEP Version (as defined in ACPI 6.5 spec.)\r
844///\r
845#define EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
846\r
847//\r
848// CPEP processor structure types.\r
849//\r
850#define EFI_ACPI_6_5_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
851\r
852///\r
853/// Corrected Platform Error Polling Processor Structure Definition\r
854///\r
855typedef struct {\r
856 UINT8 Type;\r
857 UINT8 Length;\r
858 UINT8 ProcessorId;\r
859 UINT8 ProcessorEid;\r
860 UINT32 PollingInterval;\r
861} EFI_ACPI_6_5_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
862\r
863///\r
864/// Maximum System Characteristics Table (MSCT)\r
865///\r
866typedef struct {\r
867 EFI_ACPI_DESCRIPTION_HEADER Header;\r
868 UINT32 OffsetProxDomInfo;\r
869 UINT32 MaximumNumberOfProximityDomains;\r
870 UINT32 MaximumNumberOfClockDomains;\r
871 UINT64 MaximumPhysicalAddress;\r
872} EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
873\r
874///\r
875/// MSCT Version (as defined in ACPI 6.5 spec.)\r
876///\r
877#define EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
878\r
879///\r
880/// Maximum Proximity Domain Information Structure Definition\r
881///\r
882typedef struct {\r
883 UINT8 Revision;\r
884 UINT8 Length;\r
885 UINT32 ProximityDomainRangeLow;\r
886 UINT32 ProximityDomainRangeHigh;\r
887 UINT32 MaximumProcessorCapacity;\r
888 UINT64 MaximumMemoryCapacity;\r
889} EFI_ACPI_6_5_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
890\r
891///\r
892/// ACPI RAS Feature Table definition.\r
893///\r
894typedef struct {\r
895 EFI_ACPI_DESCRIPTION_HEADER Header;\r
896 UINT8 PlatformCommunicationChannelIdentifier[12];\r
897} EFI_ACPI_6_5_RAS_FEATURE_TABLE;\r
898\r
899///\r
900/// RASF Version (as defined in ACPI 6.5 spec.)\r
901///\r
902#define EFI_ACPI_6_5_RAS_FEATURE_TABLE_REVISION 0x01\r
903\r
904///\r
905/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
906///\r
907typedef struct {\r
908 UINT32 Signature;\r
909 UINT16 Command;\r
910 UINT16 Status;\r
911 UINT16 Version;\r
912 UINT8 RASCapabilities[16];\r
913 UINT8 SetRASCapabilities[16];\r
914 UINT16 NumberOfRASFParameterBlocks;\r
915 UINT32 SetRASCapabilitiesStatus;\r
916} EFI_ACPI_6_5_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
917\r
918///\r
919/// ACPI RASF PCC command code\r
920///\r
921#define EFI_ACPI_6_5_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
922\r
923///\r
924/// ACPI RASF Platform RAS Capabilities\r
925///\r
926#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0\r
927#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1\r
928#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2\r
929#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3\r
930#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4\r
931\r
932///\r
933/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
934///\r
935typedef struct {\r
936 UINT16 Type;\r
937 UINT16 Version;\r
938 UINT16 Length;\r
939 UINT16 PatrolScrubCommand;\r
940 UINT64 RequestedAddressRange[2];\r
941 UINT64 ActualAddressRange[2];\r
942 UINT16 Flags;\r
943 UINT8 RequestedSpeed;\r
944} EFI_ACPI_6_5_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
945\r
946///\r
947/// ACPI RASF Patrol Scrub command\r
948///\r
949#define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
950#define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
951#define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
952\r
953///\r
954/// Memory Power State Table definition.\r
955///\r
956typedef struct {\r
957 EFI_ACPI_DESCRIPTION_HEADER Header;\r
958 UINT8 PlatformCommunicationChannelIdentifier;\r
959 UINT8 Reserved[3];\r
960 // Memory Power Node Structure\r
961 // Memory Power State Characteristics\r
962} EFI_ACPI_6_5_MEMORY_POWER_STATUS_TABLE;\r
963\r
964///\r
965/// MPST Version (as defined in ACPI 6.5 spec.)\r
966///\r
967#define EFI_ACPI_6_5_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
968\r
969///\r
970/// MPST Platform Communication Channel Shared Memory Region definition.\r
971///\r
972typedef struct {\r
973 UINT32 Signature;\r
974 UINT16 Command;\r
975 UINT16 Status;\r
976 UINT32 MemoryPowerCommandRegister;\r
977 UINT32 MemoryPowerStatusRegister;\r
978 UINT32 PowerStateId;\r
979 UINT32 MemoryPowerNodeId;\r
980 UINT64 MemoryEnergyConsumed;\r
981 UINT64 ExpectedAveragePowerComsuned;\r
982} EFI_ACPI_6_5_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
983\r
984///\r
985/// ACPI MPST PCC command code\r
986///\r
987#define EFI_ACPI_6_5_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
988\r
989///\r
990/// ACPI MPST Memory Power command\r
991///\r
992#define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
993#define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
994#define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
995#define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
996\r
997///\r
998/// MPST Memory Power Node Table\r
999///\r
1000typedef struct {\r
1001 UINT8 PowerStateValue;\r
1002 UINT8 PowerStateInformationIndex;\r
1003} EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE;\r
1004\r
1005typedef struct {\r
1006 UINT8 Flag;\r
1007 UINT8 Reserved;\r
1008 UINT16 MemoryPowerNodeId;\r
1009 UINT32 Length;\r
1010 UINT64 AddressBase;\r
1011 UINT64 AddressLength;\r
1012 UINT32 NumberOfPowerStates;\r
1013 UINT32 NumberOfPhysicalComponents;\r
1014 // EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
1015 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
1016} EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE;\r
1017\r
1018#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
1019#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
1020#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
1021\r
1022typedef struct {\r
1023 UINT16 MemoryPowerNodeCount;\r
1024 UINT8 Reserved[2];\r
1025} EFI_ACPI_6_5_MPST_MEMORY_POWER_NODE_TABLE;\r
1026\r
1027///\r
1028/// MPST Memory Power State Characteristics Table\r
1029///\r
1030typedef struct {\r
1031 UINT8 PowerStateStructureID;\r
1032 UINT8 Flag;\r
1033 UINT16 Reserved;\r
1034 UINT32 AveragePowerConsumedInMPS0;\r
1035 UINT32 RelativePowerSavingToMPS0;\r
1036 UINT64 ExitLatencyToMPS0;\r
1037} EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
1038\r
1039#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
1040#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
1041#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
1042\r
1043typedef struct {\r
1044 UINT16 MemoryPowerStateCharacteristicsCount;\r
1045 UINT8 Reserved[2];\r
1046} EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
1047\r
1048///\r
1049/// Platform Memory Topology Table definition.\r
1050///\r
1051typedef struct {\r
1052 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1053 UINT32 NumberOfMemoryDevices;\r
1054 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];\r
1055} EFI_ACPI_6_5_PLATFORM_MEMORY_TOPOLOGY_TABLE;\r
1056\r
1057///\r
1058/// PMTT Version (as defined in ACPI 6.5 spec.)\r
1059///\r
1060#define EFI_ACPI_6_5_MEMORY_TOPOLOGY_TABLE_REVISION 0x02\r
1061\r
1062///\r
1063/// Common Memory Device.\r
1064///\r
1065typedef struct {\r
1066 UINT8 Type;\r
1067 UINT8 Reserved;\r
1068 UINT16 Length;\r
1069 UINT16 Flags;\r
1070 UINT16 Reserved1;\r
1071 UINT32 NumberOfMemoryDevices;\r
1072 // UINT8 TypeSpecificData[];\r
1073 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];\r
1074} EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE;\r
1075\r
1076///\r
1077/// Memory Device Type.\r
1078///\r
1079#define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_SOCKET 0x0\r
1080#define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_MEMORY_CONTROLLER 0x1\r
1081#define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_DIMM 0x2\r
1082#define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_VENDOR_SPECIFIC_TYPE 0xFF\r
1083\r
1084///\r
1085/// Socket Type Data.\r
1086///\r
1087typedef struct {\r
1088 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1089 UINT16 SocketIdentifier;\r
1090 UINT16 Reserved;\r
1091 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1092} EFI_ACPI_6_5_PMTT_SOCKET_TYPE_DATA;\r
1093\r
1094///\r
1095/// Memory Controller Type Data.\r
1096///\r
1097typedef struct {\r
1098 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1099 UINT16 MemoryControllerIdentifier;\r
1100 UINT16 Reserved;\r
1101 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1102} EFI_ACPI_6_5_PMTT_MEMORY_CONTROLLER_TYPE_DATA;\r
1103\r
1104///\r
1105/// DIMM Type Specific Data.\r
1106///\r
1107typedef struct {\r
1108 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1109 UINT32 SmbiosHandle;\r
1110} EFI_ACPI_6_5_PMTT_DIMM_TYPE_SPECIFIC_DATA;\r
1111\r
1112///\r
1113/// Vendor Specific Type Data.\r
1114///\r
1115typedef struct {\r
1116 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1117 UINT8 TypeUuid[16];\r
1118 // EFI_ACPI_6_5_PMTT_VENDOR_SPECIFIC_TYPE_DATA VendorSpecificData[];\r
1119 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1120} EFI_ACPI_6_5_PMTT_VENDOR_SPECIFIC_TYPE_DATA;\r
1121\r
1122///\r
1123/// Boot Graphics Resource Table definition.\r
1124///\r
1125typedef struct {\r
1126 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1127 ///\r
1128 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1129 ///\r
1130 UINT16 Version;\r
1131 ///\r
1132 /// 1-byte status field indicating current status about the table.\r
1133 /// Bits[7:3] = Reserved (must be zero)\r
1134 /// Bits[2:1] = Orientation Offset. These bits describe the clockwise\r
1135 /// degree offset from the image's default orientation.\r
1136 /// [00] = 0, no offset\r
1137 /// [01] = 90\r
1138 /// [10] = 180\r
1139 /// [11] = 270\r
1140 /// Bit [0] = Displayed. A one indicates the boot image graphic is\r
1141 /// displayed.\r
1142 ///\r
1143 UINT8 Status;\r
1144 ///\r
1145 /// 1-byte enumerated type field indicating format of the image.\r
1146 /// 0 = Bitmap\r
1147 /// 1 - 255 Reserved (for future use)\r
1148 ///\r
1149 UINT8 ImageType;\r
1150 ///\r
1151 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1152 /// of the image bitmap.\r
1153 ///\r
1154 UINT64 ImageAddress;\r
1155 ///\r
1156 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1157 /// (X, Y) display offset of the top left corner of the boot image.\r
1158 /// The top left corner of the display is at offset (0, 0).\r
1159 ///\r
1160 UINT32 ImageOffsetX;\r
1161 ///\r
1162 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1163 /// (X, Y) display offset of the top left corner of the boot image.\r
1164 /// The top left corner of the display is at offset (0, 0).\r
1165 ///\r
1166 UINT32 ImageOffsetY;\r
1167} EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1168\r
1169///\r
1170/// BGRT Revision\r
1171///\r
1172#define EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1173\r
1174///\r
1175/// BGRT Version\r
1176///\r
1177#define EFI_ACPI_6_5_BGRT_VERSION 0x01\r
1178\r
1179///\r
1180/// BGRT Status\r
1181///\r
1182#define EFI_ACPI_6_5_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1183#define EFI_ACPI_6_5_BGRT_STATUS_DISPLAYED 0x01\r
1184\r
1185///\r
1186/// BGRT Image Type\r
1187///\r
1188#define EFI_ACPI_6_5_BGRT_IMAGE_TYPE_BMP 0x00\r
1189\r
1190///\r
1191/// FPDT Version (as defined in ACPI 6.5 spec.)\r
1192///\r
1193#define EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1194\r
1195///\r
1196/// FPDT Performance Record Types\r
1197///\r
1198#define EFI_ACPI_6_5_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1199#define EFI_ACPI_6_5_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1200\r
1201///\r
1202/// FPDT Performance Record Revision\r
1203///\r
1204#define EFI_ACPI_6_5_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1205#define EFI_ACPI_6_5_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1206\r
1207///\r
1208/// FPDT Runtime Performance Record Types\r
1209///\r
1210#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1211#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1212#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1213\r
1214///\r
1215/// FPDT Runtime Performance Record Revision\r
1216///\r
1217#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1218#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1219#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1220\r
1221///\r
1222/// FPDT Performance Record header\r
1223///\r
1224typedef struct {\r
1225 UINT16 Type;\r
1226 UINT8 Length;\r
1227 UINT8 Revision;\r
1228} EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER;\r
1229\r
1230///\r
1231/// FPDT Performance Table header\r
1232///\r
1233typedef struct {\r
1234 UINT32 Signature;\r
1235 UINT32 Length;\r
1236} EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER;\r
1237\r
1238///\r
1239/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1240///\r
1241typedef struct {\r
1242 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1243 UINT32 Reserved;\r
1244 ///\r
1245 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1246 ///\r
1247 UINT64 BootPerformanceTablePointer;\r
1248} EFI_ACPI_6_5_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1249\r
1250///\r
1251/// FPDT S3 Performance Table Pointer Record Structure\r
1252///\r
1253typedef struct {\r
1254 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1255 UINT32 Reserved;\r
1256 ///\r
1257 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1258 ///\r
1259 UINT64 S3PerformanceTablePointer;\r
1260} EFI_ACPI_6_5_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1261\r
1262///\r
1263/// FPDT Firmware Basic Boot Performance Record Structure\r
1264///\r
1265typedef struct {\r
1266 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1267 UINT32 Reserved;\r
1268 ///\r
1269 /// Timer value logged at the beginning of firmware image execution.\r
1270 /// This may not always be zero or near zero.\r
1271 ///\r
1272 UINT64 ResetEnd;\r
1273 ///\r
1274 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1275 /// For non-UEFI compatible boots, this field must be zero.\r
1276 ///\r
1277 UINT64 OsLoaderLoadImageStart;\r
1278 ///\r
1279 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1280 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1281 /// to the INT 19h handler invocation.\r
1282 ///\r
1283 UINT64 OsLoaderStartImageStart;\r
1284 ///\r
1285 /// Timer value logged at the point when the OS loader calls the\r
1286 /// ExitBootServices function for UEFI compatible firmware.\r
1287 /// For non-UEFI compatible boots, this field must be zero.\r
1288 ///\r
1289 UINT64 ExitBootServicesEntry;\r
1290 ///\r
1291 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1292 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1293 /// For non-UEFI compatible boots, this field must be zero.\r
1294 ///\r
1295 UINT64 ExitBootServicesExit;\r
1296} EFI_ACPI_6_5_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1297\r
1298///\r
1299/// FPDT Firmware Basic Boot Performance Table signature\r
1300///\r
1301#define EFI_ACPI_6_5_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1302\r
1303//\r
1304// FPDT Firmware Basic Boot Performance Table\r
1305//\r
1306typedef struct {\r
1307 EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1308 //\r
1309 // one or more Performance Records.\r
1310 //\r
1311} EFI_ACPI_6_5_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1312\r
1313///\r
1314/// FPDT "S3PT" S3 Performance Table\r
1315///\r
1316#define EFI_ACPI_6_5_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1317\r
1318//\r
1319// FPDT Firmware S3 Boot Performance Table\r
1320//\r
1321typedef struct {\r
1322 EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1323 //\r
1324 // one or more Performance Records.\r
1325 //\r
1326} EFI_ACPI_6_5_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1327\r
1328///\r
1329/// FPDT Basic S3 Resume Performance Record\r
1330///\r
1331typedef struct {\r
1332 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1333 ///\r
1334 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1335 ///\r
1336 UINT32 ResumeCount;\r
1337 ///\r
1338 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1339 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1340 ///\r
1341 UINT64 FullResume;\r
1342 ///\r
1343 /// Average timer value of all resume cycles logged since the last full boot\r
1344 /// sequence, including the most recent resume. Note that the entire log of\r
1345 /// timer values does not need to be retained in order to calculate this average.\r
1346 ///\r
1347 UINT64 AverageResume;\r
1348} EFI_ACPI_6_5_FPDT_S3_RESUME_RECORD;\r
1349\r
1350///\r
1351/// FPDT Basic S3 Suspend Performance Record\r
1352///\r
1353typedef struct {\r
1354 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1355 ///\r
1356 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1357 /// Only the most recent suspend cycle's timer value is retained.\r
1358 ///\r
1359 UINT64 SuspendStart;\r
1360 ///\r
1361 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1362 /// mechanism) used to trigger hardware entry to S3.\r
1363 /// Only the most recent suspend cycle's timer value is retained.\r
1364 ///\r
1365 UINT64 SuspendEnd;\r
1366} EFI_ACPI_6_5_FPDT_S3_SUSPEND_RECORD;\r
1367\r
1368///\r
1369/// Firmware Performance Record Table definition.\r
1370///\r
1371typedef struct {\r
1372 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1373} EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1374\r
1375///\r
1376/// Generic Timer Description Table definition.\r
1377///\r
1378typedef struct {\r
1379 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1380 UINT64 CntControlBasePhysicalAddress;\r
1381 UINT32 Reserved;\r
1382 UINT32 SecurePL1TimerGSIV;\r
1383 UINT32 SecurePL1TimerFlags;\r
1384 UINT32 NonSecurePL1TimerGSIV;\r
1385 UINT32 NonSecurePL1TimerFlags;\r
1386 UINT32 VirtualTimerGSIV;\r
1387 UINT32 VirtualTimerFlags;\r
1388 UINT32 NonSecurePL2TimerGSIV;\r
1389 UINT32 NonSecurePL2TimerFlags;\r
1390 UINT64 CntReadBasePhysicalAddress;\r
1391 UINT32 PlatformTimerCount;\r
1392 UINT32 PlatformTimerOffset;\r
1393 UINT32 VirtualPL2TimerGSIV;\r
1394 UINT32 VirtualPL2TimerFlags;\r
1395} EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1396\r
1397///\r
1398/// GTDT Version (as defined in ACPI 6.5 spec.)\r
1399///\r
1400#define EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03\r
1401\r
1402///\r
1403/// Timer Flags. All other bits are reserved and must be 0.\r
1404///\r
1405#define EFI_ACPI_6_5_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1406#define EFI_ACPI_6_5_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1407#define EFI_ACPI_6_5_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1408\r
1409///\r
1410/// Platform Timer Type\r
1411///\r
1412#define EFI_ACPI_6_5_GTDT_GT_BLOCK 0\r
1413#define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG 1\r
1414\r
1415///\r
1416/// GT Block Structure\r
1417///\r
1418typedef struct {\r
1419 UINT8 Type;\r
1420 UINT16 Length;\r
1421 UINT8 Reserved;\r
1422 UINT64 CntCtlBase;\r
1423 UINT32 GTBlockTimerCount;\r
1424 UINT32 GTBlockTimerOffset;\r
1425} EFI_ACPI_6_5_GTDT_GT_BLOCK_STRUCTURE;\r
1426\r
1427///\r
1428/// GT Block Timer Structure\r
1429///\r
1430typedef struct {\r
1431 UINT8 GTFrameNumber;\r
1432 UINT8 Reserved[3];\r
1433 UINT64 CntBaseX;\r
1434 UINT64 CntEL0BaseX;\r
1435 UINT32 GTxPhysicalTimerGSIV;\r
1436 UINT32 GTxPhysicalTimerFlags;\r
1437 UINT32 GTxVirtualTimerGSIV;\r
1438 UINT32 GTxVirtualTimerFlags;\r
1439 UINT32 GTxCommonFlags;\r
1440} EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1441\r
1442///\r
1443/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1444///\r
1445#define EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1446#define EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1447\r
1448///\r
1449/// Common Flags Flags. All other bits are reserved and must be 0.\r
1450///\r
1451#define EFI_ACPI_6_5_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1452#define EFI_ACPI_6_5_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1453\r
1454///\r
1455/// Arm Generic Watchdog Structure\r
1456///\r
1457typedef struct {\r
1458 UINT8 Type;\r
1459 UINT16 Length;\r
1460 UINT8 Reserved;\r
1461 UINT64 RefreshFramePhysicalAddress;\r
1462 UINT64 WatchdogControlFramePhysicalAddress;\r
1463 UINT32 WatchdogTimerGSIV;\r
1464 UINT32 WatchdogTimerFlags;\r
1465} EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE;\r
1466\r
1467///\r
1468/// Arm Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1469///\r
1470#define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1471#define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1472#define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1473\r
1474//\r
1475// NVDIMM Firmware Interface Table definition.\r
1476//\r
1477typedef struct {\r
1478 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1479 UINT32 Reserved;\r
1480} EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1481\r
1482//\r
1483// NFIT Version (as defined in ACPI 6.5 spec.)\r
1484//\r
1485#define EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1486\r
1487//\r
1488// Definition for NFIT Table Structure Types\r
1489//\r
1490#define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1491#define EFI_ACPI_6_5_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1\r
1492#define EFI_ACPI_6_5_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1493#define EFI_ACPI_6_5_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1494#define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1495#define EFI_ACPI_6_5_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1496#define EFI_ACPI_6_5_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1497#define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITIES_STRUCTURE_TYPE 7\r
1498\r
1499//\r
1500// Definition for NFIT Structure Header\r
1501//\r
1502typedef struct {\r
1503 UINT16 Type;\r
1504 UINT16 Length;\r
1505} EFI_ACPI_6_5_NFIT_STRUCTURE_HEADER;\r
1506\r
1507//\r
1508// Definition for System Physical Address Range Structure\r
1509//\r
1510#define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1511#define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
1512#define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_SPA_LOCATION_COOKIE_VALID BIT2\r
1513\r
1514#define EFI_ACPI_6_5_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}\r
1515#define EFI_ACPI_6_5_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}\r
1516#define EFI_ACPI_6_5_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}\r
1517#define EFI_ACPI_6_5_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}\r
1518#define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x6.5B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}\r
1519#define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}\r
1520#define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
1521#define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}\r
1522\r
1523typedef struct {\r
1524 UINT16 Type;\r
1525 UINT16 Length;\r
1526 UINT16 SPARangeStructureIndex;\r
1527 UINT16 Flags;\r
1528 UINT32 Reserved_8;\r
1529 UINT32 ProximityDomain;\r
1530 GUID AddressRangeTypeGUID;\r
1531 UINT64 SystemPhysicalAddressRangeBase;\r
1532 UINT64 SystemPhysicalAddressRangeLength;\r
1533 UINT64 AddressRangeMemoryMappingAttribute;\r
1534 UINT64 SPALocationCookie;\r
1535} EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1536\r
1537//\r
1538// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1539//\r
1540typedef struct {\r
1541 UINT32 DIMMNumber : 4;\r
1542 UINT32 MemoryChannelNumber : 4;\r
1543 UINT32 MemoryControllerID : 4;\r
1544 UINT32 SocketID : 4;\r
1545 UINT32 NodeControllerID : 12;\r
1546 UINT32 Reserved_28 : 4;\r
1547} EFI_ACPI_6_5_NFIT_DEVICE_HANDLE;\r
1548\r
1549#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1550#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1551#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1552#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1553#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1554#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1555#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6\r
1556\r
1557typedef struct {\r
1558 UINT16 Type;\r
1559 UINT16 Length;\r
1560 EFI_ACPI_6_5_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1561 UINT16 NVDIMMPhysicalID;\r
1562 UINT16 NVDIMMRegionID;\r
1563 UINT16 SPARangeStructureIndex;\r
1564 UINT16 NVDIMMControlRegionStructureIndex;\r
1565 UINT64 NVDIMMRegionSize;\r
1566 UINT64 RegionOffset;\r
1567 UINT64 NVDIMMPhysicalAddressRegionBase;\r
1568 UINT16 InterleaveStructureIndex;\r
1569 UINT16 InterleaveWays;\r
1570 UINT16 NVDIMMStateFlags;\r
1571 UINT16 Reserved_46;\r
1572} EFI_ACPI_6_5_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;\r
1573\r
1574//\r
1575// Definition for Interleave Structure\r
1576//\r
1577typedef struct {\r
1578 UINT16 Type;\r
1579 UINT16 Length;\r
1580 UINT16 InterleaveStructureIndex;\r
1581 UINT16 Reserved_6;\r
1582 UINT32 NumberOfLines;\r
1583 UINT32 LineSize;\r
1584 // UINT32 LineOffset[NumberOfLines];\r
1585} EFI_ACPI_6_5_NFIT_INTERLEAVE_STRUCTURE;\r
1586\r
1587//\r
1588// Definition for SMBIOS Management Information Structure\r
1589//\r
1590typedef struct {\r
1591 UINT16 Type;\r
1592 UINT16 Length;\r
1593 UINT32 Reserved_4;\r
1594 // UINT8 Data[];\r
1595} EFI_ACPI_6_5_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1596\r
1597//\r
1598// Definition for NVDIMM Control Region Structure\r
1599//\r
1600#define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0\r
1601\r
1602#define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
1603\r
1604typedef struct {\r
1605 UINT16 Type;\r
1606 UINT16 Length;\r
1607 UINT16 NVDIMMControlRegionStructureIndex;\r
1608 UINT16 VendorID;\r
1609 UINT16 DeviceID;\r
1610 UINT16 RevisionID;\r
1611 UINT16 SubsystemVendorID;\r
1612 UINT16 SubsystemDeviceID;\r
1613 UINT16 SubsystemRevisionID;\r
1614 UINT8 ValidFields;\r
1615 UINT8 ManufacturingLocation;\r
1616 UINT16 ManufacturingDate;\r
1617 UINT8 Reserved_22[2];\r
1618 UINT32 SerialNumber;\r
1619 UINT16 RegionFormatInterfaceCode;\r
1620 UINT16 NumberOfBlockControlWindows;\r
1621 UINT64 SizeOfBlockControlWindow;\r
1622 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1623 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1624 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1625 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1626 UINT16 NVDIMMControlRegionFlag;\r
1627 UINT8 Reserved_74[6];\r
1628} EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1629\r
1630//\r
1631// Definition for NVDIMM Block Data Window Region Structure\r
1632//\r
1633typedef struct {\r
1634 UINT16 Type;\r
1635 UINT16 Length;\r
1636 UINT16 NVDIMMControlRegionStructureIndex;\r
1637 UINT16 NumberOfBlockDataWindows;\r
1638 UINT64 BlockDataWindowStartOffset;\r
1639 UINT64 SizeOfBlockDataWindow;\r
1640 UINT64 BlockAccessibleMemoryCapacity;\r
1641 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1642} EFI_ACPI_6_5_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1643\r
1644//\r
1645// Definition for Flush Hint Address Structure\r
1646//\r
1647typedef struct {\r
1648 UINT16 Type;\r
1649 UINT16 Length;\r
1650 EFI_ACPI_6_5_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1651 UINT16 NumberOfFlushHintAddresses;\r
1652 UINT8 Reserved_10[6];\r
1653 // UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1654} EFI_ACPI_6_5_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1655\r
1656//\r
1657// Definition for Platform Capabilities Structure\r
1658//\r
1659typedef struct {\r
1660 UINT16 Type;\r
1661 UINT16 Length;\r
1662 UINT8 HighestValidCapability;\r
1663 UINT8 Reserved_5[3];\r
1664 UINT32 Capabilities;\r
1665 UINT8 Reserved_12[4];\r
1666} EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITIES_STRUCTURE;\r
1667\r
1668#define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT0\r
1669#define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT1\r
1670#define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT2\r
1671\r
1672///\r
1673/// Secure DEVices Table (SDEV)\r
1674///\r
1675typedef struct {\r
1676 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1677} EFI_ACPI_6_5_SECURE_DEVICES_TABLE_HEADER;\r
1678\r
1679///\r
1680/// SDEV Revision (as defined in ACPI 6.5 spec.)\r
1681///\r
1682#define EFI_ACPI_6_5_SECURE_DEVICES_TABLE_REVISION 0x01\r
1683\r
1684///\r
1685/// Secure Device types\r
1686///\r
1687#define EFI_ACPI_6_5_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00\r
1688#define EFI_ACPI_6_5_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
1689\r
1690///\r
1691/// Secure Device flags\r
1692///\r
1693#define EFI_ACPI_6_5_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
1694#define EFI_ACPI_6_5_SDEV_FLAG_SECURE_ACCESS_COMPONENTS_PRESENT BIT1\r
1695\r
1696///\r
1697/// SDEV Structure Header\r
1698///\r
1699typedef struct {\r
1700 UINT8 Type;\r
1701 UINT8 Flags;\r
1702 UINT16 Length;\r
1703} EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER;\r
1704\r
1705///\r
1706/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
1707///\r
1708typedef struct {\r
1709 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;\r
1710 UINT16 DeviceIdentifierOffset;\r
1711 UINT16 DeviceIdentifierLength;\r
1712 UINT16 VendorSpecificDataOffset;\r
1713 UINT16 VendorSpecificDataLength;\r
1714 UINT16 SecureAccessComponentsOffset;\r
1715 UINT16 SecureAccessComponentsLength;\r
1716} EFI_ACPI_6_5_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
1717\r
1718///\r
1719/// Secure Access Component Types\r
1720///\r
1721#define EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_TYPE_IDENTIFICATION 0x00\r
1722#define EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_TYPE_MEMORY 0x01\r
1723\r
1724///\r
1725/// Identification Based Secure Access Component\r
1726///\r
1727typedef struct {\r
1728 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;\r
1729 UINT16 HardwareIdentifierOffset;\r
1730 UINT16 HardwareIdentifierLength;\r
1731 UINT16 SubsystemIdentifierOffset;\r
1732 UINT16 SubsystemIdentifierLength;\r
1733 UINT16 HardwareRevision;\r
1734 UINT8 HardwareRevisionPresent;\r
1735 UINT8 ClassCodePresent;\r
1736 UINT8 PciCompatibleBaseClass;\r
1737 UINT8 PciCompatibleSubClass;\r
1738 UINT8 PciCompatibleProgrammingInterface;\r
1739} EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_IDENTIFICATION_STRUCTURE;\r
1740\r
1741///\r
1742/// Memory-based Secure Access Component\r
1743///\r
1744typedef struct {\r
1745 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;\r
1746 UINT32 Reserved;\r
1747 UINT64 MemoryAddressBase;\r
1748 UINT64 MemoryLength;\r
1749} EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_MEMORY_STRUCTURE;\r
1750\r
1751///\r
1752/// PCIe Endpoint Device based Secure Device Structure\r
1753///\r
1754typedef struct {\r
1755 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;\r
1756 UINT16 PciSegmentNumber;\r
1757 UINT16 StartBusNumber;\r
1758 UINT16 PciPathOffset;\r
1759 UINT16 PciPathLength;\r
1760 UINT16 VendorSpecificDataOffset;\r
1761 UINT16 VendorSpecificDataLength;\r
1762} EFI_ACPI_6_5_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
1763\r
1764///\r
1765/// Boot Error Record Table (BERT)\r
1766///\r
1767typedef struct {\r
1768 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1769 UINT32 BootErrorRegionLength;\r
1770 UINT64 BootErrorRegion;\r
1771} EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1772\r
1773///\r
1774/// BERT Version (as defined in ACPI 6.5 spec.)\r
1775///\r
1776#define EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1777\r
1778///\r
1779/// Boot Error Region Block Status Definition\r
1780///\r
1781typedef struct {\r
1782 UINT32 UncorrectableErrorValid : 1;\r
1783 UINT32 CorrectableErrorValid : 1;\r
1784 UINT32 MultipleUncorrectableErrors : 1;\r
1785 UINT32 MultipleCorrectableErrors : 1;\r
1786 UINT32 ErrorDataEntryCount : 10;\r
1787 UINT32 Reserved : 18;\r
1788} EFI_ACPI_6_5_ERROR_BLOCK_STATUS;\r
1789\r
1790///\r
1791/// Boot Error Region Definition\r
1792///\r
1793typedef struct {\r
1794 EFI_ACPI_6_5_ERROR_BLOCK_STATUS BlockStatus;\r
1795 UINT32 RawDataOffset;\r
1796 UINT32 RawDataLength;\r
1797 UINT32 DataLength;\r
1798 UINT32 ErrorSeverity;\r
1799} EFI_ACPI_6_5_BOOT_ERROR_REGION_STRUCTURE;\r
1800\r
1801//\r
1802// Boot Error Severity types\r
1803//\r
1804#define EFI_ACPI_6_5_ERROR_SEVERITY_RECOVERABLE 0x00\r
1805#define EFI_ACPI_6_5_ERROR_SEVERITY_FATAL 0x01\r
1806#define EFI_ACPI_6_5_ERROR_SEVERITY_CORRECTED 0x02\r
1807#define EFI_ACPI_6_5_ERROR_SEVERITY_NONE 0x03\r
1808//\r
1809// The term 'Correctable' is no longer being used as an error severity of the\r
1810// reported error since ACPI Specification Version 5.1 Errata B.\r
1811// The below macro is considered as deprecated and should no longer be used.\r
1812//\r
1813#define EFI_ACPI_6_5_ERROR_SEVERITY_CORRECTABLE 0x00\r
1814\r
1815///\r
1816/// Generic Error Data Entry Definition\r
1817///\r
1818typedef struct {\r
1819 UINT8 SectionType[16];\r
1820 UINT32 ErrorSeverity;\r
1821 UINT16 Revision;\r
1822 UINT8 ValidationBits;\r
1823 UINT8 Flags;\r
1824 UINT32 ErrorDataLength;\r
1825 UINT8 FruId[16];\r
1826 UINT8 FruText[20];\r
1827 UINT8 Timestamp[8];\r
1828} EFI_ACPI_6_5_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1829\r
1830///\r
1831/// Generic Error Data Entry Version (as defined in ACPI 6.5 spec.)\r
1832///\r
1833#define EFI_ACPI_6_5_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300\r
1834\r
1835///\r
1836/// HEST - Hardware Error Source Table\r
1837///\r
1838typedef struct {\r
1839 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1840 UINT32 ErrorSourceCount;\r
1841} EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1842\r
1843///\r
1844/// HEST Version (as defined in ACPI 6.5 spec.)\r
1845///\r
1846#define EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1847\r
1848//\r
1849// Error Source structure types.\r
1850//\r
1851#define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1852#define EFI_ACPI_6_5_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1853#define EFI_ACPI_6_5_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1854#define EFI_ACPI_6_5_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1855#define EFI_ACPI_6_5_PCI_EXPRESS_DEVICE_AER 0x07\r
1856#define EFI_ACPI_6_5_PCI_EXPRESS_BRIDGE_AER 0x08\r
1857#define EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR 0x09\r
1858#define EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A\r
1859#define EFI_ACPI_6_5_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B\r
1860\r
1861//\r
1862// Error Source structure flags.\r
1863//\r
1864#define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1865#define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1866#define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)\r
1867\r
1868///\r
1869/// IA-32 Architecture Machine Check Exception Structure Definition\r
1870///\r
1871typedef struct {\r
1872 UINT16 Type;\r
1873 UINT16 SourceId;\r
1874 UINT8 Reserved0[2];\r
1875 UINT8 Flags;\r
1876 UINT8 Enabled;\r
1877 UINT32 NumberOfRecordsToPreAllocate;\r
1878 UINT32 MaxSectionsPerRecord;\r
1879 UINT64 GlobalCapabilityInitData;\r
1880 UINT64 GlobalControlInitData;\r
1881 UINT8 NumberOfHardwareBanks;\r
1882 UINT8 Reserved1[7];\r
1883} EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1884\r
1885///\r
1886/// IA-32 Architecture Machine Check Bank Structure Definition\r
1887///\r
1888typedef struct {\r
1889 UINT8 BankNumber;\r
1890 UINT8 ClearStatusOnInitialization;\r
1891 UINT8 StatusDataFormat;\r
1892 UINT8 Reserved0;\r
1893 UINT32 ControlRegisterMsrAddress;\r
1894 UINT64 ControlInitData;\r
1895 UINT32 StatusRegisterMsrAddress;\r
1896 UINT32 AddressRegisterMsrAddress;\r
1897 UINT32 MiscRegisterMsrAddress;\r
1898} EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1899\r
1900///\r
1901/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1902///\r
1903#define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1904#define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1905#define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1906\r
1907//\r
1908// Hardware Error Notification types. All other values are reserved\r
1909//\r
1910#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1911#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1912#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1913#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1914#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1915#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05\r
1916#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_MCE 0x06\r
1917#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07\r
1918#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08\r
1919#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09\r
1920#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A\r
1921#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B\r
1922\r
1923///\r
1924/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1925///\r
1926typedef struct {\r
1927 UINT16 Type : 1;\r
1928 UINT16 PollInterval : 1;\r
1929 UINT16 SwitchToPollingThresholdValue : 1;\r
1930 UINT16 SwitchToPollingThresholdWindow : 1;\r
1931 UINT16 ErrorThresholdValue : 1;\r
1932 UINT16 ErrorThresholdWindow : 1;\r
1933 UINT16 Reserved : 10;\r
1934} EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1935\r
1936///\r
1937/// Hardware Error Notification Structure Definition\r
1938///\r
1939typedef struct {\r
1940 UINT8 Type;\r
1941 UINT8 Length;\r
1942 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1943 UINT32 PollInterval;\r
1944 UINT32 Vector;\r
1945 UINT32 SwitchToPollingThresholdValue;\r
1946 UINT32 SwitchToPollingThresholdWindow;\r
1947 UINT32 ErrorThresholdValue;\r
1948 UINT32 ErrorThresholdWindow;\r
1949} EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1950\r
1951///\r
1952/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1953///\r
1954typedef struct {\r
1955 UINT16 Type;\r
1956 UINT16 SourceId;\r
1957 UINT8 Reserved0[2];\r
1958 UINT8 Flags;\r
1959 UINT8 Enabled;\r
1960 UINT32 NumberOfRecordsToPreAllocate;\r
1961 UINT32 MaxSectionsPerRecord;\r
1962 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1963 UINT8 NumberOfHardwareBanks;\r
1964 UINT8 Reserved1[3];\r
1965} EFI_ACPI_6_5_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1966\r
1967///\r
1968/// IA-32 Architecture NMI Error Structure Definition\r
1969///\r
1970typedef struct {\r
1971 UINT16 Type;\r
1972 UINT16 SourceId;\r
1973 UINT8 Reserved0[2];\r
1974 UINT32 NumberOfRecordsToPreAllocate;\r
1975 UINT32 MaxSectionsPerRecord;\r
1976 UINT32 MaxRawDataLength;\r
1977} EFI_ACPI_6_5_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1978\r
1979///\r
1980/// PCI Express Root Port AER Structure Definition\r
1981///\r
1982typedef struct {\r
1983 UINT16 Type;\r
1984 UINT16 SourceId;\r
1985 UINT8 Reserved0[2];\r
1986 UINT8 Flags;\r
1987 UINT8 Enabled;\r
1988 UINT32 NumberOfRecordsToPreAllocate;\r
1989 UINT32 MaxSectionsPerRecord;\r
1990 UINT32 Bus;\r
1991 UINT16 Device;\r
1992 UINT16 Function;\r
1993 UINT16 DeviceControl;\r
1994 UINT8 Reserved1[2];\r
1995 UINT32 UncorrectableErrorMask;\r
1996 UINT32 UncorrectableErrorSeverity;\r
1997 UINT32 CorrectableErrorMask;\r
1998 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1999 UINT32 RootErrorCommand;\r
2000} EFI_ACPI_6_5_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
2001\r
2002///\r
2003/// PCI Express Device AER Structure Definition\r
2004///\r
2005typedef struct {\r
2006 UINT16 Type;\r
2007 UINT16 SourceId;\r
2008 UINT8 Reserved0[2];\r
2009 UINT8 Flags;\r
2010 UINT8 Enabled;\r
2011 UINT32 NumberOfRecordsToPreAllocate;\r
2012 UINT32 MaxSectionsPerRecord;\r
2013 UINT32 Bus;\r
2014 UINT16 Device;\r
2015 UINT16 Function;\r
2016 UINT16 DeviceControl;\r
2017 UINT8 Reserved1[2];\r
2018 UINT32 UncorrectableErrorMask;\r
2019 UINT32 UncorrectableErrorSeverity;\r
2020 UINT32 CorrectableErrorMask;\r
2021 UINT32 AdvancedErrorCapabilitiesAndControl;\r
2022} EFI_ACPI_6_5_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
2023\r
2024///\r
2025/// PCI Express Bridge AER Structure Definition\r
2026///\r
2027typedef struct {\r
2028 UINT16 Type;\r
2029 UINT16 SourceId;\r
2030 UINT8 Reserved0[2];\r
2031 UINT8 Flags;\r
2032 UINT8 Enabled;\r
2033 UINT32 NumberOfRecordsToPreAllocate;\r
2034 UINT32 MaxSectionsPerRecord;\r
2035 UINT32 Bus;\r
2036 UINT16 Device;\r
2037 UINT16 Function;\r
2038 UINT16 DeviceControl;\r
2039 UINT8 Reserved1[2];\r
2040 UINT32 UncorrectableErrorMask;\r
2041 UINT32 UncorrectableErrorSeverity;\r
2042 UINT32 CorrectableErrorMask;\r
2043 UINT32 AdvancedErrorCapabilitiesAndControl;\r
2044 UINT32 SecondaryUncorrectableErrorMask;\r
2045 UINT32 SecondaryUncorrectableErrorSeverity;\r
2046 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
2047} EFI_ACPI_6_5_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
2048\r
2049///\r
2050/// Generic Hardware Error Source Structure Definition\r
2051///\r
2052typedef struct {\r
2053 UINT16 Type;\r
2054 UINT16 SourceId;\r
2055 UINT16 RelatedSourceId;\r
2056 UINT8 Flags;\r
2057 UINT8 Enabled;\r
2058 UINT32 NumberOfRecordsToPreAllocate;\r
2059 UINT32 MaxSectionsPerRecord;\r
2060 UINT32 MaxRawDataLength;\r
2061 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
2062 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2063 UINT32 ErrorStatusBlockLength;\r
2064} EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
2065\r
2066///\r
2067/// Generic Hardware Error Source Version 2 Structure Definition\r
2068///\r
2069typedef struct {\r
2070 UINT16 Type;\r
2071 UINT16 SourceId;\r
2072 UINT16 RelatedSourceId;\r
2073 UINT8 Flags;\r
2074 UINT8 Enabled;\r
2075 UINT32 NumberOfRecordsToPreAllocate;\r
2076 UINT32 MaxSectionsPerRecord;\r
2077 UINT32 MaxRawDataLength;\r
2078 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
2079 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2080 UINT32 ErrorStatusBlockLength;\r
2081 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;\r
2082 UINT64 ReadAckPreserve;\r
2083 UINT64 ReadAckWrite;\r
2084} EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;\r
2085\r
2086///\r
2087/// Generic Error Status Definition\r
2088///\r
2089typedef struct {\r
2090 EFI_ACPI_6_5_ERROR_BLOCK_STATUS BlockStatus;\r
2091 UINT32 RawDataOffset;\r
2092 UINT32 RawDataLength;\r
2093 UINT32 DataLength;\r
2094 UINT32 ErrorSeverity;\r
2095} EFI_ACPI_6_5_GENERIC_ERROR_STATUS_STRUCTURE;\r
2096\r
2097///\r
2098/// IA-32 Architecture Deferred Machine Check Structure Definition\r
2099///\r
2100typedef struct {\r
2101 UINT16 Type;\r
2102 UINT16 SourceId;\r
2103 UINT8 Reserved0[2];\r
2104 UINT8 Flags;\r
2105 UINT8 Enabled;\r
2106 UINT32 NumberOfRecordsToPreAllocate;\r
2107 UINT32 MaxSectionsPerRecord;\r
2108 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2109 UINT8 NumberOfHardwareBanks;\r
2110 UINT8 Reserved1[3];\r
2111} EFI_ACPI_6_5_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;\r
2112\r
2113///\r
2114/// HMAT - Heterogeneous Memory Attribute Table\r
2115///\r
2116typedef struct {\r
2117 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2118 UINT8 Reserved[4];\r
2119} EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;\r
2120\r
2121///\r
2122/// HMAT Revision (as defined in ACPI 6.5 spec.)\r
2123///\r
2124#define EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02\r
2125\r
2126///\r
2127/// HMAT types\r
2128///\r
2129#define EFI_ACPI_6_5_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00\r
2130#define EFI_ACPI_6_5_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01\r
2131#define EFI_ACPI_6_5_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02\r
2132\r
2133///\r
2134/// HMAT Structure Header\r
2135///\r
2136typedef struct {\r
2137 UINT16 Type;\r
2138 UINT8 Reserved[2];\r
2139 UINT32 Length;\r
2140} EFI_ACPI_6_5_HMAT_STRUCTURE_HEADER;\r
2141\r
2142///\r
2143/// Memory Proximity Domain Attributes Structure flags\r
2144///\r
2145typedef struct {\r
2146 UINT16 InitiatorProximityDomainValid : 1;\r
2147 UINT16 Reserved : 15;\r
2148} EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;\r
2149\r
2150///\r
2151/// Memory Proximity Domain Attributes Structure\r
2152///\r
2153typedef struct {\r
2154 UINT16 Type;\r
2155 UINT8 Reserved[2];\r
2156 UINT32 Length;\r
2157 EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags;\r
2158 UINT8 Reserved1[2];\r
2159 UINT32 InitiatorProximityDomain;\r
2160 UINT32 MemoryProximityDomain;\r
2161 UINT8 Reserved2[20];\r
2162} EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;\r
2163\r
2164///\r
2165/// System Locality Latency and Bandwidth Information Structure flags\r
2166///\r
2167typedef struct {\r
2168 UINT8 MemoryHierarchy : 4;\r
2169 UINT8 AccessAttributes : 2;\r
2170 UINT8 Reserved : 2;\r
2171} EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;\r
2172\r
2173///\r
2174/// System Locality Latency and Bandwidth Information Structure\r
2175///\r
2176typedef struct {\r
2177 UINT16 Type;\r
2178 UINT8 Reserved[2];\r
2179 UINT32 Length;\r
2180 EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;\r
2181 UINT8 DataType;\r
2182 UINT8 MinTransferSize;\r
2183 UINT8 Reserved1;\r
2184 UINT32 NumberOfInitiatorProximityDomains;\r
2185 UINT32 NumberOfTargetProximityDomains;\r
2186 UINT8 Reserved2[4];\r
2187 UINT64 EntryBaseUnit;\r
2188} EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;\r
2189\r
2190///\r
2191/// Memory Side Cache Information Structure cache attributes\r
2192///\r
2193typedef struct {\r
2194 UINT32 TotalCacheLevels : 4;\r
2195 UINT32 CacheLevel : 4;\r
2196 UINT32 CacheAssociativity : 4;\r
2197 UINT32 WritePolicy : 4;\r
2198 UINT32 CacheLineSize : 16;\r
2199} EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;\r
2200\r
2201///\r
2202/// Memory Side Cache Information Structure\r
2203///\r
2204typedef struct {\r
2205 UINT16 Type;\r
2206 UINT8 Reserved[2];\r
2207 UINT32 Length;\r
2208 UINT32 MemoryProximityDomain;\r
2209 UINT8 Reserved1[4];\r
2210 UINT64 MemorySideCacheSize;\r
2211 EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;\r
2212 UINT8 Reserved2[2];\r
2213 UINT16 NumberOfSmbiosHandles;\r
2214} EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;\r
2215\r
2216///\r
2217/// ERST - Error Record Serialization Table\r
2218///\r
2219typedef struct {\r
2220 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2221 UINT32 SerializationHeaderSize;\r
2222 UINT8 Reserved0[4];\r
2223 UINT32 InstructionEntryCount;\r
2224} EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
2225\r
2226///\r
2227/// ERST Version (as defined in ACPI 6.5 spec.)\r
2228///\r
2229#define EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
2230\r
2231///\r
2232/// ERST Serialization Actions\r
2233///\r
2234#define EFI_ACPI_6_5_ERST_BEGIN_WRITE_OPERATION 0x00\r
2235#define EFI_ACPI_6_5_ERST_BEGIN_READ_OPERATION 0x01\r
2236#define EFI_ACPI_6_5_ERST_BEGIN_CLEAR_OPERATION 0x02\r
2237#define EFI_ACPI_6_5_ERST_END_OPERATION 0x03\r
2238#define EFI_ACPI_6_5_ERST_SET_RECORD_OFFSET 0x04\r
2239#define EFI_ACPI_6_5_ERST_EXECUTE_OPERATION 0x05\r
2240#define EFI_ACPI_6_5_ERST_CHECK_BUSY_STATUS 0x06\r
2241#define EFI_ACPI_6_5_ERST_GET_COMMAND_STATUS 0x07\r
2242#define EFI_ACPI_6_5_ERST_GET_RECORD_IDENTIFIER 0x08\r
2243#define EFI_ACPI_6_5_ERST_SET_RECORD_IDENTIFIER 0x09\r
2244#define EFI_ACPI_6_5_ERST_GET_RECORD_COUNT 0x0A\r
2245#define EFI_ACPI_6_5_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
2246#define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
2247#define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
2248#define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
2249#define EFI_ACPI_6_5_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10\r
2250\r
2251///\r
2252/// ERST Action Command Status\r
2253///\r
2254#define EFI_ACPI_6_5_ERST_STATUS_SUCCESS 0x00\r
2255#define EFI_ACPI_6_5_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
2256#define EFI_ACPI_6_5_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
2257#define EFI_ACPI_6_5_ERST_STATUS_FAILED 0x03\r
2258#define EFI_ACPI_6_5_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
2259#define EFI_ACPI_6_5_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
2260\r
2261///\r
2262/// ERST Serialization Instructions\r
2263///\r
2264#define EFI_ACPI_6_5_ERST_READ_REGISTER 0x00\r
2265#define EFI_ACPI_6_5_ERST_READ_REGISTER_VALUE 0x01\r
2266#define EFI_ACPI_6_5_ERST_WRITE_REGISTER 0x02\r
2267#define EFI_ACPI_6_5_ERST_WRITE_REGISTER_VALUE 0x03\r
2268#define EFI_ACPI_6_5_ERST_NOOP 0x04\r
2269#define EFI_ACPI_6_5_ERST_LOAD_VAR1 0x05\r
2270#define EFI_ACPI_6_5_ERST_LOAD_VAR2 0x06\r
2271#define EFI_ACPI_6_5_ERST_STORE_VAR1 0x07\r
2272#define EFI_ACPI_6_5_ERST_ADD 0x08\r
2273#define EFI_ACPI_6_5_ERST_SUBTRACT 0x09\r
2274#define EFI_ACPI_6_5_ERST_ADD_VALUE 0x0A\r
2275#define EFI_ACPI_6_5_ERST_SUBTRACT_VALUE 0x0B\r
2276#define EFI_ACPI_6_5_ERST_STALL 0x0C\r
2277#define EFI_ACPI_6_5_ERST_STALL_WHILE_TRUE 0x0D\r
2278#define EFI_ACPI_6_5_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
2279#define EFI_ACPI_6_5_ERST_GOTO 0x0F\r
2280#define EFI_ACPI_6_5_ERST_SET_SRC_ADDRESS_BASE 0x10\r
2281#define EFI_ACPI_6_5_ERST_SET_DST_ADDRESS_BASE 0x11\r
2282#define EFI_ACPI_6_5_ERST_MOVE_DATA 0x12\r
2283\r
2284///\r
2285/// ERST Instruction Flags\r
2286///\r
2287#define EFI_ACPI_6_5_ERST_PRESERVE_REGISTER 0x01\r
2288\r
2289///\r
2290/// ERST Serialization Instruction Entry\r
2291///\r
2292typedef struct {\r
2293 UINT8 SerializationAction;\r
2294 UINT8 Instruction;\r
2295 UINT8 Flags;\r
2296 UINT8 Reserved0;\r
2297 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2298 UINT64 Value;\r
2299 UINT64 Mask;\r
2300} EFI_ACPI_6_5_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
2301\r
2302///\r
2303/// EINJ - Error Injection Table\r
2304///\r
2305typedef struct {\r
2306 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2307 UINT32 InjectionHeaderSize;\r
2308 UINT8 InjectionFlags;\r
2309 UINT8 Reserved0[3];\r
2310 UINT32 InjectionEntryCount;\r
2311} EFI_ACPI_6_5_ERROR_INJECTION_TABLE_HEADER;\r
2312\r
2313///\r
2314/// EINJ Version (as defined in ACPI 6.5 spec.)\r
2315///\r
2316#define EFI_ACPI_6_5_ERROR_INJECTION_TABLE_REVISION 0x01\r
2317\r
2318///\r
2319/// EINJ Error Injection Actions\r
2320///\r
2321#define EFI_ACPI_6_5_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
2322#define EFI_ACPI_6_5_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
2323#define EFI_ACPI_6_5_EINJ_SET_ERROR_TYPE 0x02\r
2324#define EFI_ACPI_6_5_EINJ_GET_ERROR_TYPE 0x03\r
2325#define EFI_ACPI_6_5_EINJ_END_OPERATION 0x04\r
2326#define EFI_ACPI_6_5_EINJ_EXECUTE_OPERATION 0x05\r
2327#define EFI_ACPI_6_5_EINJ_CHECK_BUSY_STATUS 0x06\r
2328#define EFI_ACPI_6_5_EINJ_GET_COMMAND_STATUS 0x07\r
2329#define EFI_ACPI_6_5_EINJ_TRIGGER_ERROR 0xFF\r
2330\r
2331///\r
2332/// EINJ Action Command Status\r
2333///\r
2334#define EFI_ACPI_6_5_EINJ_STATUS_SUCCESS 0x00\r
2335#define EFI_ACPI_6_5_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
2336#define EFI_ACPI_6_5_EINJ_STATUS_INVALID_ACCESS 0x02\r
2337\r
2338///\r
2339/// EINJ Error Type Definition\r
2340///\r
2341#define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
2342#define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
2343#define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
2344#define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
2345#define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
2346#define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
2347#define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
2348#define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
2349#define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
2350#define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
2351#define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
2352#define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
2353\r
2354///\r
2355/// EINJ Injection Instructions\r
2356///\r
2357#define EFI_ACPI_6_5_EINJ_READ_REGISTER 0x00\r
2358#define EFI_ACPI_6_5_EINJ_READ_REGISTER_VALUE 0x01\r
2359#define EFI_ACPI_6_5_EINJ_WRITE_REGISTER 0x02\r
2360#define EFI_ACPI_6_5_EINJ_WRITE_REGISTER_VALUE 0x03\r
2361#define EFI_ACPI_6_5_EINJ_NOOP 0x04\r
2362\r
2363///\r
2364/// EINJ Instruction Flags\r
2365///\r
2366#define EFI_ACPI_6_5_EINJ_PRESERVE_REGISTER 0x01\r
2367\r
2368///\r
2369/// EINJ Injection Instruction Entry\r
2370///\r
2371typedef struct {\r
2372 UINT8 InjectionAction;\r
2373 UINT8 Instruction;\r
2374 UINT8 Flags;\r
2375 UINT8 Reserved0;\r
2376 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2377 UINT64 Value;\r
2378 UINT64 Mask;\r
2379} EFI_ACPI_6_5_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
2380\r
2381///\r
2382/// EINJ Trigger Action Table\r
2383///\r
2384typedef struct {\r
2385 UINT32 HeaderSize;\r
2386 UINT32 Revision;\r
2387 UINT32 TableSize;\r
2388 UINT32 EntryCount;\r
2389} EFI_ACPI_6_5_EINJ_TRIGGER_ACTION_TABLE;\r
2390\r
2391///\r
2392/// Platform Communications Channel Table (PCCT)\r
2393///\r
2394typedef struct {\r
2395 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2396 UINT32 Flags;\r
2397 UINT64 Reserved;\r
2398} EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
2399\r
2400///\r
2401/// PCCT Version (as defined in ACPI 6.5 spec.)\r
2402///\r
2403#define EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02\r
2404\r
2405///\r
2406/// PCCT Global Flags\r
2407///\r
2408#define EFI_ACPI_6_5_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0\r
2409\r
2410//\r
2411// PCCT Subspace type\r
2412//\r
2413#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2414#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01\r
2415#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02\r
2416#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03\r
2417#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04\r
2418#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_5_HW_REGISTERS_COMMUNICATIONS 0x05\r
2419\r
2420///\r
2421/// PCC Subspace Structure Header\r
2422///\r
2423typedef struct {\r
2424 UINT8 Type;\r
2425 UINT8 Length;\r
2426} EFI_ACPI_6_5_PCCT_SUBSPACE_HEADER;\r
2427\r
2428///\r
2429/// Generic Communications Subspace Structure\r
2430///\r
2431typedef struct {\r
2432 UINT8 Type;\r
2433 UINT8 Length;\r
2434 UINT8 Reserved[6];\r
2435 UINT64 BaseAddress;\r
2436 UINT64 AddressLength;\r
2437 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2438 UINT64 DoorbellPreserve;\r
2439 UINT64 DoorbellWrite;\r
2440 UINT32 NominalLatency;\r
2441 UINT32 MaximumPeriodicAccessRate;\r
2442 UINT16 MinimumRequestTurnaroundTime;\r
2443} EFI_ACPI_6_5_PCCT_SUBSPACE_GENERIC;\r
2444\r
2445///\r
2446/// Generic Communications Channel Shared Memory Region\r
2447///\r
2448\r
2449typedef struct {\r
2450 UINT8 Command;\r
2451 UINT8 Reserved : 7;\r
2452 UINT8 NotifyOnCompletion : 1;\r
2453} EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2454\r
2455typedef struct {\r
2456 UINT8 CommandComplete : 1;\r
2457 UINT8 PlatformInterrupt : 1;\r
2458 UINT8 Error : 1;\r
2459 UINT8 PlatformNotification : 1;\r
2460 UINT8 Reserved : 4;\r
2461 UINT8 Reserved1;\r
2462} EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2463\r
2464typedef struct {\r
2465 UINT32 Signature;\r
2466 EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2467 EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2468} EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2469\r
2470#define EFI_ACPI_6_5_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0\r
2471#define EFI_ACPI_6_5_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1\r
2472\r
2473///\r
2474/// Type 1 HW-Reduced Communications Subspace Structure\r
2475///\r
2476typedef struct {\r
2477 UINT8 Type;\r
2478 UINT8 Length;\r
2479 UINT32 PlatformInterrupt;\r
2480 UINT8 PlatformInterruptFlags;\r
2481 UINT8 Reserved;\r
2482 UINT64 BaseAddress;\r
2483 UINT64 AddressLength;\r
2484 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2485 UINT64 DoorbellPreserve;\r
2486 UINT64 DoorbellWrite;\r
2487 UINT32 NominalLatency;\r
2488 UINT32 MaximumPeriodicAccessRate;\r
2489 UINT16 MinimumRequestTurnaroundTime;\r
2490} EFI_ACPI_6_5_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;\r
2491\r
2492///\r
2493/// Type 2 HW-Reduced Communications Subspace Structure\r
2494///\r
2495typedef struct {\r
2496 UINT8 Type;\r
2497 UINT8 Length;\r
2498 UINT32 PlatformInterrupt;\r
2499 UINT8 PlatformInterruptFlags;\r
2500 UINT8 Reserved;\r
2501 UINT64 BaseAddress;\r
2502 UINT64 AddressLength;\r
2503 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2504 UINT64 DoorbellPreserve;\r
2505 UINT64 DoorbellWrite;\r
2506 UINT32 NominalLatency;\r
2507 UINT32 MaximumPeriodicAccessRate;\r
2508 UINT16 MinimumRequestTurnaroundTime;\r
2509 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2510 UINT64 PlatformInterruptAckPreserve;\r
2511 UINT64 PlatformInterruptAckWrite;\r
2512} EFI_ACPI_6_5_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;\r
2513\r
2514///\r
2515/// Type 3 Extended PCC Subspace Structure\r
2516///\r
2517typedef struct {\r
2518 UINT8 Type;\r
2519 UINT8 Length;\r
2520 UINT32 PlatformInterrupt;\r
2521 UINT8 PlatformInterruptFlags;\r
2522 UINT8 Reserved;\r
2523 UINT64 BaseAddress;\r
2524 UINT32 AddressLength;\r
2525 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2526 UINT64 DoorbellPreserve;\r
2527 UINT64 DoorbellWrite;\r
2528 UINT32 NominalLatency;\r
2529 UINT32 MaximumPeriodicAccessRate;\r
2530 UINT32 MinimumRequestTurnaroundTime;\r
2531 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2532 UINT64 PlatformInterruptAckPreserve;\r
2533 UINT64 PlatformInterruptAckSet;\r
2534 UINT8 Reserved1[8];\r
2535 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2536 UINT64 CommandCompleteCheckMask;\r
2537 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;\r
2538 UINT64 CommandCompleteUpdatePreserve;\r
2539 UINT64 CommandCompleteUpdateSet;\r
2540 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2541 UINT64 ErrorStatusMask;\r
2542} EFI_ACPI_6_5_PCCT_SUBSPACE_3_EXTENDED_PCC;\r
2543\r
2544///\r
2545/// Type 4 Extended PCC Subspace Structure\r
2546///\r
2547typedef EFI_ACPI_6_5_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_5_PCCT_SUBSPACE_4_EXTENDED_PCC;\r
2548\r
2549#define EFI_ACPI_6_5_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0\r
2550\r
2551typedef struct {\r
2552 UINT32 Signature;\r
2553 UINT32 Flags;\r
2554 UINT32 Length;\r
2555 UINT32 Command;\r
2556} EFI_ACPI_6_5_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;\r
2557\r
2558///\r
2559/// Type 5 HW Registers based Communications Subspace Structure\r
2560///\r
2561typedef struct {\r
2562 UINT8 Type;\r
2563 UINT8 Length;\r
2564 UINT16 Version;\r
2565 UINT64 BaseAddress;\r
2566 UINT64 SharedMemoryRangeLength;\r
2567 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2568 UINT64 DoorbellPreserve;\r
2569 UINT64 DoorbellWrite;\r
2570 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2571 UINT64 CommandCompleteCheckMask;\r
2572 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2573 UINT64 ErrorStatusMask;\r
2574 UINT32 NominalLatency;\r
2575 UINT32 MinimumRequestTurnaroundTime;\r
2576} EFI_ACPI_6_5_PCCT_SUBSPACE_5_HW_REGISTERS_COMMUNICATIONS;\r
2577\r
2578///\r
2579/// Reduced PCC Subspace Shared Memory Region\r
2580///\r
2581typedef struct {\r
2582 UINT32 Signature;\r
2583 // UINT8 CommunicationSubspace[];\r
2584} EFI_6_5_PCCT_REDUCED_PCC_SUBSPACE_SHARED_MEMORY_REGION;\r
2585\r
2586///\r
2587/// Platform Debug Trigger Table (PDTT)\r
2588///\r
2589typedef struct {\r
2590 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2591 UINT8 TriggerCount;\r
2592 UINT8 Reserved[3];\r
2593 UINT32 TriggerIdentifierArrayOffset;\r
2594} EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;\r
2595\r
2596///\r
2597/// PDTT Revision (as defined in ACPI 6.5 spec.)\r
2598///\r
2599#define EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00\r
2600\r
2601///\r
2602/// PDTT Platform Communication Channel Identifier Structure\r
2603///\r
2604typedef struct {\r
2605 UINT16 SubChannelIdentifer : 8;\r
2606 UINT16 Runtime : 1;\r
2607 UINT16 WaitForCompletion : 1;\r
2608 UINT16 TriggerOrder : 1;\r
2609 UINT16 Reserved : 5;\r
2610} EFI_ACPI_6_5_PDTT_PCC_IDENTIFIER;\r
2611\r
2612///\r
2613/// PCC Commands Codes used by Platform Debug Trigger Table\r
2614///\r
2615#define EFI_ACPI_6_5_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00\r
2616#define EFI_ACPI_6_5_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01\r
2617\r
2618///\r
2619/// PDTT Platform Communication Channel\r
2620///\r
2621typedef EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_5_PDTT_PCC;\r
2622\r
2623///\r
2624/// Processor Properties Topology Table (PPTT)\r
2625///\r
2626typedef struct {\r
2627 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2628} EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;\r
2629\r
2630///\r
2631/// PPTT Revision (as defined in ACPI 6.5 spec.)\r
2632///\r
2633#define EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x03\r
2634\r
2635///\r
2636/// PPTT types\r
2637///\r
2638#define EFI_ACPI_6_5_PPTT_TYPE_PROCESSOR 0x00\r
2639#define EFI_ACPI_6_5_PPTT_TYPE_CACHE 0x01\r
2640\r
2641///\r
2642/// PPTT Structure Header\r
2643///\r
2644typedef struct {\r
2645 UINT8 Type;\r
2646 UINT8 Length;\r
2647 UINT8 Reserved[2];\r
2648} EFI_ACPI_6_5_PPTT_STRUCTURE_HEADER;\r
2649\r
2650///\r
2651/// For PPTT struct processor flags\r
2652///\r
2653#define EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL 0x0\r
2654#define EFI_ACPI_6_5_PPTT_PACKAGE_PHYSICAL 0x1\r
2655#define EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID 0x0\r
2656#define EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID 0x1\r
2657#define EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD 0x0\r
2658#define EFI_ACPI_6_5_PPTT_PROCESSOR_IS_THREAD 0x1\r
2659#define EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF 0x0\r
2660#define EFI_ACPI_6_5_PPTT_NODE_IS_LEAF 0x1\r
2661#define EFI_ACPI_6_5_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0\r
2662#define EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL 0x1\r
2663\r
2664///\r
2665/// Processor hierarchy node structure flags\r
2666///\r
2667typedef struct {\r
2668 UINT32 PhysicalPackage : 1;\r
2669 UINT32 AcpiProcessorIdValid : 1;\r
2670 UINT32 ProcessorIsAThread : 1;\r
2671 UINT32 NodeIsALeaf : 1;\r
2672 UINT32 IdenticalImplementation : 1;\r
2673 UINT32 Reserved : 27;\r
2674} EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS;\r
2675\r
2676///\r
2677/// Processor hierarchy node structure\r
2678///\r
2679typedef struct {\r
2680 UINT8 Type;\r
2681 UINT8 Length;\r
2682 UINT8 Reserved[2];\r
2683 EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;\r
2684 UINT32 Parent;\r
2685 UINT32 AcpiProcessorId;\r
2686 UINT32 NumberOfPrivateResources;\r
2687} EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR;\r
2688\r
2689///\r
2690/// For PPTT struct cache flags\r
2691///\r
2692#define EFI_ACPI_6_5_PPTT_CACHE_SIZE_INVALID 0x0\r
2693#define EFI_ACPI_6_5_PPTT_CACHE_SIZE_VALID 0x1\r
2694#define EFI_ACPI_6_5_PPTT_NUMBER_OF_SETS_INVALID 0x0\r
2695#define EFI_ACPI_6_5_PPTT_NUMBER_OF_SETS_VALID 0x1\r
2696#define EFI_ACPI_6_5_PPTT_ASSOCIATIVITY_INVALID 0x0\r
2697#define EFI_ACPI_6_5_PPTT_ASSOCIATIVITY_VALID 0x1\r
2698#define EFI_ACPI_6_5_PPTT_ALLOCATION_TYPE_INVALID 0x0\r
2699#define EFI_ACPI_6_5_PPTT_ALLOCATION_TYPE_VALID 0x1\r
2700#define EFI_ACPI_6_5_PPTT_CACHE_TYPE_INVALID 0x0\r
2701#define EFI_ACPI_6_5_PPTT_CACHE_TYPE_VALID 0x1\r
2702#define EFI_ACPI_6_5_PPTT_WRITE_POLICY_INVALID 0x0\r
2703#define EFI_ACPI_6_5_PPTT_WRITE_POLICY_VALID 0x1\r
2704#define EFI_ACPI_6_5_PPTT_LINE_SIZE_INVALID 0x0\r
2705#define EFI_ACPI_6_5_PPTT_LINE_SIZE_VALID 0x1\r
2706#define EFI_ACPI_6_5_PPTT_CACHE_ID_INVALID 0x0\r
2707#define EFI_ACPI_6_5_PPTT_CACHE_ID_VALID 0x1\r
2708\r
2709///\r
2710/// Cache Type Structure flags\r
2711///\r
2712typedef struct {\r
2713 UINT32 SizePropertyValid : 1;\r
2714 UINT32 NumberOfSetsValid : 1;\r
2715 UINT32 AssociativityValid : 1;\r
2716 UINT32 AllocationTypeValid : 1;\r
2717 UINT32 CacheTypeValid : 1;\r
2718 UINT32 WritePolicyValid : 1;\r
2719 UINT32 LineSizeValid : 1;\r
2720 UINT32 CacheIdValid : 1;\r
2721 UINT32 Reserved : 24;\r
2722} EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_FLAGS;\r
2723\r
2724///\r
2725/// For cache attributes\r
2726///\r
2727#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0\r
2728#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1\r
2729#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2\r
2730#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0\r
2731#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1\r
2732#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2\r
2733#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0\r
2734#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1\r
2735\r
2736///\r
2737/// Cache Type Structure cache attributes\r
2738///\r
2739typedef struct {\r
2740 UINT8 AllocationType : 2;\r
2741 UINT8 CacheType : 2;\r
2742 UINT8 WritePolicy : 1;\r
2743 UINT8 Reserved : 3;\r
2744} EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_ATTRIBUTES;\r
2745\r
2746///\r
2747/// Cache Type Structure\r
2748///\r
2749typedef struct {\r
2750 UINT8 Type;\r
2751 UINT8 Length;\r
2752 UINT8 Reserved[2];\r
2753 EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_FLAGS Flags;\r
2754 UINT32 NextLevelOfCache;\r
2755 UINT32 Size;\r
2756 UINT32 NumberOfSets;\r
2757 UINT8 Associativity;\r
2758 EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;\r
2759 UINT16 LineSize;\r
2760 UINT32 CacheId;\r
2761} EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE;\r
2762\r
2763///\r
2764/// Platform Health Assessment Table (PHAT) Format\r
2765///\r
2766typedef struct {\r
2767 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2768 // UINT8 PlatformTelemetryRecords[];\r
2769} EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE;\r
2770\r
2771#define EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE_REVISION 0x01\r
2772\r
2773///\r
2774/// PHAT Record Format\r
2775///\r
2776typedef struct {\r
2777 UINT16 PlatformHealthAssessmentRecordType;\r
2778 UINT16 RecordLength;\r
2779 UINT8 Revision;\r
2780 // UINT8 Data[];\r
2781} EFI_ACPI_6_5_PHAT_RECORD;\r
2782\r
2783///\r
2784/// PHAT Record Type Format\r
2785///\r
2786#define EFI_ACPI_6_5_PHAT_RECORD_TYPE_FIRMWARE_VERSION_DATA_RECORD 0x0000\r
2787#define EFI_ACPI_6_5_PHAT_RECORD_TYPE_FIRMWARE_HEALTH_DATA_RECORD 0x0001\r
2788\r
2789///\r
2790/// PHAT Version Element\r
2791///\r
2792typedef struct {\r
2793 GUID ComponentId;\r
2794 UINT64 VersionValue;\r
2795 UINT32 ProducerId;\r
2796} EFI_ACPI_6_5_PHAT_VERSION_ELEMENT;\r
2797\r
2798///\r
2799/// PHAT Firmware Version Data Record\r
2800///\r
2801typedef struct {\r
2802 UINT16 PlatformRecordType;\r
2803 UINT16 RecordLength;\r
2804 UINT8 Revision;\r
2805 UINT8 Reserved[3];\r
2806 UINT32 RecordCount;\r
2807 // UINT8 PhatVersionElement[];\r
2808} EFI_ACPI_6_5_PHAT_FIRMWARE_VERISON_DATA_RECORD;\r
2809\r
2810#define EFI_ACPI_6_5_PHAT_FIRMWARE_VERSION_DATA_RECORD_REVISION 0x01\r
2811\r
2812///\r
2813/// Firmware Health Data Record Structure\r
2814///\r
2815typedef struct {\r
2816 UINT16 PlatformRecordType;\r
2817 UINT16 RecordLength;\r
2818 UINT8 Revision;\r
2819 UINT16 Reserved;\r
2820 UINT8 AmHealthy;\r
2821 GUID DeviceSignature;\r
2822 UINT32 DeviceSpecificDataOffset;\r
2823 // UINT8 DevicePath[];\r
2824 // UINT8 DeviceSpecificData[];\r
2825} EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_STRUCTURE;\r
2826\r
2827#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_REVISION 0x01\r
2828\r
2829///\r
2830/// Firmware Health Data Record device health state\r
2831///\r
2832#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ERRORS_FOUND 0x00\r
2833#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_NO_ERRORS_FOUND 0x01\r
2834#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_UNKNOWN 0x02\r
2835#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ADVISORY 0x03\r
2836\r
2837//\r
2838// Known table signatures\r
2839//\r
2840\r
2841///\r
2842/// "RSD PTR " Root System Description Pointer\r
2843///\r
2844#define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
2845\r
2846///\r
2847/// "APIC" Multiple APIC Description Table\r
2848///\r
2849#define EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2850\r
2851///\r
2852/// "APMT" Arm Performance Monitoring Unit Table\r
2853///\r
2854#define EFI_ACPI_6_5_ARM_PERFORMANCE_MONITORING_UNIT_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'M', 'T')\r
2855\r
2856///\r
2857/// "BERT" Boot Error Record Table\r
2858///\r
2859#define EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2860\r
2861///\r
2862/// "BGRT" Boot Graphics Resource Table\r
2863///\r
2864#define EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2865\r
2866///\r
2867/// "CDIT" Component Distance Information Table\r
2868///\r
2869#define EFI_ACPI_6_5_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T')\r
2870\r
2871///\r
2872/// "CPEP" Corrected Platform Error Polling Table\r
2873///\r
2874#define EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2875\r
2876///\r
2877/// "CRAT" Component Resource Attribute Table\r
2878///\r
2879#define EFI_ACPI_6_5_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T')\r
2880\r
2881///\r
2882/// "DSDT" Differentiated System Description Table\r
2883///\r
2884#define EFI_ACPI_6_5_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2885\r
2886///\r
2887/// "ECDT" Embedded Controller Boot Resources Table\r
2888///\r
2889#define EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2890\r
2891///\r
2892/// "EINJ" Error Injection Table\r
2893///\r
2894#define EFI_ACPI_6_5_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2895\r
2896///\r
2897/// "ERST" Error Record Serialization Table\r
2898///\r
2899#define EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2900\r
2901///\r
2902/// "FACP" Fixed ACPI Description Table\r
2903///\r
2904#define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2905\r
2906///\r
2907/// "FACS" Firmware ACPI Control Structure\r
2908///\r
2909#define EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
2910\r
2911///\r
2912/// "FPDT" Firmware Performance Data Table\r
2913///\r
2914#define EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
2915\r
2916///\r
2917/// "GTDT" Generic Timer Description Table\r
2918///\r
2919#define EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
2920\r
2921///\r
2922/// "HEST" Hardware Error Source Table\r
2923///\r
2924#define EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
2925\r
2926///\r
2927/// "HMAT" Heterogeneous Memory Attribute Table\r
2928///\r
2929#define EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')\r
2930\r
2931///\r
2932/// "MPST" Memory Power State Table\r
2933///\r
2934#define EFI_ACPI_6_5_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
2935\r
2936///\r
2937/// "MSCT" Maximum System Characteristics Table\r
2938///\r
2939#define EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
2940\r
2941///\r
2942/// "NFIT" NVDIMM Firmware Interface Table\r
2943///\r
2944#define EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
2945\r
2946///\r
2947/// "PDTT" Platform Debug Trigger Table\r
2948///\r
2949#define EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')\r
2950\r
2951///\r
2952/// "PMTT" Platform Memory Topology Table\r
2953///\r
2954#define EFI_ACPI_6_5_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
2955\r
2956///\r
2957/// "PPTT" Processor Properties Topology Table\r
2958///\r
2959#define EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')\r
2960\r
2961///\r
2962/// "PSDT" Persistent System Description Table\r
2963///\r
2964#define EFI_ACPI_6_5_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
2965\r
2966///\r
2967/// "RASF" ACPI RAS Feature Table\r
2968///\r
2969#define EFI_ACPI_6_5_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
2970\r
2971///\r
2972/// "RSDT" Root System Description Table\r
2973///\r
2974#define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
2975\r
2976///\r
2977/// "SBST" Smart Battery Specification Table\r
2978///\r
2979#define EFI_ACPI_6_5_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
2980\r
2981///\r
2982/// "SDEV" Secure DEVices Table\r
2983///\r
2984#define EFI_ACPI_6_5_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')\r
2985\r
2986///\r
2987/// "SLIT" System Locality Information Table\r
2988///\r
2989#define EFI_ACPI_6_5_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2990\r
2991///\r
2992/// "SRAT" System Resource Affinity Table\r
2993///\r
2994#define EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2995\r
2996///\r
2997/// "SSDT" Secondary System Description Table\r
2998///\r
2999#define EFI_ACPI_6_5_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
3000\r
3001///\r
3002/// "XSDT" Extended System Description Table\r
3003///\r
3004#define EFI_ACPI_6_5_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
3005\r
3006///\r
3007/// "BOOT" MS Simple Boot Spec\r
3008///\r
3009#define EFI_ACPI_6_5_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
3010\r
3011///\r
3012/// "CSRT" MS Core System Resource Table\r
3013///\r
3014#define EFI_ACPI_6_5_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
3015\r
3016///\r
3017/// "DBG2" MS Debug Port 2 Spec\r
3018///\r
3019#define EFI_ACPI_6_5_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
3020\r
3021///\r
3022/// "DBGP" MS Debug Port Spec\r
3023///\r
3024#define EFI_ACPI_6_5_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
3025\r
3026///\r
3027/// "DMAR" DMA Remapping Table\r
3028///\r
3029#define EFI_ACPI_6_5_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
3030\r
3031///\r
3032/// "DRTM" Dynamic Root of Trust for Measurement Table\r
3033///\r
3034#define EFI_ACPI_6_5_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
3035\r
3036///\r
3037/// "ETDT" Event Timer Description Table\r
3038///\r
3039#define EFI_ACPI_6_5_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
3040\r
3041///\r
3042/// "HPET" IA-PC High Precision Event Timer Table\r
3043///\r
3044#define EFI_ACPI_6_5_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
3045\r
3046///\r
3047/// "iBFT" iSCSI Boot Firmware Table\r
3048///\r
3049#define EFI_ACPI_6_5_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
3050\r
3051///\r
3052/// "IORT" I/O Remapping Table\r
3053///\r
3054#define EFI_ACPI_6_5_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
3055\r
3056///\r
3057/// "IVRS" I/O Virtualization Reporting Structure\r
3058///\r
3059#define EFI_ACPI_6_5_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
3060\r
3061///\r
3062/// "LPIT" Low Power Idle Table\r
3063///\r
3064#define EFI_ACPI_6_5_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
3065\r
3066///\r
3067/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
3068///\r
3069#define EFI_ACPI_6_5_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
3070\r
3071///\r
3072/// "MCHI" Management Controller Host Interface Table\r
3073///\r
3074#define EFI_ACPI_6_5_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
3075\r
3076///\r
3077/// "MSDM" MS Data Management Table\r
3078///\r
3079#define EFI_ACPI_6_5_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
3080\r
3081///\r
3082/// "PCCT" Platform Communications Channel Table\r
3083///\r
3084#define EFI_ACPI_6_5_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')\r
3085\r
3086///\r
3087/// "PHAT" Platform Health Assessment Table\r
3088///\r
3089#define EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE_SIGNATURE SIGNATURE_32('P', 'H', 'A', 'T')\r
3090\r
3091///\r
3092/// "SDEI" Software Delegated Exceptions Interface Table\r
3093///\r
3094#define EFI_ACPI_6_5_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')\r
3095\r
3096///\r
3097/// "SLIC" MS Software Licensing Table Specification\r
3098///\r
3099#define EFI_ACPI_6_5_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
3100\r
3101///\r
3102/// "SPCR" Serial Port Concole Redirection Table\r
3103///\r
3104#define EFI_ACPI_6_5_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
3105\r
3106///\r
3107/// "SPMI" Server Platform Management Interface Table\r
3108///\r
3109#define EFI_ACPI_6_5_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
3110\r
3111///\r
3112/// "STAO" _STA Override Table\r
3113///\r
3114#define EFI_ACPI_6_5_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
3115\r
3116///\r
3117/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
3118///\r
3119#define EFI_ACPI_6_5_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
3120\r
3121///\r
3122/// "TPM2" Trusted Computing Platform 1 Table\r
3123///\r
3124#define EFI_ACPI_6_5_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
3125\r
3126///\r
3127/// "UEFI" UEFI ACPI Data Table\r
3128///\r
3129#define EFI_ACPI_6_5_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
3130\r
3131///\r
3132/// "WAET" Windows ACPI Emulated Devices Table\r
3133///\r
3134#define EFI_ACPI_6_5_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
3135\r
3136///\r
3137/// "WDAT" Watchdog Action Table\r
3138///\r
3139#define EFI_ACPI_6_5_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
3140\r
3141///\r
3142/// "WDRT" Watchdog Resource Table\r
3143///\r
3144#define EFI_ACPI_6_5_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
3145\r
3146///\r
3147/// "WPBT" MS Platform Binary Table\r
3148///\r
3149#define EFI_ACPI_6_5_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
3150\r
3151///\r
3152/// "WSMT" Windows SMM Security Mitigation Table\r
3153///\r
3154#define EFI_ACPI_6_5_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')\r
3155\r
3156///\r
3157/// "XENV" Xen Project Table\r
3158///\r
3159#define EFI_ACPI_6_5_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
3160\r
3161#pragma pack()\r
3162\r
3163#endif\r
EFI Development Kit II mirror for PVE