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1 | /** @file\r |
2 | This PPI opens or closes an I/O aperture in a ISA HOST controller.\r | |
3 | \r | |
4 | Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials \r | |
6 | are licensed and made available under the terms and conditions of the BSD License \r | |
7 | which accompanies this distribution. The full text of the license may be found at \r | |
8 | http://opensource.org/licenses/bsd-license.php \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | \r | |
13 | @par Revision Reference:\r | |
14 | This PPI is from PI Version 1.2.1.\r | |
15 | \r | |
16 | **/\r | |
17 | \r | |
18 | #ifndef __ISA_HC_PPI_H__\r | |
19 | #define __ISA_HC_PPI_H__\r | |
20 | \r | |
21 | #define EFI_ISA_HC_PPI_GUID \\r | |
22 | { \\r | |
23 | 0x8d48bd70, 0xc8a3, 0x4c06, {0x90, 0x1b, 0x74, 0x79, 0x46, 0xaa, 0xc3, 0x58} \\r | |
24 | }\r | |
25 | \r | |
26 | typedef struct _EFI_ISA_HC_PPI EFI_ISA_HC_PPI;\r | |
27 | typedef struct _EFI_ISA_HC_PPI *PEFI_ISA_HC_PPI;\r | |
28 | \r | |
29 | /**\r | |
30 | Open I/O aperture.\r | |
31 | \r | |
32 | This function opens an I/O aperture in a ISA Host Controller for the I/O\r | |
33 | addresses specified by IoAddress to IoAddress + IoLength - 1. It is possible\r | |
34 | that more than one caller may be assigned to the same aperture.\r | |
35 | It may be possible that a single hardware aperture may be used for more than\r | |
36 | one device. This function tracks the number of times that each aperture is \r | |
37 | referenced, and doesa not close the hardware aperture (via CloseIoAperture())\r | |
38 | until there are no more references to it.\r | |
39 | \r | |
40 | @param This A pointer to this instance of the EFI_ISA_HC_PPI.\r | |
41 | @param IoAddress An unsigned integer that specifies the first byte of\r | |
42 | the I/O space required.\r | |
43 | @param IoLength An unsigned integer that specifies the number of\r | |
44 | bytes of the I/O space required.\r | |
45 | @param IoApertureHandle A pointer to the returned I/O aperture handle.\r | |
46 | This value can be used on subsequent calls to CloseIoAperture().\r | |
47 | \r | |
48 | @retval EFI_SUCCESS The I/O aperture was opened successfully.\r | |
49 | @retval EFI_UNSUPPORTED The ISA Host Controller is a subtractive-decode controller.\r | |
50 | @retval EFI_OUT_OF_RESOURCES There is no available I/O aperture.\r | |
51 | **/\r | |
52 | typedef\r | |
53 | EFI_STATUS\r | |
54 | (EFIAPI *EFI_PEI_ISA_HC_OPEN_IO) (\r | |
55 | IN CONST EFI_ISA_HC_PPI *This,\r | |
56 | IN UINT16 IoAddress,\r | |
57 | IN UINT16 IoLength,\r | |
58 | OUT UINT64 *IoApertureHandle\r | |
59 | );\r | |
60 | \r | |
61 | /**\r | |
62 | Close I/O aperture.\r | |
63 | \r | |
64 | This function closes a previously opened I/O aperture handle. If there are no\r | |
65 | more I/O aperture handles that refer to the hardware I/O aperture resource,\r | |
66 | then the hardware I/O aperture is closed.\r | |
67 | It may be possible that a single hardware aperture may be used for more than\r | |
68 | one device. This function tracks the number of times that each aperture is\r | |
69 | referenced, and does not close the hardware aperture (via CloseIoAperture())\r | |
70 | until there are no more references to it.\r | |
71 | \r | |
72 | @param This A pointer to this instance of the EFI_ISA_HC_PPI.\r | |
73 | @param IoApertureHandle The I/O aperture handle previously returned from a\r | |
74 | call to OpenIoAperture().\r | |
75 | \r | |
76 | @retval EFI_SUCCESS The I/O aperture was closed successfully.\r | |
77 | **/ \r | |
78 | typedef\r | |
79 | EFI_STATUS\r | |
80 | (EFIAPI *EFI_PEI_ISA_HC_CLOSE_IO) (\r | |
81 | IN CONST EFI_ISA_HC_PPI *This,\r | |
82 | IN UINT64 IoApertureHandle\r | |
83 | );\r | |
84 | \r | |
85 | ///\r | |
86 | /// This PPI provides functions for opening or closing an I/O aperture.\r | |
87 | ///\r | |
88 | struct _EFI_ISA_HC_PPI {\r | |
89 | ///\r | |
90 | /// An unsigned integer that specifies the version of the PPI structure.\r | |
91 | ///\r | |
92 | UINT32 Version;\r | |
93 | ///\r | |
94 | /// The address of the ISA/LPC Bridge device.\r | |
95 | /// For PCI, this is the segment, bus, device and function of the a ISA/LPC\r | |
96 | /// Bridge device.\r | |
97 | ///\r | |
98 | /// If bits 24-31 are 0, then the definition is:\r | |
99 | /// Bits 0:2 - Function\r | |
100 | /// Bits 3-7 - Device\r | |
101 | /// Bits 8:15 - Bus\r | |
102 | /// Bits 16-23 - Segment\r | |
103 | /// Bits 24-31 - Bus Type\r | |
104 | /// If bits 24-31 are 0xff, then the definition is platform-specific.\r | |
105 | ///\r | |
106 | UINT32 Address;\r | |
107 | ///\r | |
108 | /// Opens an aperture on a positive-decode ISA Host Controller.\r | |
109 | ///\r | |
110 | EFI_PEI_ISA_HC_OPEN_IO OpenIoAperture;\r | |
111 | ///\r | |
112 | /// Closes an aperture on a positive-decode ISA Host Controller.\r | |
113 | ///\r | |
114 | EFI_PEI_ISA_HC_CLOSE_IO CloseIoAperture;\r | |
115 | };\r | |
116 | \r | |
117 | extern EFI_GUID gEfiIsaHcPpiGuid;\r | |
118 | \r | |
119 | #endif \r |