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8c5f799b JF |
1 | /** @file\r |
2 | This file declares Sec Platform Information2 PPI.\r | |
3 | \r | |
4 | This service is the primary handoff state into the PEI Foundation.\r | |
5 | This service abstracts platform-specific information for many CPU's.\r | |
6 | \r | |
1f611c55 | 7 | Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r |
8c5f799b JF |
8 | This program and the accompanying materials are licensed and made available under\r |
9 | the terms and conditions of the BSD License that accompanies this distribution.\r | |
10 | The full text of the license may be found at\r | |
11 | http://opensource.org/licenses/bsd-license.php.\r | |
12 | \r | |
13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
15 | \r | |
16 | @par Revision Reference:\r | |
1f611c55 | 17 | This PPI is introduced from PI Version 1.4.\r |
8c5f799b JF |
18 | \r |
19 | **/\r | |
20 | \r | |
21 | #ifndef __SEC_PLATFORM_INFORMATION2_PPI_H__\r | |
22 | #define __SEC_PLATFORM_INFORMATION2_PPI_H__\r | |
23 | \r | |
24 | #include <Ppi/SecPlatformInformation.h>\r | |
25 | \r | |
26 | #define EFI_SEC_PLATFORM_INFORMATION2_GUID \\r | |
27 | { \\r | |
28 | 0x9e9f374b, 0x8f16, 0x4230, {0x98, 0x24, 0x58, 0x46, 0xee, 0x76, 0x6a, 0x97 } \\r | |
29 | }\r | |
30 | \r | |
31 | typedef struct _EFI_SEC_PLATFORM_INFORMATION2_PPI EFI_SEC_PLATFORM_INFORMATION2_PPI;\r | |
32 | \r | |
33 | ///\r | |
34 | /// EFI_SEC_PLATFORM_INFORMATION_CPU.\r | |
35 | ///\r | |
36 | typedef struct {\r | |
37 | UINT32 CpuLocation;\r | |
38 | EFI_SEC_PLATFORM_INFORMATION_RECORD InfoRecord;\r | |
39 | } EFI_SEC_PLATFORM_INFORMATION_CPU;\r | |
40 | \r | |
41 | ///\r | |
42 | /// EFI_SEC_PLATFORM_INFORMATION_RECORD2.\r | |
43 | ///\r | |
44 | typedef struct {\r | |
45 | ///\r | |
46 | /// The CPU location would be the local APIC ID\r | |
47 | ///\r | |
48 | UINT32 NumberOfCpus;\r | |
49 | EFI_SEC_PLATFORM_INFORMATION_CPU CpuInstance[1];\r | |
50 | } EFI_SEC_PLATFORM_INFORMATION_RECORD2;\r | |
51 | \r | |
52 | /**\r | |
53 | This interface conveys state information out of the Security (SEC) phase into PEI.\r | |
54 | \r | |
55 | This service is published by the SEC phase.\r | |
56 | \r | |
57 | @param PeiServices The pointer to the PEI Services Table.\r | |
58 | @param StructureSize The pointer to the variable describing size of the input buffer.\r | |
59 | @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.\r | |
60 | \r | |
61 | @retval EFI_SUCCESS The data was successfully returned.\r | |
62 | @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to\r | |
63 | hold the record is returned in StructureSize.\r | |
64 | \r | |
65 | **/\r | |
66 | typedef\r | |
67 | EFI_STATUS\r | |
68 | (EFIAPI *EFI_SEC_PLATFORM_INFORMATION2)(\r | |
69 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
70 | IN OUT UINT64 *StructureSize,\r | |
71 | OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2\r | |
72 | );\r | |
73 | \r | |
74 | ///\r | |
75 | /// This service abstracts platform-specific information for many CPU's.\r | |
76 | /// It is the multi-processor equivalent of PlatformInformation for\r | |
1f611c55 | 77 | /// implementations that synchronize some, if not all CPU's in the SEC phase.\r |
8c5f799b JF |
78 | ///\r |
79 | struct _EFI_SEC_PLATFORM_INFORMATION2_PPI {\r | |
80 | EFI_SEC_PLATFORM_INFORMATION2 PlatformInformation2;\r | |
81 | };\r | |
82 | \r | |
83 | extern EFI_GUID gEfiSecPlatformInformation2PpiGuid;\r | |
84 | \r | |
85 | #endif\r |