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1 | /** @file\r |
2 | MM PCI Root Bridge IO protocol as defined in the PI 1.5 specification.\r | |
3 | \r | |
4 | This protocol provides PCI I/O and memory access within MM.\r | |
5 | \r | |
6 | Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r | |
9344f092 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
07c6a47e ED |
8 | \r |
9 | **/\r | |
10 | \r | |
11 | #ifndef _MM_PCI_ROOT_BRIDGE_IO_H_\r | |
12 | #define _MM_PCI_ROOT_BRIDGE_IO_H_\r | |
13 | \r | |
14 | #include <Protocol/PciRootBridgeIo.h>\r | |
15 | \r | |
16 | #define EFI_MM_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r | |
17 | { \\r | |
18 | 0x8bc1714d, 0xffcb, 0x41c3, { 0x89, 0xdc, 0x6c, 0x74, 0xd0, 0x6d, 0x98, 0xea } \\r | |
19 | }\r | |
20 | \r | |
21 | ///\r | |
22 | /// This protocol provides the same functionality as the PCI Root Bridge I/O Protocol defined in the\r | |
23 | /// UEFI 2.1 Specifcation, section 13.2, except that the functions for Map() and Unmap() may return\r | |
24 | /// EFI_UNSUPPORTED.\r | |
25 | ///\r | |
2f88bd3a | 26 | typedef EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_MM_PCI_ROOT_BRIDGE_IO_PROTOCOL;\r |
07c6a47e | 27 | \r |
2f88bd3a | 28 | extern EFI_GUID gEfiMmPciRootBridgeIoProtocolGuid;\r |
07c6a47e ED |
29 | \r |
30 | #endif\r |