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d1f95000 | 1 | /** @file\r |
4ca9b6c4 LG |
2 | EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration, \r |
3 | and DMA interfaces that a driver uses to access its PCI controller.\r | |
d1f95000 | 4 | \r |
4ca9b6c4 | 5 | Copyright (c) 2006 - 2008, Intel Corporation \r |
d1f95000 | 6 | All rights reserved. This program and the accompanying materials \r |
7 | are licensed and made available under the terms and conditions of the BSD License \r | |
8 | which accompanies this distribution. The full text of the license may be found at \r | |
9 | http://opensource.org/licenses/bsd-license.php \r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
13 | \r | |
d1f95000 | 14 | **/\r |
15 | \r | |
16 | #ifndef __PCI_IO_H__\r | |
17 | #define __PCI_IO_H__\r | |
18 | \r | |
19 | //\r | |
20 | // Global ID for the PCI I/O Protocol\r | |
21 | //\r | |
22 | #define EFI_PCI_IO_PROTOCOL_GUID \\r | |
23 | { \\r | |
24 | 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \\r | |
25 | }\r | |
26 | \r | |
27 | typedef struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL;\r | |
28 | \r | |
29 | //\r | |
30 | // Prototypes for the PCI I/O Protocol\r | |
31 | //\r | |
32 | typedef enum {\r | |
33 | EfiPciIoWidthUint8 = 0,\r | |
34 | EfiPciIoWidthUint16,\r | |
35 | EfiPciIoWidthUint32,\r | |
36 | EfiPciIoWidthUint64,\r | |
37 | EfiPciIoWidthFifoUint8,\r | |
38 | EfiPciIoWidthFifoUint16,\r | |
39 | EfiPciIoWidthFifoUint32,\r | |
40 | EfiPciIoWidthFifoUint64,\r | |
41 | EfiPciIoWidthFillUint8,\r | |
42 | EfiPciIoWidthFillUint16,\r | |
43 | EfiPciIoWidthFillUint32,\r | |
44 | EfiPciIoWidthFillUint64,\r | |
45 | EfiPciIoWidthMaximum\r | |
46 | } EFI_PCI_IO_PROTOCOL_WIDTH;\r | |
47 | \r | |
48 | //\r | |
49 | // Complete PCI address generater\r | |
50 | //\r | |
51 | #define EFI_PCI_IO_PASS_THROUGH_BAR 0xff // Special BAR that passes a memory or I/O cycle through unchanged\r | |
52 | #define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f // All the following I/O and Memory cycles\r | |
53 | #define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 // I/O cycles 0x0000-0x00FF (10 bit decode)\r | |
54 | #define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 // I/O cycles 0x0100-0x03FF or greater (10 bit decode)\r | |
55 | #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 // I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)\r | |
56 | #define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 // MEM cycles 0xA0000-0xBFFFF (24 bit decode)\r | |
57 | #define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 // I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)\r | |
58 | #define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 // I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)\r | |
59 | #define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 // I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)\r | |
60 | #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 // Map a memory range so write are combined\r | |
61 | #define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 // Enable the I/O decode bit in the PCI Config Header\r | |
62 | #define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 // Enable the Memory decode bit in the PCI Config Header\r | |
63 | #define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 // Enable the DMA bit in the PCI Config Header\r | |
64 | #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 // Map a memory range so all r/w accesses are cached\r | |
65 | #define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 // Disable a memory range\r | |
66 | #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 // Clear for an add-in PCI Device\r | |
67 | #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 // Clear for a physical PCI Option ROM accessed through ROM BAR\r | |
68 | #define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 // Clear for PCI controllers that can not genrate a DAC\r | |
69 | #define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 // I/O cycles 0x0100-0x03FF or greater (16 bit decode)\r | |
70 | #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 // I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)\r | |
71 | #define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x30000 // I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)\r | |
72 | \r | |
73 | #define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)\r | |
74 | #define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)\r | |
75 | \r | |
76 | //\r | |
77 | // *******************************************************\r | |
78 | // EFI_PCI_IO_PROTOCOL_OPERATION\r | |
79 | // *******************************************************\r | |
80 | //\r | |
81 | typedef enum {\r | |
82 | EfiPciIoOperationBusMasterRead,\r | |
83 | EfiPciIoOperationBusMasterWrite,\r | |
84 | EfiPciIoOperationBusMasterCommonBuffer,\r | |
85 | EfiPciIoOperationMaximum\r | |
86 | } EFI_PCI_IO_PROTOCOL_OPERATION;\r | |
87 | \r | |
88 | //\r | |
89 | // *******************************************************\r | |
90 | // EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION\r | |
91 | // *******************************************************\r | |
92 | //\r | |
93 | typedef enum {\r | |
94 | EfiPciIoAttributeOperationGet,\r | |
95 | EfiPciIoAttributeOperationSet,\r | |
96 | EfiPciIoAttributeOperationEnable,\r | |
97 | EfiPciIoAttributeOperationDisable,\r | |
98 | EfiPciIoAttributeOperationSupported,\r | |
99 | EfiPciIoAttributeOperationMaximum\r | |
100 | } EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION;\r | |
101 | \r | |
102 | /** \r | |
103 | Reads from the memory space of a PCI controller. Returns when either the polling exit criteria is\r | |
104 | satisfied or after a defined duration. \r | |
105 | \r | |
106 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r | |
107 | @param Width Signifies the width of the memory or I/O operations.\r | |
108 | @param BarIndex The BAR index of the standard PCI Configuration header to use as the\r | |
109 | base address for the memory operation to perform. \r | |
110 | @param Offset The offset within the selected BAR to start the memory operation.\r | |
111 | @param Mask Mask used for the polling criteria.\r | |
112 | @param Value The comparison value used for the polling exit criteria.\r | |
113 | @param Delay The number of 100 ns units to poll.\r | |
114 | @param Result Pointer to the last value read from the memory location.\r | |
115 | \r | |
116 | @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r | |
117 | @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.\r | |
118 | @retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.\r | |
119 | @retval EFI_TIMEOUT Delay expired before a match occurred.\r | |
120 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
121 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r | |
122 | \r | |
123 | **/\r | |
124 | typedef\r | |
125 | EFI_STATUS\r | |
8b13229b | 126 | (EFIAPI *EFI_PCI_IO_PROTOCOL_POLL_IO_MEM)(\r |
d1f95000 | 127 | IN EFI_PCI_IO_PROTOCOL *This,\r |
128 | IN EFI_PCI_IO_PROTOCOL_WIDTH Width,\r | |
129 | IN UINT8 BarIndex,\r | |
130 | IN UINT64 Offset,\r | |
131 | IN UINT64 Mask,\r | |
132 | IN UINT64 Value,\r | |
133 | IN UINT64 Delay,\r | |
134 | OUT UINT64 *Result\r | |
135 | );\r | |
136 | \r | |
137 | /** \r | |
138 | Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.\r | |
139 | \r | |
140 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r | |
141 | @param Width Signifies the width of the memory or I/O operations.\r | |
142 | @param BarIndex The BAR index of the standard PCI Configuration header to use as the\r | |
143 | base address for the memory or I/O operation to perform. \r | |
144 | @param Offset The offset within the selected BAR to start the memory or I/O operation. \r | |
145 | @param Count The number of memory or I/O operations to perform.\r | |
146 | @param Buffer For read operations, the destination buffer to store the results. For write\r | |
147 | operations, the source buffer to write data from. \r | |
148 | \r | |
149 | @retval EFI_SUCCESS The data was read from or written to the PCI controller.\r | |
150 | @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.\r | |
151 | @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not\r | |
152 | valid for the PCI BAR specified by BarIndex. \r | |
153 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
154 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r | |
155 | \r | |
156 | **/\r | |
157 | typedef\r | |
158 | EFI_STATUS\r | |
8b13229b | 159 | (EFIAPI *EFI_PCI_IO_PROTOCOL_IO_MEM)(\r |
d1f95000 | 160 | IN EFI_PCI_IO_PROTOCOL *This,\r |
161 | IN EFI_PCI_IO_PROTOCOL_WIDTH Width,\r | |
162 | IN UINT8 BarIndex,\r | |
163 | IN UINT64 Offset,\r | |
164 | IN UINTN Count,\r | |
165 | IN OUT VOID *Buffer\r | |
166 | );\r | |
167 | \r | |
168 | typedef struct {\r | |
169 | EFI_PCI_IO_PROTOCOL_IO_MEM Read;\r | |
170 | EFI_PCI_IO_PROTOCOL_IO_MEM Write;\r | |
171 | } EFI_PCI_IO_PROTOCOL_ACCESS;\r | |
172 | \r | |
173 | /** \r | |
174 | Enable a PCI driver to access PCI controller registers in PCI configuration space.\r | |
175 | \r | |
176 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. \r | |
177 | @param Width Signifies the width of the memory operations.\r | |
178 | @param Offset The offset within the PCI configuration space for the PCI controller.\r | |
179 | @param Count The number of PCI configuration operations to perform.\r | |
180 | @param Buffer For read operations, the destination buffer to store the results. For write\r | |
181 | operations, the source buffer to write data from.\r | |
182 | \r | |
183 | \r | |
184 | @retval EFI_SUCCESS The data was read from or written to the PCI controller.\r | |
185 | @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not\r | |
186 | valid for the PCI configuration header of the PCI controller.\r | |
187 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. \r | |
188 | @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid. \r | |
189 | \r | |
190 | **/\r | |
191 | typedef\r | |
192 | EFI_STATUS\r | |
8b13229b | 193 | (EFIAPI *EFI_PCI_IO_PROTOCOL_CONFIG)(\r |
d1f95000 | 194 | IN EFI_PCI_IO_PROTOCOL *This,\r |
195 | IN EFI_PCI_IO_PROTOCOL_WIDTH Width,\r | |
196 | IN UINT32 Offset,\r | |
197 | IN UINTN Count,\r | |
198 | IN OUT VOID *Buffer\r | |
199 | );\r | |
200 | \r | |
201 | typedef struct {\r | |
202 | EFI_PCI_IO_PROTOCOL_CONFIG Read;\r | |
203 | EFI_PCI_IO_PROTOCOL_CONFIG Write;\r | |
204 | } EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS;\r | |
205 | \r | |
206 | /** \r | |
207 | Enables a PCI driver to copy one region of PCI memory space to another region of PCI\r | |
208 | memory space.\r | |
209 | \r | |
210 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r | |
211 | @param Width Signifies the width of the memory operations.\r | |
212 | @param DestBarIndex The BAR index in the standard PCI Configuration header to use as the\r | |
213 | base address for the memory operation to perform. \r | |
214 | @param DestOffset The destination offset within the BAR specified by DestBarIndex to\r | |
215 | start the memory writes for the copy operation. \r | |
216 | @param SrcBarIndex The BAR index in the standard PCI Configuration header to use as the\r | |
217 | base address for the memory operation to perform. \r | |
218 | @param SrcOffset The source offset within the BAR specified by SrcBarIndex to start\r | |
219 | the memory reads for the copy operation. \r | |
220 | @param Count The number of memory operations to perform. Bytes moved is Width\r | |
221 | size * Count, starting at DestOffset and SrcOffset. \r | |
222 | \r | |
223 | @retval EFI_SUCCESS The data was copied from one memory region to another memory region.\r | |
224 | @retval EFI_UNSUPPORTED DestBarIndex not valid for this PCI controller.\r | |
225 | @retval EFI_UNSUPPORTED SrcBarIndex not valid for this PCI controller.\r | |
226 | @retval EFI_UNSUPPORTED The address range specified by DestOffset, Width, and Count\r | |
227 | is not valid for the PCI BAR specified by DestBarIndex. \r | |
228 | @retval EFI_UNSUPPORTED The address range specified by SrcOffset, Width, and Count is\r | |
229 | not valid for the PCI BAR specified by SrcBarIndex. \r | |
230 | @retval EFI_INVALID_PARAMETER Width is invalid.\r | |
231 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
232 | \r | |
233 | **/\r | |
234 | typedef\r | |
235 | EFI_STATUS\r | |
8b13229b | 236 | (EFIAPI *EFI_PCI_IO_PROTOCOL_COPY_MEM)(\r |
d1f95000 | 237 | IN EFI_PCI_IO_PROTOCOL *This,\r |
238 | IN EFI_PCI_IO_PROTOCOL_WIDTH Width,\r | |
239 | IN UINT8 DestBarIndex,\r | |
240 | IN UINT64 DestOffset,\r | |
241 | IN UINT8 SrcBarIndex,\r | |
242 | IN UINT64 SrcOffset,\r | |
243 | IN UINTN Count\r | |
244 | );\r | |
245 | \r | |
246 | /** \r | |
247 | Provides the PCI controller-Cspecific addresses needed to access system memory.\r | |
248 | \r | |
249 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r | |
250 | @param Operation Indicates if the bus master is going to read or write to system memory.\r | |
251 | @param HostAddress The system memory address to map to the PCI controller.\r | |
252 | @param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r | |
253 | that were mapped. \r | |
254 | @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r | |
255 | access the hosts HostAddress. \r | |
256 | @param Mapping A resulting value to pass to Unmap().\r | |
257 | \r | |
258 | @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r | |
259 | @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. \r | |
260 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r | |
261 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
262 | @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r | |
263 | \r | |
264 | **/\r | |
265 | typedef\r | |
266 | EFI_STATUS\r | |
8b13229b | 267 | (EFIAPI *EFI_PCI_IO_PROTOCOL_MAP)(\r |
d1f95000 | 268 | IN EFI_PCI_IO_PROTOCOL *This,\r |
269 | IN EFI_PCI_IO_PROTOCOL_OPERATION Operation,\r | |
270 | IN VOID *HostAddress,\r | |
271 | IN OUT UINTN *NumberOfBytes,\r | |
272 | OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r | |
273 | OUT VOID **Mapping\r | |
274 | );\r | |
275 | \r | |
276 | /** \r | |
277 | Completes the Map() operation and releases any corresponding resources.\r | |
278 | \r | |
279 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. \r | |
280 | @param Mapping The mapping value returned from Map().\r | |
281 | \r | |
282 | @retval EFI_SUCCESS The range was unmapped.\r | |
283 | @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r | |
284 | \r | |
285 | **/\r | |
286 | typedef\r | |
287 | EFI_STATUS\r | |
8b13229b | 288 | (EFIAPI *EFI_PCI_IO_PROTOCOL_UNMAP)(\r |
d1f95000 | 289 | IN EFI_PCI_IO_PROTOCOL *This,\r |
290 | IN VOID *Mapping\r | |
291 | );\r | |
292 | \r | |
293 | /** \r | |
294 | Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer\r | |
295 | mapping. \r | |
296 | \r | |
297 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r | |
298 | @param Type This parameter is not used and must be ignored.\r | |
299 | @param MemoryType The type of memory to allocate, EfiBootServicesData or\r | |
300 | EfiRuntimeServicesData. \r | |
301 | @param Pages The number of pages to allocate. \r | |
302 | @param HostAddress A pointer to store the base system memory address of the\r | |
303 | allocated range. \r | |
304 | @param Attributes The requested bit mask of attributes for the allocated range.\r | |
305 | \r | |
306 | @retval EFI_SUCCESS The requested memory pages were allocated.\r | |
307 | @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r | |
308 | MEMORY_WRITE_COMBINE and MEMORY_CACHED. \r | |
309 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r | |
310 | @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. \r | |
311 | \r | |
312 | **/\r | |
313 | typedef\r | |
314 | EFI_STATUS\r | |
8b13229b | 315 | (EFIAPI *EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER)(\r |
d1f95000 | 316 | IN EFI_PCI_IO_PROTOCOL *This,\r |
317 | IN EFI_ALLOCATE_TYPE Type,\r | |
318 | IN EFI_MEMORY_TYPE MemoryType,\r | |
319 | IN UINTN Pages,\r | |
320 | OUT VOID **HostAddress,\r | |
321 | IN UINT64 Attributes\r | |
322 | );\r | |
323 | \r | |
324 | /** \r | |
325 | Frees memory that was allocated with AllocateBuffer().\r | |
326 | \r | |
327 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. \r | |
328 | @param Pages The number of pages to free. \r | |
329 | @param HostAddress The base system memory address of the allocated range. \r | |
330 | \r | |
331 | @retval EFI_SUCCESS The requested memory pages were freed.\r | |
332 | @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r | |
333 | was not allocated with AllocateBuffer().\r | |
334 | \r | |
335 | **/\r | |
336 | typedef\r | |
337 | EFI_STATUS\r | |
8b13229b | 338 | (EFIAPI *EFI_PCI_IO_PROTOCOL_FREE_BUFFER)(\r |
d1f95000 | 339 | IN EFI_PCI_IO_PROTOCOL *This,\r |
340 | IN UINTN Pages,\r | |
341 | IN VOID *HostAddress\r | |
342 | );\r | |
343 | \r | |
344 | /** \r | |
345 | Flushes all PCI posted write transactions from a PCI host bridge to system memory.\r | |
346 | \r | |
347 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. \r | |
348 | \r | |
349 | @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host\r | |
350 | bridge to system memory. \r | |
351 | @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI\r | |
352 | host bridge due to a hardware error. \r | |
353 | \r | |
354 | **/\r | |
355 | typedef\r | |
356 | EFI_STATUS\r | |
8b13229b | 357 | (EFIAPI *EFI_PCI_IO_PROTOCOL_FLUSH)(\r |
d1f95000 | 358 | IN EFI_PCI_IO_PROTOCOL *This\r |
359 | );\r | |
360 | \r | |
361 | /** \r | |
362 | Retrieves this PCI controller's current PCI bus number, device number, and function number.\r | |
363 | \r | |
364 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. \r | |
365 | @param SegmentNumber The PCI controller's current PCI segment number.\r | |
366 | @param BusNumber The PCI controller's current PCI bus number.\r | |
367 | @param DeviceNumber The PCI controller's current PCI device number.\r | |
368 | @param FunctionNumber The PCI controller's current PCI function number.\r | |
369 | \r | |
370 | @retval EFI_SUCCESS The PCI controller location was returned. \r | |
371 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid. \r | |
372 | \r | |
373 | **/\r | |
374 | typedef\r | |
375 | EFI_STATUS\r | |
8b13229b | 376 | (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_LOCATION)(\r |
d1f95000 | 377 | IN EFI_PCI_IO_PROTOCOL *This,\r |
378 | OUT UINTN *SegmentNumber,\r | |
379 | OUT UINTN *BusNumber,\r | |
380 | OUT UINTN *DeviceNumber,\r | |
381 | OUT UINTN *FunctionNumber\r | |
382 | );\r | |
383 | \r | |
384 | /** \r | |
385 | Performs an operation on the attributes that this PCI controller supports. The operations include\r | |
386 | getting the set of supported attributes, retrieving the current attributes, setting the current \r | |
387 | attributes, enabling attributes, and disabling attributes. \r | |
388 | \r | |
389 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. \r | |
390 | @param Operation The operation to perform on the attributes for this PCI controller.\r | |
391 | @param Attributes The mask of attributes that are used for Set, Enable, and Disable\r | |
392 | operations. \r | |
393 | @param Result A pointer to the result mask of attributes that are returned for the Get\r | |
394 | and Supported operations. \r | |
395 | \r | |
396 | @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed.\r | |
397 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid. \r | |
398 | @retval EFI_UNSUPPORTED one or more of the bits set in \r | |
399 | Attributes are not supported by this PCI controller or one of\r | |
400 | its parent bridges when Operation is Set, Enable or Disable.\r | |
401 | \r | |
402 | **/\r | |
403 | typedef\r | |
404 | EFI_STATUS\r | |
8b13229b | 405 | (EFIAPI *EFI_PCI_IO_PROTOCOL_ATTRIBUTES)(\r |
d1f95000 | 406 | IN EFI_PCI_IO_PROTOCOL *This,\r |
407 | IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation,\r | |
408 | IN UINT64 Attributes,\r | |
409 | OUT UINT64 *Result OPTIONAL\r | |
410 | );\r | |
411 | \r | |
412 | /** \r | |
413 | Gets the attributes that this PCI controller supports setting on a BAR using\r | |
414 | SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.\r | |
415 | \r | |
416 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. \r | |
417 | @param BarIndex The BAR index of the standard PCI Configuration header to use as the\r | |
418 | base address for resource range. The legal range for this field is 0..5.\r | |
419 | @param Supports A pointer to the mask of attributes that this PCI controller supports\r | |
420 | setting for this BAR with SetBarAttributes(). \r | |
421 | @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current\r | |
422 | configuration of this BAR of the PCI controller. \r | |
423 | \r | |
424 | @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI \r | |
425 | controller supports are returned in Supports. If Resources \r | |
426 | is not NULL, then the ACPI 2.0 resource descriptors that the PCI\r | |
427 | controller is currently using are returned in Resources. \r | |
428 | @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.\r | |
429 | @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.\r | |
430 | @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate\r | |
431 | Resources. \r | |
432 | \r | |
433 | **/\r | |
434 | typedef\r | |
435 | EFI_STATUS\r | |
8b13229b | 436 | (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES)(\r |
d1f95000 | 437 | IN EFI_PCI_IO_PROTOCOL *This,\r |
438 | IN UINT8 BarIndex,\r | |
439 | OUT UINT64 *Supports, OPTIONAL\r | |
440 | OUT VOID **Resources OPTIONAL\r | |
441 | );\r | |
442 | \r | |
443 | /** \r | |
444 | Sets the attributes for a range of a BAR on a PCI controller.\r | |
445 | \r | |
446 | @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. \r | |
447 | @param Attributes The mask of attributes to set for the resource range specified by\r | |
448 | BarIndex, Offset, and Length. \r | |
449 | @param BarIndex The BAR index of the standard PCI Configuration header to use as the\r | |
450 | base address for resource range. The legal range for this field is 0..5.\r | |
451 | @param Offset A pointer to the BAR relative base address of the resource range to be\r | |
452 | modified by the attributes specified by Attributes. \r | |
453 | @param Length A pointer to the length of the resource range to be modified by the\r | |
454 | attributes specified by Attributes. \r | |
455 | \r | |
456 | @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource \r | |
457 | range specified by BarIndex, Offset, and Length were \r | |
458 | set on the PCI controller, and the actual resource range is returned\r | |
459 | in Offset and Length. \r | |
460 | @retval EFI_INVALID_PARAMETER Offset or Length is NULL.\r | |
461 | @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.\r | |
462 | @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the\r | |
463 | resource range specified by BarIndex, Offset, and \r | |
464 | Length. \r | |
465 | \r | |
466 | **/\r | |
467 | typedef\r | |
468 | EFI_STATUS\r | |
8b13229b | 469 | (EFIAPI *EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES)(\r |
d1f95000 | 470 | IN EFI_PCI_IO_PROTOCOL *This,\r |
471 | IN UINT64 Attributes,\r | |
472 | IN UINT8 BarIndex,\r | |
473 | IN OUT UINT64 *Offset,\r | |
474 | IN OUT UINT64 *Length\r | |
475 | );\r | |
476 | \r | |
4ca9b6c4 LG |
477 | /** \r |
478 | @par Protocol Description:\r | |
479 | The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration, \r | |
480 | and DMA interfaces that are used to abstract accesses to PCI controllers. \r | |
481 | There is one EFI_PCI_IO_PROTOCOL instance for each PCI controller on a PCI bus. \r | |
482 | A device driver that wishes to manage a PCI controller in a system will have to \r | |
483 | retrieve the EFI_PCI_IO_PROTOCOL instance that is associated with the PCI controller. \r | |
484 | \r | |
485 | @param PollMem\r | |
486 | Polls an address in PCI memory space until an exit condition is met, or a timeout occurs. \r | |
487 | \r | |
488 | @param PollIo\r | |
489 | Polls an address in PCI I/O space until an exit condition is met, or a timeout occurs. \r | |
490 | \r | |
491 | @param Mem.Read\r | |
492 | Allows BAR relative reads to PCI memory space. \r | |
493 | \r | |
494 | @param Mem.Write\r | |
495 | Allows BAR relative writes to PCI memory space. \r | |
496 | \r | |
497 | @param Io.Read\r | |
498 | Allows BAR relative reads to PCI I/O space. \r | |
499 | \r | |
500 | @param Io.Write\r | |
501 | Allows BAR relative writes to PCI I/O space. \r | |
502 | \r | |
503 | @param Pci.Read\r | |
504 | Allows PCI controller relative reads to PCI configuration space. \r | |
505 | \r | |
506 | @param Pci.Write\r | |
507 | Allows PCI controller relative writes to PCI configuration space. \r | |
508 | \r | |
509 | @param CopyMem\r | |
510 | Allows one region of PCI memory space to be copied to another region of PCI memory space. \r | |
511 | \r | |
512 | @param Map\r | |
513 | Provides the PCI controller's specific address needed to access system memory for DMA. \r | |
514 | \r | |
515 | @param Unmap\r | |
516 | Releases any resources allocated by Map(). \r | |
517 | \r | |
518 | @param AllocateBuffer\r | |
519 | Allocates pages that are suitable for a common buffer mapping. \r | |
520 | \r | |
521 | @param FreeBuffer\r | |
522 | Frees pages that were allocated with AllocateBuffer(). \r | |
523 | \r | |
524 | @param Flush\r | |
525 | Flushes all PCI posted write transactions to system memory. \r | |
526 | \r | |
527 | @param GetLocation\r | |
528 | Retrieves this PCI controller's current PCI bus number, device number, and function number. \r | |
529 | \r | |
530 | @param Attributes\r | |
531 | Performs an operation on the attributes that this PCI controller supports. \r | |
532 | The operations include getting the set of supported attributes, retrieving \r | |
533 | the current attributes, setting the current\r | |
534 | attributes, enabling attributes, and disabling attributes. \r | |
535 | \r | |
536 | @param GetBarAttributes\r | |
537 | Gets the attributes that this PCI controller supports setting on a BAR using \r | |
538 | SetBarAttributes(), and retrieves the list of resource descriptors for a BAR. \r | |
539 | \r | |
540 | @param SetBarAttributes\r | |
541 | Sets the attributes for a range of a BAR on a PCI controller. \r | |
542 | \r | |
543 | @param RomSize\r | |
544 | The size, in bytes, of the ROM image.\r | |
545 | \r | |
546 | @param RomImage\r | |
547 | A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible \r | |
548 | for allocating memory for the ROM image, and copying the contents of the ROM to memory. \r | |
549 | The contents of this buffer are either from the PCI option ROM that can be accessed \r | |
550 | through the ROM BAR of the PCI controller, or it is from a platform-specific location. \r | |
551 | The Attributes() function can be used to determine from which of these two sources \r | |
552 | the RomImage buffer was initialized.\r | |
553 | \r | |
554 | **/\r | |
d1f95000 | 555 | struct _EFI_PCI_IO_PROTOCOL {\r |
556 | EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem;\r | |
557 | EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo;\r | |
558 | EFI_PCI_IO_PROTOCOL_ACCESS Mem;\r | |
559 | EFI_PCI_IO_PROTOCOL_ACCESS Io;\r | |
560 | EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci;\r | |
561 | EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem;\r | |
562 | EFI_PCI_IO_PROTOCOL_MAP Map;\r | |
563 | EFI_PCI_IO_PROTOCOL_UNMAP Unmap;\r | |
564 | EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;\r | |
565 | EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer;\r | |
566 | EFI_PCI_IO_PROTOCOL_FLUSH Flush;\r | |
567 | EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation;\r | |
568 | EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes;\r | |
569 | EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes;\r | |
570 | EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes;\r | |
571 | UINT64 RomSize;\r | |
572 | VOID *RomImage;\r | |
573 | };\r | |
574 | \r | |
575 | extern EFI_GUID gEfiPciIoProtocolGuid;\r | |
576 | \r | |
577 | #endif\r |