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9095d37b | 1 | #------------------------------------------------------------------------------\r |
990e25aa | 2 | #\r |
3 | # CpuFlushTlb() for ARM\r | |
4 | #\r | |
9095d37b | 5 | # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
de2d3419 | 6 | # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
9344f092 | 7 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
990e25aa | 8 | #\r |
9 | #------------------------------------------------------------------------------\r | |
10 | \r | |
11 | .text\r | |
12 | .p2align 2\r | |
4c8a6e06 | 13 | GCC_ASM_EXPORT(CpuFlushTlb)\r |
990e25aa | 14 | \r |
15 | #/**\r | |
16 | # Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
17 | #\r | |
18 | # Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
19 | #\r | |
20 | #**/\r | |
21 | #VOID\r | |
22 | #EFIAPI\r | |
23 | #CpuFlushTlb (\r | |
24 | # VOID\r | |
25 | # )#\r | |
26 | #\r | |
27 | ASM_PFX(CpuFlushTlb):\r | |
28 | mov r0,#0\r | |
2bd1edf4 | 29 | mcr p15,0,r0,c8,c5,0 // Invalidate all the unlocked entried in TLB\r |
990e25aa | 30 | bx LR\r |