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1 | /** @file\r |
2 | Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r | |
3 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
4 | \r | |
5 | **/\r | |
6 | \r | |
7 | #include <Library/BaseLib.h>\r | |
8 | #include "BaseIoLibIntrinsicInternal.h"\r | |
9 | #include "IoLibTdx.h"\r | |
10 | \r | |
11 | /**\r | |
12 | Check if it is Tdx guest.\r | |
13 | \r | |
14 | @return TRUE It is Tdx guest\r | |
15 | @return FALSE It is not Tdx guest\r | |
16 | \r | |
17 | **/\r | |
18 | BOOLEAN\r | |
19 | EFIAPI\r | |
20 | IsTdxGuest (\r | |
21 | VOID\r | |
22 | )\r | |
23 | {\r | |
24 | return FALSE;\r | |
25 | }\r | |
26 | \r | |
27 | /**\r | |
28 | Reads an 8-bit I/O port.\r | |
29 | \r | |
30 | TDVMCALL_IO is invoked to read I/O port.\r | |
31 | \r | |
32 | @param Port The I/O port to read.\r | |
33 | \r | |
34 | @return The value read.\r | |
35 | \r | |
36 | **/\r | |
37 | UINT8\r | |
38 | EFIAPI\r | |
39 | TdIoRead8 (\r | |
40 | IN UINTN Port\r | |
41 | )\r | |
42 | {\r | |
43 | ASSERT (FALSE);\r | |
44 | return 0;\r | |
45 | }\r | |
46 | \r | |
47 | /**\r | |
48 | Reads a 16-bit I/O port.\r | |
49 | \r | |
50 | TDVMCALL_IO is invoked to write I/O port.\r | |
51 | \r | |
52 | @param Port The I/O port to read.\r | |
53 | \r | |
54 | @return The value read.\r | |
55 | \r | |
56 | **/\r | |
57 | UINT16\r | |
58 | EFIAPI\r | |
59 | TdIoRead16 (\r | |
60 | IN UINTN Port\r | |
61 | )\r | |
62 | {\r | |
63 | ASSERT (FALSE);\r | |
64 | return 0;\r | |
65 | }\r | |
66 | \r | |
67 | /**\r | |
68 | Reads a 32-bit I/O port.\r | |
69 | \r | |
70 | TDVMCALL_IO is invoked to read I/O port.\r | |
71 | \r | |
72 | @param Port The I/O port to read.\r | |
73 | \r | |
74 | @return The value read.\r | |
75 | \r | |
76 | **/\r | |
77 | UINT32\r | |
78 | EFIAPI\r | |
79 | TdIoRead32 (\r | |
80 | IN UINTN Port\r | |
81 | )\r | |
82 | {\r | |
83 | ASSERT (FALSE);\r | |
84 | return 0;\r | |
85 | }\r | |
86 | \r | |
87 | /**\r | |
88 | Writes an 8-bit I/O port.\r | |
89 | \r | |
90 | TDVMCALL_IO is invoked to write I/O port.\r | |
91 | \r | |
92 | @param Port The I/O port to write.\r | |
93 | @param Value The value to write to the I/O port.\r | |
94 | \r | |
95 | @return The value written the I/O port.\r | |
96 | \r | |
97 | **/\r | |
98 | UINT8\r | |
99 | EFIAPI\r | |
100 | TdIoWrite8 (\r | |
101 | IN UINTN Port,\r | |
102 | IN UINT8 Value\r | |
103 | )\r | |
104 | {\r | |
105 | ASSERT (FALSE);\r | |
106 | return 0;\r | |
107 | }\r | |
108 | \r | |
109 | /**\r | |
110 | Writes a 16-bit I/O port.\r | |
111 | \r | |
112 | TDVMCALL_IO is invoked to write I/O port.\r | |
113 | \r | |
114 | @param Port The I/O port to write.\r | |
115 | @param Value The value to write to the I/O port.\r | |
116 | \r | |
117 | @return The value written the I/O port.\r | |
118 | \r | |
119 | **/\r | |
120 | UINT16\r | |
121 | EFIAPI\r | |
122 | TdIoWrite16 (\r | |
123 | IN UINTN Port,\r | |
124 | IN UINT16 Value\r | |
125 | )\r | |
126 | {\r | |
127 | ASSERT (FALSE);\r | |
128 | return 0;\r | |
129 | }\r | |
130 | \r | |
131 | /**\r | |
132 | Writes a 32-bit I/O port.\r | |
133 | \r | |
134 | TDVMCALL_IO is invoked to write I/O port.\r | |
135 | \r | |
136 | @param Port The I/O port to write.\r | |
137 | @param Value The value to write to the I/O port.\r | |
138 | \r | |
139 | @return The value written the I/O port.\r | |
140 | \r | |
141 | **/\r | |
142 | UINT32\r | |
143 | EFIAPI\r | |
144 | TdIoWrite32 (\r | |
145 | IN UINTN Port,\r | |
146 | IN UINT32 Value\r | |
147 | )\r | |
148 | {\r | |
149 | ASSERT (FALSE);\r | |
150 | return 0;\r | |
151 | }\r | |
152 | \r | |
153 | /**\r | |
154 | Reads an 8-bit MMIO register.\r | |
155 | \r | |
156 | TDVMCALL_MMIO is invoked to read MMIO registers.\r | |
157 | \r | |
158 | @param Address The MMIO register to read.\r | |
159 | \r | |
160 | @return The value read.\r | |
161 | \r | |
162 | **/\r | |
163 | UINT8\r | |
164 | EFIAPI\r | |
165 | TdMmioRead8 (\r | |
166 | IN UINTN Address\r | |
167 | )\r | |
168 | {\r | |
169 | ASSERT (FALSE);\r | |
170 | return 0;\r | |
171 | }\r | |
172 | \r | |
173 | /**\r | |
174 | Writes an 8-bit MMIO register.\r | |
175 | \r | |
176 | TDVMCALL_MMIO is invoked to read write registers.\r | |
177 | \r | |
178 | @param Address The MMIO register to write.\r | |
179 | @param Value The value to write to the MMIO register.\r | |
180 | \r | |
181 | @return Value.\r | |
182 | \r | |
183 | **/\r | |
184 | UINT8\r | |
185 | EFIAPI\r | |
186 | TdMmioWrite8 (\r | |
187 | IN UINTN Address,\r | |
188 | IN UINT8 Val\r | |
189 | )\r | |
190 | {\r | |
191 | ASSERT (FALSE);\r | |
192 | return 0;\r | |
193 | }\r | |
194 | \r | |
195 | /**\r | |
196 | Reads a 16-bit MMIO register.\r | |
197 | \r | |
198 | TDVMCALL_MMIO is invoked to read MMIO registers.\r | |
199 | \r | |
200 | @param Address The MMIO register to read.\r | |
201 | \r | |
202 | @return The value read.\r | |
203 | \r | |
204 | **/\r | |
205 | UINT16\r | |
206 | EFIAPI\r | |
207 | TdMmioRead16 (\r | |
208 | IN UINTN Address\r | |
209 | )\r | |
210 | {\r | |
211 | ASSERT (FALSE);\r | |
212 | return 0;\r | |
213 | }\r | |
214 | \r | |
215 | /**\r | |
216 | Writes a 16-bit MMIO register.\r | |
217 | \r | |
218 | TDVMCALL_MMIO is invoked to write MMIO registers.\r | |
219 | \r | |
220 | @param Address The MMIO register to write.\r | |
221 | @param Value The value to write to the MMIO register.\r | |
222 | \r | |
223 | @return Value.\r | |
224 | \r | |
225 | **/\r | |
226 | UINT16\r | |
227 | EFIAPI\r | |
228 | TdMmioWrite16 (\r | |
229 | IN UINTN Address,\r | |
230 | IN UINT16 Val\r | |
231 | )\r | |
232 | {\r | |
233 | ASSERT (FALSE);\r | |
234 | return 0;\r | |
235 | }\r | |
236 | \r | |
237 | /**\r | |
238 | Reads a 32-bit MMIO register.\r | |
239 | \r | |
240 | TDVMCALL_MMIO is invoked to read MMIO registers.\r | |
241 | \r | |
242 | @param Address The MMIO register to read.\r | |
243 | \r | |
244 | @return The value read.\r | |
245 | \r | |
246 | **/\r | |
247 | UINT32\r | |
248 | EFIAPI\r | |
249 | TdMmioRead32 (\r | |
250 | IN UINTN Address\r | |
251 | )\r | |
252 | {\r | |
253 | ASSERT (FALSE);\r | |
254 | return 0;\r | |
255 | }\r | |
256 | \r | |
257 | /**\r | |
258 | Writes a 32-bit MMIO register.\r | |
259 | \r | |
260 | TDVMCALL_MMIO is invoked to write MMIO registers.\r | |
261 | \r | |
262 | @param Address The MMIO register to write.\r | |
263 | @param Value The value to write to the MMIO register.\r | |
264 | \r | |
265 | @return Value.\r | |
266 | \r | |
267 | **/\r | |
268 | UINT32\r | |
269 | EFIAPI\r | |
270 | TdMmioWrite32 (\r | |
271 | IN UINTN Address,\r | |
272 | IN UINT32 Val\r | |
273 | )\r | |
274 | {\r | |
275 | ASSERT (FALSE);\r | |
276 | return 0;\r | |
277 | }\r | |
278 | \r | |
279 | /**\r | |
280 | Reads a 64-bit MMIO register.\r | |
281 | \r | |
282 | TDVMCALL_MMIO is invoked to read MMIO registers.\r | |
283 | \r | |
284 | @param Address The MMIO register to read.\r | |
285 | \r | |
286 | @return The value read.\r | |
287 | \r | |
288 | **/\r | |
289 | UINT64\r | |
290 | EFIAPI\r | |
291 | TdMmioRead64 (\r | |
292 | IN UINTN Address\r | |
293 | )\r | |
294 | {\r | |
295 | ASSERT (FALSE);\r | |
296 | return 0;\r | |
297 | }\r | |
298 | \r | |
299 | /**\r | |
300 | Writes a 64-bit MMIO register.\r | |
301 | \r | |
302 | TDVMCALL_MMIO is invoked to write MMIO registers.\r | |
303 | \r | |
304 | @param Address The MMIO register to write.\r | |
305 | @param Value The value to write to the MMIO register.\r | |
306 | \r | |
307 | **/\r | |
308 | UINT64\r | |
309 | EFIAPI\r | |
310 | TdMmioWrite64 (\r | |
311 | IN UINTN Address,\r | |
312 | IN UINT64 Value\r | |
313 | )\r | |
314 | {\r | |
315 | ASSERT (FALSE);\r | |
316 | return 0;\r | |
317 | }\r | |
318 | \r | |
319 | /**\r | |
320 | Reads an 8-bit I/O port fifo into a block of memory.\r | |
321 | \r | |
322 | Reads the 8-bit I/O fifo port specified by Port.\r | |
323 | The port is read Count times, and the read data is\r | |
324 | stored in the provided Buffer.\r | |
325 | \r | |
326 | This function must guarantee that all I/O read and write operations are\r | |
327 | serialized.\r | |
328 | \r | |
329 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
330 | \r | |
331 | In TDX a serial of TdIoRead8 is invoked to read the I/O port fifo.\r | |
332 | \r | |
333 | @param Port The I/O port to read.\r | |
334 | @param Count The number of times to read I/O port.\r | |
335 | @param Buffer The buffer to store the read data into.\r | |
336 | \r | |
337 | **/\r | |
338 | VOID\r | |
339 | EFIAPI\r | |
340 | TdIoReadFifo8 (\r | |
341 | IN UINTN Port,\r | |
342 | IN UINTN Count,\r | |
343 | OUT VOID *Buffer\r | |
344 | )\r | |
345 | {\r | |
346 | ASSERT (FALSE);\r | |
347 | }\r | |
348 | \r | |
349 | /**\r | |
350 | Writes a block of memory into an 8-bit I/O port fifo.\r | |
351 | \r | |
352 | Writes the 8-bit I/O fifo port specified by Port.\r | |
353 | The port is written Count times, and the write data is\r | |
354 | retrieved from the provided Buffer.\r | |
355 | \r | |
356 | This function must guarantee that all I/O write and write operations are\r | |
357 | serialized.\r | |
358 | \r | |
359 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
360 | \r | |
361 | In TDX a serial of TdIoWrite8 is invoked to write data to the I/O port.\r | |
362 | \r | |
363 | @param Port The I/O port to write.\r | |
364 | @param Count The number of times to write I/O port.\r | |
365 | @param Buffer The buffer to retrieve the write data from.\r | |
366 | \r | |
367 | **/\r | |
368 | VOID\r | |
369 | EFIAPI\r | |
370 | TdIoWriteFifo8 (\r | |
371 | IN UINTN Port,\r | |
372 | IN UINTN Count,\r | |
373 | IN VOID *Buffer\r | |
374 | )\r | |
375 | {\r | |
376 | ASSERT (FALSE);\r | |
377 | }\r | |
378 | \r | |
379 | /**\r | |
380 | Reads a 16-bit I/O port fifo into a block of memory.\r | |
381 | \r | |
382 | Reads the 16-bit I/O fifo port specified by Port.\r | |
383 | The port is read Count times, and the read data is\r | |
384 | stored in the provided Buffer.\r | |
385 | \r | |
386 | This function must guarantee that all I/O read and write operations are\r | |
387 | serialized.\r | |
388 | \r | |
389 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
390 | \r | |
391 | In TDX a serial of TdIoRead16 is invoked to read data from the I/O port.\r | |
392 | \r | |
393 | @param Port The I/O port to read.\r | |
394 | @param Count The number of times to read I/O port.\r | |
395 | @param Buffer The buffer to store the read data into.\r | |
396 | \r | |
397 | **/\r | |
398 | VOID\r | |
399 | EFIAPI\r | |
400 | TdIoReadFifo16 (\r | |
401 | IN UINTN Port,\r | |
402 | IN UINTN Count,\r | |
403 | OUT VOID *Buffer\r | |
404 | )\r | |
405 | {\r | |
406 | ASSERT (FALSE);\r | |
407 | }\r | |
408 | \r | |
409 | /**\r | |
410 | Writes a block of memory into a 16-bit I/O port fifo.\r | |
411 | \r | |
412 | Writes the 16-bit I/O fifo port specified by Port.\r | |
413 | The port is written Count times, and the write data is\r | |
414 | retrieved from the provided Buffer.\r | |
415 | \r | |
416 | This function must guarantee that all I/O write and write operations are\r | |
417 | serialized.\r | |
418 | \r | |
419 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
420 | \r | |
421 | In TDX a serial of TdIoWrite16 is invoked to write data to the I/O port.\r | |
422 | \r | |
423 | @param Port The I/O port to write.\r | |
424 | @param Count The number of times to write I/O port.\r | |
425 | @param Buffer The buffer to retrieve the write data from.\r | |
426 | \r | |
427 | **/\r | |
428 | VOID\r | |
429 | EFIAPI\r | |
430 | TdIoWriteFifo16 (\r | |
431 | IN UINTN Port,\r | |
432 | IN UINTN Count,\r | |
433 | IN VOID *Buffer\r | |
434 | )\r | |
435 | {\r | |
436 | ASSERT (FALSE);\r | |
437 | }\r | |
438 | \r | |
439 | /**\r | |
440 | Reads a 32-bit I/O port fifo into a block of memory.\r | |
441 | \r | |
442 | Reads the 32-bit I/O fifo port specified by Port.\r | |
443 | The port is read Count times, and the read data is\r | |
444 | stored in the provided Buffer.\r | |
445 | \r | |
446 | This function must guarantee that all I/O read and write operations are\r | |
447 | serialized.\r | |
448 | \r | |
449 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
450 | \r | |
451 | In TDX a serial of TdIoRead32 is invoked to read data from the I/O port.\r | |
452 | \r | |
453 | @param Port The I/O port to read.\r | |
454 | @param Count The number of times to read I/O port.\r | |
455 | @param Buffer The buffer to store the read data into.\r | |
456 | \r | |
457 | **/\r | |
458 | VOID\r | |
459 | EFIAPI\r | |
460 | TdIoReadFifo32 (\r | |
461 | IN UINTN Port,\r | |
462 | IN UINTN Count,\r | |
463 | OUT VOID *Buffer\r | |
464 | )\r | |
465 | {\r | |
466 | ASSERT (FALSE);\r | |
467 | }\r | |
468 | \r | |
469 | /**\r | |
470 | Writes a block of memory into a 32-bit I/O port fifo.\r | |
471 | \r | |
472 | Writes the 32-bit I/O fifo port specified by Port.\r | |
473 | The port is written Count times, and the write data is\r | |
474 | retrieved from the provided Buffer.\r | |
475 | \r | |
476 | This function must guarantee that all I/O write and write operations are\r | |
477 | serialized.\r | |
478 | \r | |
479 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
480 | \r | |
481 | In TDX a serial of TdIoWrite32 is invoked to write data to the I/O port.\r | |
482 | \r | |
483 | @param Port The I/O port to write.\r | |
484 | @param Count The number of times to write I/O port.\r | |
485 | @param Buffer The buffer to retrieve the write data from.\r | |
486 | \r | |
487 | **/\r | |
488 | VOID\r | |
489 | EFIAPI\r | |
490 | TdIoWriteFifo32 (\r | |
491 | IN UINTN Port,\r | |
492 | IN UINTN Count,\r | |
493 | IN VOID *Buffer\r | |
494 | )\r | |
495 | {\r | |
496 | ASSERT (FALSE);\r | |
497 | }\r |