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e1f414b6 | 1 | /** @file\r |
2 | Common I/O Library routines.\r | |
3 | \r | |
4dd6f840 | 4 | Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r |
19c6d9fe LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
6 | \r | |
4dd6f840 | 7 | This program and the accompanying materials\r |
e1f414b6 | 8 | are licensed and made available under the terms and conditions of the BSD License\r |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
35a17154 | 10 | http://opensource.org/licenses/bsd-license.php.\r |
e1f414b6 | 11 | \r |
12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
14 | \r | |
e1f414b6 | 15 | **/\r |
16 | \r | |
5dedabbb | 17 | \r |
f734a10a | 18 | #include "BaseIoLibIntrinsicInternal.h"\r |
5dedabbb | 19 | #include <Library/PcdLib.h>\r |
e1f414b6 | 20 | \r |
21 | #define MAP_PORT_BASE_TO_MEM(_Port) \\r | |
22 | ((((_Port) & 0xfffc) << 10) | ((_Port) & 0x0fff))\r | |
23 | \r | |
8fd567c6 | 24 | /**\r |
25 | Translates I/O port address to memory address.\r | |
26 | \r | |
27 | This function translates I/O port address to memory address by adding the 64MB\r | |
28 | aligned I/O Port space to the I/O address.\r | |
29 | If I/O Port space base is not 64MB aligned, then ASSERT (). \r | |
30 | \r | |
31 | @param Port The I/O port to read.\r | |
32 | \r | |
33 | @return The memory address.\r | |
34 | \r | |
35 | **/\r | |
36 | UINTN\r | |
37 | InternalGetMemoryMapAddress (\r | |
38 | IN UINTN Port\r | |
39 | )\r | |
40 | {\r | |
41 | UINTN Address;\r | |
42 | UINTN IoBlockBaseAddress;\r | |
43 | \r | |
44 | Address = MAP_PORT_BASE_TO_MEM (Port);\r | |
45 | IoBlockBaseAddress = PcdGet64(PcdIoBlockBaseAddressForIpf);\r | |
46 | \r | |
47 | //\r | |
48 | // Make sure that the I/O Port space base is 64MB aligned.\r | |
49 | // \r | |
50 | ASSERT ((IoBlockBaseAddress & 0x3ffffff) == 0);\r | |
51 | Address += IoBlockBaseAddress;\r | |
52 | \r | |
53 | return Address;\r | |
54 | }\r | |
55 | \r | |
e1f414b6 | 56 | /**\r |
2281e7a9 | 57 | Reads an 8-bit I/O port.\r |
e1f414b6 | 58 | \r |
59 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r | |
60 | This function must guarantee that all I/O read and write operations are\r | |
61 | serialized.\r | |
62 | \r | |
2281e7a9 | 63 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
64 | \r | |
e1f414b6 | 65 | @param Port The I/O port to read.\r |
66 | \r | |
2281e7a9 | 67 | @return The value read.\r |
e1f414b6 | 68 | \r |
69 | **/\r | |
70 | UINT8\r | |
71 | EFIAPI\r | |
72 | IoRead8 (\r | |
2281e7a9 | 73 | IN UINTN Port\r |
e1f414b6 | 74 | )\r |
75 | {\r | |
8fd567c6 | 76 | return MmioRead8 (InternalGetMemoryMapAddress (Port));\r |
e1f414b6 | 77 | }\r |
78 | \r | |
79 | /**\r | |
80 | Reads a 16-bit I/O port.\r | |
81 | \r | |
82 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r | |
83 | This function must guarantee that all I/O read and write operations are\r | |
84 | serialized.\r | |
85 | \r | |
2281e7a9 | 86 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
87 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r | |
88 | \r | |
e1f414b6 | 89 | @param Port The I/O port to read.\r |
90 | \r | |
2281e7a9 | 91 | @return The value read.\r |
e1f414b6 | 92 | \r |
93 | **/\r | |
94 | UINT16\r | |
95 | EFIAPI\r | |
96 | IoRead16 (\r | |
2281e7a9 | 97 | IN UINTN Port\r |
e1f414b6 | 98 | )\r |
99 | {\r | |
8fd567c6 | 100 | return MmioRead16 (InternalGetMemoryMapAddress (Port));\r |
e1f414b6 | 101 | }\r |
102 | \r | |
103 | /**\r | |
104 | Reads a 32-bit I/O port.\r | |
105 | \r | |
106 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r | |
107 | This function must guarantee that all I/O read and write operations are\r | |
108 | serialized.\r | |
109 | \r | |
2281e7a9 | 110 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
111 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r | |
112 | \r | |
e1f414b6 | 113 | @param Port The I/O port to read.\r |
114 | \r | |
2281e7a9 | 115 | @return The value read.\r |
e1f414b6 | 116 | \r |
117 | **/\r | |
118 | UINT32\r | |
119 | EFIAPI\r | |
120 | IoRead32 (\r | |
2281e7a9 | 121 | IN UINTN Port\r |
e1f414b6 | 122 | )\r |
123 | {\r | |
8fd567c6 | 124 | return MmioRead32 (InternalGetMemoryMapAddress (Port));\r |
e1f414b6 | 125 | }\r |
126 | \r | |
127 | /**\r | |
128 | Reads a 64-bit I/O port.\r | |
129 | \r | |
130 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
131 | This function must guarantee that all I/O read and write operations are\r | |
132 | serialized.\r | |
133 | \r | |
134 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
2281e7a9 | 135 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
e1f414b6 | 136 | \r |
137 | @param Port The I/O port to read.\r | |
138 | \r | |
2281e7a9 | 139 | @return The value read.\r |
e1f414b6 | 140 | \r |
141 | **/\r | |
142 | UINT64\r | |
143 | EFIAPI\r | |
144 | IoRead64 (\r | |
145 | IN UINTN Port\r | |
146 | )\r | |
147 | {\r | |
148 | ASSERT (FALSE);\r | |
149 | return 0;\r | |
150 | }\r | |
151 | \r | |
19c6d9fe | 152 | \r |
e1f414b6 | 153 | /**\r |
2281e7a9 | 154 | Writes an 8-bit I/O port.\r |
e1f414b6 | 155 | \r |
156 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r | |
157 | and returns Value. This function must guarantee that all I/O read and write\r | |
158 | operations are serialized.\r | |
159 | \r | |
2281e7a9 | 160 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
161 | \r | |
e1f414b6 | 162 | @param Port The I/O port to write.\r |
2281e7a9 | 163 | @param Value The value to write to the I/O port.\r |
e1f414b6 | 164 | \r |
2281e7a9 | 165 | @return The value written the I/O port.\r |
e1f414b6 | 166 | \r |
167 | **/\r | |
168 | UINT8\r | |
169 | EFIAPI\r | |
170 | IoWrite8 (\r | |
2281e7a9 | 171 | IN UINTN Port,\r |
172 | IN UINT8 Value\r | |
e1f414b6 | 173 | )\r |
174 | {\r | |
2281e7a9 | 175 | return MmioWrite8 (InternalGetMemoryMapAddress (Port), Value);\r |
e1f414b6 | 176 | }\r |
177 | \r | |
178 | /**\r | |
179 | Writes a 16-bit I/O port.\r | |
180 | \r | |
181 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r | |
182 | and returns Value. This function must guarantee that all I/O read and write\r | |
183 | operations are serialized.\r | |
184 | \r | |
2281e7a9 | 185 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
186 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r | |
187 | \r | |
e1f414b6 | 188 | @param Port The I/O port to write.\r |
2281e7a9 | 189 | @param Value The value to write to the I/O port.\r |
e1f414b6 | 190 | \r |
2281e7a9 | 191 | @return The value written the I/O port.\r |
e1f414b6 | 192 | \r |
193 | **/\r | |
194 | UINT16\r | |
195 | EFIAPI\r | |
196 | IoWrite16 (\r | |
2281e7a9 | 197 | IN UINTN Port,\r |
198 | IN UINT16 Value\r | |
e1f414b6 | 199 | )\r |
200 | {\r | |
2281e7a9 | 201 | return MmioWrite16 (InternalGetMemoryMapAddress (Port), Value);\r |
e1f414b6 | 202 | }\r |
203 | \r | |
204 | /**\r | |
205 | Writes a 32-bit I/O port.\r | |
206 | \r | |
207 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r | |
208 | and returns Value. This function must guarantee that all I/O read and write\r | |
209 | operations are serialized.\r | |
210 | \r | |
2281e7a9 | 211 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
212 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r | |
213 | \r | |
e1f414b6 | 214 | @param Port The I/O port to write.\r |
2281e7a9 | 215 | @param Value The value to write to the I/O port.\r |
e1f414b6 | 216 | \r |
2281e7a9 | 217 | @return The value written the I/O port.\r |
e1f414b6 | 218 | \r |
219 | **/\r | |
220 | UINT32\r | |
221 | EFIAPI\r | |
222 | IoWrite32 (\r | |
2281e7a9 | 223 | IN UINTN Port,\r |
224 | IN UINT32 Value\r | |
e1f414b6 | 225 | )\r |
226 | {\r | |
2281e7a9 | 227 | return MmioWrite32 (InternalGetMemoryMapAddress (Port), Value);\r |
e1f414b6 | 228 | }\r |
229 | \r | |
230 | /**\r | |
231 | Writes a 64-bit I/O port.\r | |
232 | \r | |
233 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
234 | and returns Value. This function must guarantee that all I/O read and write\r | |
235 | operations are serialized.\r | |
236 | \r | |
237 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
2281e7a9 | 238 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
e1f414b6 | 239 | \r |
240 | @param Port The I/O port to write.\r | |
241 | @param Value The value to write to the I/O port.\r | |
242 | \r | |
2281e7a9 | 243 | @return The value written the I/O port.\r |
e1f414b6 | 244 | \r |
245 | **/\r | |
246 | UINT64\r | |
247 | EFIAPI\r | |
248 | IoWrite64 (\r | |
249 | IN UINTN Port,\r | |
250 | IN UINT64 Value\r | |
251 | )\r | |
252 | {\r | |
253 | ASSERT (FALSE);\r | |
254 | return 0;\r | |
255 | }\r | |
256 | \r | |
19c6d9fe LD |
257 | /**\r |
258 | Reads an 8-bit I/O port fifo into a block of memory.\r | |
259 | \r | |
260 | Reads the 8-bit I/O fifo port specified by Port.\r | |
261 | The port is read Count times, and the read data is\r | |
262 | stored in the provided Buffer.\r | |
263 | \r | |
264 | This function must guarantee that all I/O read and write operations are\r | |
265 | serialized.\r | |
266 | \r | |
267 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
268 | \r | |
269 | @param Port The I/O port to read.\r | |
270 | @param Count The number of times to read I/O port.\r | |
271 | @param Buffer The buffer to store the read data into.\r | |
272 | \r | |
273 | **/\r | |
274 | VOID\r | |
275 | EFIAPI\r | |
276 | IoReadFifo8 (\r | |
277 | IN UINTN Port,\r | |
278 | IN UINTN Count,\r | |
279 | OUT VOID *Buffer\r | |
280 | )\r | |
281 | {\r | |
282 | UINT8 *Buffer8;\r | |
283 | \r | |
284 | Buffer8 = (UINT8 *)Buffer;\r | |
058cd03b | 285 | while (Count-- > 0) {\r |
19c6d9fe LD |
286 | *Buffer8++ = IoRead8 (Port);\r |
287 | }\r | |
288 | }\r | |
289 | \r | |
290 | /**\r | |
291 | Reads a 16-bit I/O port fifo into a block of memory.\r | |
292 | \r | |
293 | Reads the 16-bit I/O fifo port specified by Port.\r | |
294 | The port is read Count times, and the read data is\r | |
295 | stored in the provided Buffer.\r | |
296 | \r | |
297 | This function must guarantee that all I/O read and write operations are\r | |
298 | serialized.\r | |
299 | \r | |
300 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
301 | \r | |
302 | @param Port The I/O port to read.\r | |
303 | @param Count The number of times to read I/O port.\r | |
304 | @param Buffer The buffer to store the read data into.\r | |
305 | \r | |
306 | **/\r | |
307 | VOID\r | |
308 | EFIAPI\r | |
309 | IoReadFifo16 (\r | |
310 | IN UINTN Port,\r | |
311 | IN UINTN Count,\r | |
312 | OUT VOID *Buffer\r | |
313 | )\r | |
314 | {\r | |
315 | UINT16 *Buffer16;\r | |
316 | \r | |
317 | Buffer16 = (UINT16 *)Buffer;\r | |
058cd03b | 318 | while (Count-- > 0) {\r |
19c6d9fe LD |
319 | *Buffer16++ = IoRead16 (Port);\r |
320 | }\r | |
321 | }\r | |
322 | \r | |
323 | /**\r | |
324 | Reads a 32-bit I/O port fifo into a block of memory.\r | |
325 | \r | |
326 | Reads the 32-bit I/O fifo port specified by Port.\r | |
327 | The port is read Count times, and the read data is\r | |
328 | stored in the provided Buffer.\r | |
329 | \r | |
330 | This function must guarantee that all I/O read and write operations are\r | |
331 | serialized.\r | |
332 | \r | |
333 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
334 | \r | |
335 | @param Port The I/O port to read.\r | |
336 | @param Count The number of times to read I/O port.\r | |
337 | @param Buffer The buffer to store the read data into.\r | |
338 | \r | |
339 | **/\r | |
340 | VOID\r | |
341 | EFIAPI\r | |
342 | IoReadFifo32 (\r | |
343 | IN UINTN Port,\r | |
344 | IN UINTN Count,\r | |
345 | OUT VOID *Buffer\r | |
346 | )\r | |
347 | {\r | |
348 | UINT32 *Buffer32;\r | |
349 | \r | |
350 | Buffer32 = (UINT32 *)Buffer;\r | |
058cd03b | 351 | while (Count-- > 0) {\r |
19c6d9fe LD |
352 | *Buffer32++ = IoRead32 (Port);\r |
353 | }\r | |
354 | }\r | |
355 | \r | |
356 | /**\r | |
357 | Writes a block of memory into an 8-bit I/O port fifo.\r | |
358 | \r | |
359 | Writes the 8-bit I/O fifo port specified by Port.\r | |
360 | The port is written Count times, and the write data is\r | |
361 | retrieved from the provided Buffer.\r | |
362 | \r | |
363 | This function must guarantee that all I/O write and write operations are\r | |
364 | serialized.\r | |
365 | \r | |
366 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
367 | \r | |
368 | @param Port The I/O port to write.\r | |
369 | @param Count The number of times to write I/O port.\r | |
370 | @param Buffer The buffer to retrieve the write data from.\r | |
371 | \r | |
372 | **/\r | |
373 | VOID\r | |
374 | EFIAPI\r | |
375 | IoWriteFifo8 (\r | |
376 | IN UINTN Port,\r | |
377 | IN UINTN Count,\r | |
378 | IN VOID *Buffer\r | |
379 | )\r | |
380 | {\r | |
381 | UINT8 *Buffer8;\r | |
382 | \r | |
383 | Buffer8 = (UINT8 *)Buffer;\r | |
058cd03b | 384 | while (Count-- > 0) {\r |
19c6d9fe LD |
385 | IoWrite8 (Port, *Buffer8++);\r |
386 | }\r | |
387 | }\r | |
388 | \r | |
389 | /**\r | |
390 | Writes a block of memory into a 16-bit I/O port fifo.\r | |
391 | \r | |
392 | Writes the 16-bit I/O fifo port specified by Port.\r | |
393 | The port is written Count times, and the write data is\r | |
394 | retrieved from the provided Buffer.\r | |
395 | \r | |
396 | This function must guarantee that all I/O write and write operations are\r | |
397 | serialized.\r | |
398 | \r | |
399 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
400 | \r | |
401 | @param Port The I/O port to write.\r | |
402 | @param Count The number of times to write I/O port.\r | |
403 | @param Buffer The buffer to retrieve the write data from.\r | |
404 | \r | |
405 | **/\r | |
406 | VOID\r | |
407 | EFIAPI\r | |
408 | IoWriteFifo16 (\r | |
409 | IN UINTN Port,\r | |
410 | IN UINTN Count,\r | |
411 | IN VOID *Buffer\r | |
412 | )\r | |
413 | {\r | |
414 | UINT16 *Buffer16;\r | |
415 | \r | |
416 | Buffer16 = (UINT16 *)Buffer;\r | |
058cd03b | 417 | while (Count-- > 0) {\r |
19c6d9fe LD |
418 | IoWrite16 (Port, *Buffer16++);\r |
419 | }\r | |
420 | }\r | |
421 | \r | |
422 | /**\r | |
423 | Writes a block of memory into a 32-bit I/O port fifo.\r | |
424 | \r | |
425 | Writes the 32-bit I/O fifo port specified by Port.\r | |
426 | The port is written Count times, and the write data is\r | |
427 | retrieved from the provided Buffer.\r | |
428 | \r | |
429 | This function must guarantee that all I/O write and write operations are\r | |
430 | serialized.\r | |
431 | \r | |
432 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
433 | \r | |
434 | @param Port The I/O port to write.\r | |
435 | @param Count The number of times to write I/O port.\r | |
436 | @param Buffer The buffer to retrieve the write data from.\r | |
437 | \r | |
438 | **/\r | |
439 | VOID\r | |
440 | EFIAPI\r | |
441 | IoWriteFifo32 (\r | |
442 | IN UINTN Port,\r | |
443 | IN UINTN Count,\r | |
444 | IN VOID *Buffer\r | |
445 | )\r | |
446 | {\r | |
447 | UINT32 *Buffer32;\r | |
448 | \r | |
449 | Buffer32 = (UINT32 *)Buffer;\r | |
058cd03b | 450 | while (Count-- > 0) {\r |
19c6d9fe LD |
451 | IoWrite32 (Port, *Buffer32++);\r |
452 | }\r | |
453 | }\r | |
454 | \r | |
e1f414b6 | 455 | /**\r |
2281e7a9 | 456 | Reads an 8-bit MMIO register.\r |
e1f414b6 | 457 | \r |
458 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
459 | returned. This function must guarantee that all MMIO read and write\r | |
460 | operations are serialized.\r | |
461 | \r | |
2281e7a9 | 462 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
463 | \r | |
e1f414b6 | 464 | @param Address The MMIO register to read.\r |
465 | \r | |
2281e7a9 | 466 | @return The value read.\r |
e1f414b6 | 467 | \r |
468 | **/\r | |
469 | UINT8\r | |
470 | EFIAPI\r | |
471 | MmioRead8 (\r | |
2281e7a9 | 472 | IN UINTN Address\r |
e1f414b6 | 473 | )\r |
474 | {\r | |
475 | UINT8 Data;\r | |
476 | \r | |
477 | Address |= BIT63;\r | |
478 | \r | |
479 | MemoryFence ();\r | |
480 | Data = *((volatile UINT8 *) Address);\r | |
481 | MemoryFence ();\r | |
482 | \r | |
483 | return Data;\r | |
484 | }\r | |
485 | \r | |
486 | /**\r | |
487 | Reads a 16-bit MMIO register.\r | |
488 | \r | |
489 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
490 | returned. This function must guarantee that all MMIO read and write\r | |
491 | operations are serialized.\r | |
492 | \r | |
2281e7a9 | 493 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
494 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
495 | \r | |
e1f414b6 | 496 | @param Address The MMIO register to read.\r |
497 | \r | |
2281e7a9 | 498 | @return The value read.\r |
e1f414b6 | 499 | \r |
500 | **/\r | |
501 | UINT16\r | |
502 | EFIAPI\r | |
503 | MmioRead16 (\r | |
2281e7a9 | 504 | IN UINTN Address\r |
e1f414b6 | 505 | )\r |
506 | {\r | |
507 | UINT16 Data;\r | |
508 | \r | |
8fd567c6 | 509 | //\r |
510 | // Make sure that Address is 16-bit aligned.\r | |
511 | // \r | |
512 | ASSERT ((Address & 1) == 0);\r | |
513 | \r | |
e1f414b6 | 514 | Address |= BIT63;\r |
515 | \r | |
516 | MemoryFence ();\r | |
517 | Data = *((volatile UINT16 *) Address);\r | |
518 | MemoryFence ();\r | |
519 | \r | |
520 | return Data;\r | |
521 | }\r | |
522 | \r | |
523 | /**\r | |
524 | Reads a 32-bit MMIO register.\r | |
525 | \r | |
526 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
527 | returned. This function must guarantee that all MMIO read and write\r | |
528 | operations are serialized.\r | |
529 | \r | |
2281e7a9 | 530 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
531 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
532 | \r | |
e1f414b6 | 533 | @param Address The MMIO register to read.\r |
534 | \r | |
2281e7a9 | 535 | @return The value read.\r |
e1f414b6 | 536 | \r |
537 | **/\r | |
538 | UINT32\r | |
539 | EFIAPI\r | |
540 | MmioRead32 (\r | |
2281e7a9 | 541 | IN UINTN Address\r |
e1f414b6 | 542 | )\r |
543 | {\r | |
544 | UINT32 Data;\r | |
545 | \r | |
8fd567c6 | 546 | //\r |
547 | // Make sure that Address is 32-bit aligned.\r | |
548 | // \r | |
549 | ASSERT ((Address & 3) == 0);\r | |
550 | \r | |
e1f414b6 | 551 | Address |= BIT63;\r |
552 | \r | |
553 | MemoryFence ();\r | |
554 | Data = *((volatile UINT32 *) Address);\r | |
555 | MemoryFence ();\r | |
556 | \r | |
557 | return Data;\r | |
558 | }\r | |
559 | \r | |
560 | /**\r | |
561 | Reads a 64-bit MMIO register.\r | |
562 | \r | |
563 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
564 | returned. This function must guarantee that all MMIO read and write\r | |
565 | operations are serialized.\r | |
566 | \r | |
2281e7a9 | 567 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
568 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
569 | \r | |
e1f414b6 | 570 | @param Address The MMIO register to read.\r |
571 | \r | |
2281e7a9 | 572 | @return The value read.\r |
e1f414b6 | 573 | \r |
574 | **/\r | |
575 | UINT64\r | |
576 | EFIAPI\r | |
577 | MmioRead64 (\r | |
2281e7a9 | 578 | IN UINTN Address\r |
e1f414b6 | 579 | )\r |
580 | {\r | |
581 | UINT64 Data;\r | |
582 | \r | |
8fd567c6 | 583 | //\r |
584 | // Make sure that Address is 64-bit aligned.\r | |
585 | // \r | |
586 | ASSERT ((Address & 7) == 0);\r | |
587 | \r | |
e1f414b6 | 588 | Address |= BIT63;\r |
589 | \r | |
590 | MemoryFence ();\r | |
591 | Data = *((volatile UINT64 *) Address);\r | |
592 | MemoryFence ();\r | |
593 | \r | |
594 | return Data;\r | |
595 | \r | |
596 | }\r | |
597 | \r | |
598 | /**\r | |
2281e7a9 | 599 | Writes an 8-bit MMIO register.\r |
e1f414b6 | 600 | \r |
601 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
602 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
603 | and write operations are serialized.\r | |
604 | \r | |
2281e7a9 | 605 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
e1f414b6 | 606 | \r |
2281e7a9 | 607 | @param Address The MMIO register to write.\r |
608 | @param Value The value to write to the MMIO register.\r | |
609 | \r | |
610 | @return Value.\r | |
e1f414b6 | 611 | \r |
612 | **/\r | |
613 | UINT8\r | |
614 | EFIAPI\r | |
615 | MmioWrite8 (\r | |
2281e7a9 | 616 | IN UINTN Address,\r |
617 | IN UINT8 Value\r | |
e1f414b6 | 618 | )\r |
619 | {\r | |
620 | Address |= BIT63;\r | |
621 | \r | |
622 | MemoryFence ();\r | |
2281e7a9 | 623 | *((volatile UINT8 *) Address) = Value;\r |
e1f414b6 | 624 | MemoryFence ();\r |
625 | \r | |
2281e7a9 | 626 | return Value;\r |
e1f414b6 | 627 | }\r |
628 | \r | |
629 | /**\r | |
630 | Writes a 16-bit MMIO register.\r | |
631 | \r | |
632 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
633 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
634 | and write operations are serialized.\r | |
635 | \r | |
2281e7a9 | 636 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
637 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
e1f414b6 | 638 | \r |
2281e7a9 | 639 | @param Address The MMIO register to write.\r |
640 | @param Value The value to write to the MMIO register.\r | |
641 | \r | |
642 | @return Value.\r | |
e1f414b6 | 643 | \r |
644 | **/\r | |
645 | UINT16\r | |
646 | EFIAPI\r | |
647 | MmioWrite16 (\r | |
2281e7a9 | 648 | IN UINTN Address,\r |
649 | IN UINT16 Value\r | |
e1f414b6 | 650 | )\r |
651 | {\r | |
8fd567c6 | 652 | //\r |
653 | // Make sure that Address is 16-bit aligned.\r | |
654 | // \r | |
655 | ASSERT ((Address & 1) == 0);\r | |
656 | \r | |
e1f414b6 | 657 | Address |= BIT63;\r |
658 | \r | |
659 | MemoryFence ();\r | |
2281e7a9 | 660 | *((volatile UINT16 *) Address) = Value;\r |
e1f414b6 | 661 | MemoryFence ();\r |
662 | \r | |
2281e7a9 | 663 | return Value;\r |
e1f414b6 | 664 | }\r |
665 | \r | |
666 | /**\r | |
667 | Writes a 32-bit MMIO register.\r | |
668 | \r | |
669 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
670 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
671 | and write operations are serialized.\r | |
672 | \r | |
2281e7a9 | 673 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
674 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
e1f414b6 | 675 | \r |
2281e7a9 | 676 | @param Address The MMIO register to write.\r |
677 | @param Value The value to write to the MMIO register.\r | |
678 | \r | |
679 | @return Value.\r | |
e1f414b6 | 680 | \r |
681 | **/\r | |
682 | UINT32\r | |
683 | EFIAPI\r | |
684 | MmioWrite32 (\r | |
2281e7a9 | 685 | IN UINTN Address,\r |
686 | IN UINT32 Value\r | |
e1f414b6 | 687 | )\r |
688 | {\r | |
8fd567c6 | 689 | //\r |
690 | // Make sure that Address is 32-bit aligned.\r | |
691 | // \r | |
692 | ASSERT ((Address & 3) == 0);\r | |
693 | \r | |
e1f414b6 | 694 | Address |= BIT63;\r |
695 | \r | |
696 | MemoryFence ();\r | |
2281e7a9 | 697 | *((volatile UINT32 *) Address) = Value;\r |
e1f414b6 | 698 | MemoryFence ();\r |
699 | \r | |
2281e7a9 | 700 | return Value;\r |
e1f414b6 | 701 | }\r |
702 | \r | |
703 | /**\r | |
704 | Writes a 64-bit MMIO register.\r | |
705 | \r | |
706 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
707 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
708 | and write operations are serialized.\r | |
709 | \r | |
2281e7a9 | 710 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
711 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
e1f414b6 | 712 | \r |
2281e7a9 | 713 | @param Address The MMIO register to write.\r |
714 | @param Value The value to write to the MMIO register.\r | |
e1f414b6 | 715 | \r |
716 | **/\r | |
717 | UINT64\r | |
718 | EFIAPI\r | |
719 | MmioWrite64 (\r | |
2281e7a9 | 720 | IN UINTN Address,\r |
721 | IN UINT64 Value\r | |
e1f414b6 | 722 | )\r |
723 | {\r | |
8fd567c6 | 724 | //\r |
725 | // Make sure that Address is 64-bit aligned.\r | |
726 | // \r | |
727 | ASSERT ((Address & 7) == 0);\r | |
728 | \r | |
e1f414b6 | 729 | Address |= BIT63;\r |
730 | \r | |
731 | MemoryFence ();\r | |
2281e7a9 | 732 | *((volatile UINT64 *) Address) = Value;\r |
e1f414b6 | 733 | MemoryFence ();\r |
734 | \r | |
2281e7a9 | 735 | return Value;\r |
e1f414b6 | 736 | }\r |