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807e2604 HL |
1 | #------------------------------------------------------------------------------\r |
2 | #\r | |
3 | # GetInterruptState() function for AArch64\r | |
4 | #\r | |
5 | # Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r | |
6 | # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
7 | # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r | |
9344f092 | 8 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
807e2604 HL |
9 | #\r |
10 | #------------------------------------------------------------------------------\r | |
11 | \r | |
12 | .text\r | |
13 | .p2align 2\r | |
0f895683 | 14 | GCC_ASM_EXPORT(GetInterruptState)\r |
807e2604 | 15 | \r |
5458faf8 EC |
16 | .set DAIF_RD_IRQ_BIT, (1 << 7)\r |
17 | \r | |
807e2604 HL |
18 | #/**\r |
19 | # Retrieves the current CPU interrupt state.\r | |
20 | #\r | |
21 | # Returns TRUE is interrupts are currently enabled. Otherwise\r | |
22 | # returns FALSE.\r | |
23 | #\r | |
24 | # @retval TRUE CPU interrupts are enabled.\r | |
25 | # @retval FALSE CPU interrupts are disabled.\r | |
26 | #\r | |
27 | #**/\r | |
28 | #\r | |
29 | #BOOLEAN\r | |
30 | #EFIAPI\r | |
31 | #GetInterruptState (\r | |
32 | # VOID\r | |
33 | # );\r | |
34 | #\r | |
35 | ASM_PFX(GetInterruptState):\r | |
36 | mrs x0, daif\r | |
5458faf8 EC |
37 | tst x0, #DAIF_RD_IRQ_BIT // Check IRQ mask; set Z=1 if clear/unmasked\r |
38 | cset w0, eq // if Z=1 (eq) return 1, else 0\r | |
807e2604 | 39 | ret\r |