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Commit | Line | Data |
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e1f414b6 | 1 | /** @file\r |
2 | 64-bit right rotation for Ia32\r | |
3 | \r | |
88a75d26 | 4 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
e1f414b6 | 6 | \r |
7 | **/\r | |
8 | \r | |
42eedea9 | 9 | /**\r |
10 | Rotates a 64-bit integer right between 0 and 63 bits, filling\r | |
11 | the high bits with the high low bits that were rotated.\r | |
12 | \r | |
13 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
14 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
15 | value is returned.\r | |
16 | \r | |
17 | @param Operand The 64-bit operand to rotate right.\r | |
18 | @param Count The number of bits to rotate right.\r | |
19 | \r | |
20 | @return Operand >>> Count\r | |
21 | \r | |
22 | **/\r | |
e1f414b6 | 23 | UINT64\r |
24 | EFIAPI\r | |
25 | InternalMathRRotU64 (\r | |
2f88bd3a MK |
26 | IN UINT64 Operand,\r |
27 | IN UINTN Count\r | |
e1f414b6 | 28 | )\r |
29 | {\r | |
30 | _asm {\r | |
31 | mov cl, byte ptr [Count]\r | |
32 | mov eax, dword ptr [Operand + 0]\r | |
33 | mov edx, dword ptr [Operand + 4]\r | |
34 | shrd ebx, eax, cl\r | |
35 | shrd eax, edx, cl\r | |
36 | rol ebx, cl\r | |
37 | shrd edx, ebx, cl\r | |
38 | test cl, 32 // Count >= 32?\r | |
88a75d26 MK |
39 | jz L0\r |
40 | mov ecx, eax\r | |
41 | mov eax, edx\r | |
42 | mov edx, ecx\r | |
43 | L0:\r | |
e1f414b6 | 44 | }\r |
45 | }\r |