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f1baef62 | 1 | /** @file\r |
2 | Base Library CPU functions for Itanium\r | |
3 | \r | |
bb817c56 HT |
4 | Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r |
5 | This program and the accompanying materials\r | |
f1baef62 | 6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
c5b16b1b | 8 | http://opensource.org/licenses/bsd-license.php.\r |
f1baef62 | 9 | \r |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
1efcc4ae | 15 | \r |
47fc17d8 | 16 | #include "BaseLibInternals.h"\r |
f1baef62 | 17 | \r |
f1baef62 | 18 | /**\r |
19 | Generates a breakpoint on the CPU.\r | |
20 | \r | |
21 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
22 | that code can resume normal execution after the breakpoint.\r | |
23 | \r | |
24 | **/\r | |
25 | VOID\r | |
26 | EFIAPI\r | |
27 | CpuBreakpoint (\r | |
28 | VOID\r | |
29 | )\r | |
30 | {\r | |
31 | __break (0);\r | |
32 | }\r | |
33 | \r | |
34 | /**\r | |
35 | Used to serialize load and store operations.\r | |
36 | \r | |
37 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
38 | globally visible when this function returns.\r | |
39 | \r | |
40 | **/\r | |
41 | VOID\r | |
42 | EFIAPI\r | |
43 | MemoryFence (\r | |
44 | VOID\r | |
45 | )\r | |
46 | {\r | |
47 | __mfa ();\r | |
48 | }\r | |
49 | \r | |
50 | /**\r | |
51 | Disables CPU interrupts.\r | |
52 | \r | |
53 | Disables CPU interrupts.\r | |
54 | \r | |
55 | **/\r | |
56 | VOID\r | |
57 | EFIAPI\r | |
58 | DisableInterrupts (\r | |
59 | VOID\r | |
60 | )\r | |
61 | {\r | |
62 | _disable ();\r | |
63 | }\r | |
64 | \r | |
65 | /**\r | |
66 | Enables CPU interrupts.\r | |
67 | \r | |
68 | Enables CPU interrupts.\r | |
69 | \r | |
70 | **/\r | |
71 | VOID\r | |
72 | EFIAPI\r | |
73 | EnableInterrupts (\r | |
74 | VOID\r | |
75 | )\r | |
76 | {\r | |
77 | _enable ();\r | |
78 | }\r | |
79 | \r | |
80 | /**\r | |
81 | Enables CPU interrupts for the smallest window required to capture any\r | |
82 | pending interrupts.\r | |
83 | \r | |
84 | Enables CPU interrupts for the smallest window required to capture any\r | |
85 | pending interrupts.\r | |
86 | \r | |
87 | **/\r | |
88 | VOID\r | |
89 | EFIAPI\r | |
90 | EnableDisableInterrupts (\r | |
91 | VOID\r | |
92 | )\r | |
93 | {\r | |
94 | EnableInterrupts ();\r | |
95 | DisableInterrupts ();\r | |
96 | }\r |