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aad6137d | 1 | /** @file\r |
2 | Implementation of Control Register reading functions on Itanium platform.\r | |
3 | \r | |
4 | Copyright (c) 2008, Intel Corporation<BR>\r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "BaseLibInternals.h"\r | |
16 | \r | |
17 | \r | |
18 | //\r | |
19 | // Loop up table for Index and corresponding control register access routines. \r | |
20 | //\r | |
21 | GLOBAL_REMOVE_IF_UNREFERENCED REGISTER_ENTRY mControlRegisterAccessEntries[] = {\r | |
22 | {IPF_CONTROL_REGISTER_DCR, AsmReadControlRegisterDcr},\r | |
23 | {IPF_CONTROL_REGISTER_ITM, AsmReadControlRegisterItm},\r | |
24 | {IPF_CONTROL_REGISTER_IVA, AsmReadControlRegisterIva},\r | |
25 | {IPF_CONTROL_REGISTER_PTA, AsmReadControlRegisterPta},\r | |
26 | {IPF_CONTROL_REGISTER_IPSR, AsmReadControlRegisterIpsr},\r | |
27 | {IPF_CONTROL_REGISTER_ISR, AsmReadControlRegisterIsr},\r | |
28 | {IPF_CONTROL_REGISTER_IIP, AsmReadControlRegisterIip},\r | |
29 | {IPF_CONTROL_REGISTER_IFA, AsmReadControlRegisterIfa},\r | |
30 | {IPF_CONTROL_REGISTER_ITIR, AsmReadControlRegisterItir},\r | |
31 | {IPF_CONTROL_REGISTER_IIPA, AsmReadControlRegisterIipa},\r | |
32 | {IPF_CONTROL_REGISTER_IFS, AsmReadControlRegisterIfs},\r | |
33 | {IPF_CONTROL_REGISTER_IIM, AsmReadControlRegisterIim},\r | |
34 | {IPF_CONTROL_REGISTER_IHA, AsmReadControlRegisterIha},\r | |
35 | {IPF_CONTROL_REGISTER_LID, AsmReadControlRegisterLid},\r | |
36 | {IPF_CONTROL_REGISTER_IVR, AsmReadControlRegisterIvr},\r | |
37 | {IPF_CONTROL_REGISTER_TPR, AsmReadControlRegisterTpr},\r | |
38 | {IPF_CONTROL_REGISTER_EOI, AsmReadControlRegisterEoi},\r | |
39 | {IPF_CONTROL_REGISTER_IRR0, AsmReadControlRegisterIrr0},\r | |
40 | {IPF_CONTROL_REGISTER_IRR1, AsmReadControlRegisterIrr1},\r | |
41 | {IPF_CONTROL_REGISTER_IRR2, AsmReadControlRegisterIrr2},\r | |
42 | {IPF_CONTROL_REGISTER_IRR3, AsmReadControlRegisterIrr3},\r | |
43 | {IPF_CONTROL_REGISTER_ITV, AsmReadControlRegisterItv},\r | |
44 | {IPF_CONTROL_REGISTER_PMV, AsmReadControlRegisterPmv},\r | |
45 | {IPF_CONTROL_REGISTER_CMCV, AsmReadControlRegisterCmcv},\r | |
46 | {IPF_CONTROL_REGISTER_LRR0, AsmReadControlRegisterLrr0},\r | |
47 | {IPF_CONTROL_REGISTER_LRR1, AsmReadControlRegisterLrr1}\r | |
48 | };\r | |
49 | \r | |
50 | \r | |
51 | /**\r | |
52 | Reads a 64-bit control register.\r | |
53 | \r | |
54 | Reads and returns the control register specified by Index. The valid Index valued are defined\r | |
55 | above in "Related Definitions".\r | |
56 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.\r | |
57 | \r | |
58 | @param Index The index of the control register to read.\r | |
59 | \r | |
60 | @return The control register specified by Index.\r | |
61 | \r | |
62 | **/\r | |
63 | UINT64\r | |
64 | EFIAPI\r | |
65 | AsmReadControlRegister (\r | |
66 | IN UINT64 Index\r | |
67 | )\r | |
68 | {\r | |
69 | UINTN Item;\r | |
70 | \r | |
71 | for (Item = 0; Item < sizeof (mControlRegisterAccessEntries) / sizeof (mControlRegisterAccessEntries[0]); Item++) {\r | |
72 | if (mControlRegisterAccessEntries[Item].Index == Index) {\r | |
73 | return mControlRegisterAccessEntries[Item].Function ();\r | |
74 | }\r | |
75 | }\r | |
76 | \r | |
77 | return 0xFFFFFFFFFFFFFFFF;\r | |
78 | }\r |