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1 | /** @file\r |
2 | CPU breakpoint for RISC-V\r | |
3 | \r | |
4 | Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r | |
5 | \r | |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | **/\r | |
8 | \r | |
9 | #include "BaseLibInternals.h"\r | |
10 | \r | |
11 | extern VOID RiscVCpuBreakpoint (VOID);\r | |
12 | \r | |
13 | /**\r | |
14 | Generates a breakpoint on the CPU.\r | |
15 | \r | |
16 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
17 | that code can resume normal execution after the breakpoint.\r | |
18 | \r | |
19 | **/\r | |
20 | VOID\r | |
21 | EFIAPI\r | |
22 | CpuBreakpoint (\r | |
23 | VOID\r | |
24 | )\r | |
25 | {\r | |
26 | RiscVCpuBreakpoint ();\r | |
27 | }\r |