projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 7601b251 AC |
1 | //------------------------------------------------------------------------------\r |
| 2 | //\r | |
| 3 | // RISC-V Supervisor Mode interrupt enable/disable\r | |
| 4 | //\r | |
| 5 | // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r | |
| 6 | //\r | |
| 7 | // SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
| 8 | //\r | |
| 9 | //------------------------------------------------------------------------------\r | |
| 10 | \r | |
| 11 | ASM_GLOBAL ASM_PFX(RiscVDisableSupervisorModeInterrupts)\r | |
| 12 | ASM_GLOBAL ASM_PFX(RiscVEnableSupervisorModeInterrupt)\r | |
| 13 | ASM_GLOBAL ASM_PFX(RiscVGetSupervisorModeInterrupts)\r | |
| 14 | \r | |
| 15 | # define MSTATUS_SIE 0x00000002\r | |
| 16 | # define CSR_SSTATUS 0x100\r | |
| 17 | \r | |
| 18 | ASM_PFX(RiscVDisableSupervisorModeInterrupts):\r | |
| 19 | li a1, MSTATUS_SIE\r | |
| 20 | csrc CSR_SSTATUS, a1\r | |
| 21 | ret\r | |
| 22 | \r | |
| 23 | ASM_PFX(RiscVEnableSupervisorModeInterrupt):\r | |
| 24 | li a1, MSTATUS_SIE\r | |
| 25 | csrs CSR_SSTATUS, a1\r | |
| 26 | ret\r | |
| 27 | \r | |
| 28 | ASM_PFX(RiscVGetSupervisorModeInterrupts):\r | |
| 29 | csrr a0, CSR_SSTATUS\r | |
| 30 | andi a0, a0, MSTATUS_SIE\r | |
| 31 | ret\r | |
| 32 | \r |