SecurityPkg/Tcg2Config: remove TPM2_ChangEPS if it is not supported.

[mirror_edk2.git] / MdePkg / Library / BaseLib / UnitTestHostBaseLib.inf

## @file\r
#  Base Library implementation for use with host based unit tests.\r
#\r
#  Copyright (c) 2007 - 2020, Intel Corporation. All rights reserved.<BR>\r
#  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
#  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
#\r
#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
#\r
##\r
\r
[Defines]\r
  INF_VERSION                    = 0x00010005\r
  BASE_NAME                      = UnitTestHostBaseLib\r
  MODULE_UNI_FILE                = UnitTestHostBaseLib.uni\r
  FILE_GUID                      = 9555A0D3-09BA-46C4-A51A-45198E3C765E\r
  MODULE_TYPE                    = BASE\r
  VERSION_STRING                 = 1.1\r
  LIBRARY_CLASS                  = BaseLib|HOST_APPLICATION\r
  LIBRARY_CLASS                  = UnitTestHostBaseLib|HOST_APPLICATION\r
\r
#\r
#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64 RISCV64\r
#\r
\r
[Sources]\r
  CheckSum.c\r
  SwitchStack.c\r
  SwapBytes64.c\r
  SwapBytes32.c\r
  SwapBytes16.c\r
  LongJump.c\r
  SetJump.c\r
  RShiftU64.c\r
  RRotU64.c\r
  RRotU32.c\r
  MultU64x64.c\r
  MultU64x32.c\r
  MultS64x64.c\r
  ModU64x32.c\r
  LShiftU64.c\r
  LRotU64.c\r
  LRotU32.c\r
  LowBitSet64.c\r
  LowBitSet32.c\r
  HighBitSet64.c\r
  HighBitSet32.c\r
  GetPowerOfTwo64.c\r
  GetPowerOfTwo32.c\r
  DivU64x64Remainder.c\r
  DivU64x32Remainder.c\r
  DivU64x32.c\r
  DivS64x64Remainder.c\r
  ARShiftU64.c\r
  BitField.c\r
  CpuDeadLoop.c\r
  Cpu.c\r
  LinkedList.c\r
  SafeString.c\r
  String.c\r
  FilePaths.c\r
  BaseLibInternals.h\r
  UnitTestHost.c\r
  UnitTestHost.h\r
\r
[Sources.Ia32]\r
  Ia32/SwapBytes64.c | MSFT\r
  Ia32/RRotU64.c | MSFT\r
  Ia32/RShiftU64.c | MSFT\r
  Ia32/ReadTsc.c | MSFT\r
  Ia32/ReadEflags.c | MSFT\r
  Ia32/ModU64x32.c | MSFT\r
  Ia32/MultU64x64.c | MSFT\r
  Ia32/MultU64x32.c | MSFT\r
  Ia32/LShiftU64.c | MSFT\r
  Ia32/LRotU64.c | MSFT\r
  Ia32/FxRestore.c | MSFT\r
  Ia32/FxSave.c | MSFT\r
  Ia32/DivU64x32Remainder.c | MSFT\r
  Ia32/DivU64x32.c | MSFT\r
  Ia32/CpuPause.c | MSFT\r
  Ia32/CpuBreakpoint.c | MSFT\r
  Ia32/ARShiftU64.c | MSFT\r
  Ia32/GccInline.c | GCC\r
  Ia32/LongJump.nasm\r
  Ia32/SetJump.nasm\r
  Ia32/SwapBytes64.nasm| GCC\r
  Ia32/DivU64x64Remainder.nasm\r
  Ia32/DivU64x32Remainder.nasm| GCC\r
  Ia32/ModU64x32.nasm| GCC\r
  Ia32/DivU64x32.nasm| GCC\r
  Ia32/MultU64x64.nasm| GCC\r
  Ia32/MultU64x32.nasm| GCC\r
  Ia32/RRotU64.nasm| GCC\r
  Ia32/LRotU64.nasm| GCC\r
  Ia32/ARShiftU64.nasm| GCC\r
  Ia32/RShiftU64.nasm| GCC\r
  Ia32/LShiftU64.nasm| GCC\r
  Ia32/RdRand.nasm\r
  Ia32/DivS64x64Remainder.c\r
  Ia32/InternalSwitchStack.c | MSFT\r
  Ia32/InternalSwitchStack.nasm | GCC\r
  Ia32/Non-existing.c\r
  Unaligned.c\r
  X86FxSave.c\r
  X86FxRestore.c\r
  X86Msr.c\r
  X86RdRand.c\r
  X86SpeculationBarrier.c\r
  X86UnitTestHost.c\r
\r
[Sources.X64]\r
  X64/LongJump.nasm\r
  X64/SetJump.nasm\r
  X64/SwitchStack.nasm\r
  X64/CpuBreakpoint.c | MSFT\r
  X64/CpuPause.nasm| MSFT\r
  X64/ReadTsc.nasm| MSFT\r
  X64/FxRestore.nasm| MSFT\r
  X64/FxSave.nasm| MSFT\r
  X64/ReadEflags.nasm| MSFT\r
  X64/Non-existing.c\r
  Math64.c\r
  Unaligned.c\r
  X86FxSave.c\r
  X86FxRestore.c\r
  X86Msr.c\r
  X86RdRand.c\r
  X86SpeculationBarrier.c\r
  X64/GccInline.c | GCC\r
  X64/RdRand.nasm\r
  ChkStkGcc.c  | GCC\r
  X86UnitTestHost.c\r
\r
[Sources.EBC]\r
  Ebc/CpuBreakpoint.c\r
  Ebc/SetJumpLongJump.c\r
  Ebc/SwitchStack.c\r
  Ebc/SpeculationBarrier.c\r
  Unaligned.c\r
  Math64.c\r
\r
[Sources.ARM]\r
  Arm/InternalSwitchStack.c\r
  Arm/Unaligned.c\r
  Math64.c                   | RVCT\r
  Math64.c                   | MSFT\r
\r
  Arm/SwitchStack.asm        | RVCT\r
  Arm/SetJumpLongJump.asm    | RVCT\r
  Arm/CpuPause.asm           | RVCT\r
  Arm/CpuBreakpoint.asm      | RVCT\r
  Arm/MemoryFence.asm        | RVCT\r
  Arm/SpeculationBarrier.S   | RVCT\r
\r
  Arm/SwitchStack.asm        | MSFT\r
  Arm/SetJumpLongJump.asm    | MSFT\r
  Arm/CpuPause.asm           | MSFT\r
  Arm/CpuBreakpoint.asm      | MSFT\r
  Arm/MemoryFence.asm        | MSFT\r
  Arm/SpeculationBarrier.asm | MSFT\r
\r
  Arm/Math64.S                  | GCC\r
  Arm/SwitchStack.S             | GCC\r
  Arm/SetJumpLongJump.S         | GCC\r
  Arm/CpuBreakpoint.S           | GCC\r
  Arm/MemoryFence.S             | GCC\r
  Arm/SpeculationBarrier.S      | GCC\r
\r
[Sources.AARCH64]\r
  Arm/InternalSwitchStack.c\r
  Arm/Unaligned.c\r
  Math64.c\r
\r
  AArch64/MemoryFence.S             | GCC\r
  AArch64/SwitchStack.S             | GCC\r
  AArch64/SetJumpLongJump.S         | GCC\r
  AArch64/CpuBreakpoint.S           | GCC\r
  AArch64/SpeculationBarrier.S      | GCC\r
\r
  AArch64/MemoryFence.asm           | MSFT\r
  AArch64/SwitchStack.asm           | MSFT\r
  AArch64/SetJumpLongJump.asm       | MSFT\r
  AArch64/CpuBreakpoint.asm         | MSFT\r
  AArch64/SpeculationBarrier.asm    | MSFT\r
\r
[Sources.RISCV64]\r
  Math64.c\r
  Unaligned.c\r
  RiscV64/InternalSwitchStack.c\r
  RiscV64/CpuBreakpoint.c\r
  RiscV64/CpuPause.c\r
  RiscV64/RiscVSetJumpLongJump.S    | GCC\r
  RiscV64/RiscVCpuBreakpoint.S      | GCC\r
  RiscV64/RiscVCpuPause.S           | GCC\r
  RiscV64/RiscVInterrupt.S          | GCC\r
  RiscV64/FlushCache.S              | GCC\r
\r
[Packages]\r
  MdePkg/MdePkg.dec\r
\r
[LibraryClasses]\r
  PcdLib\r
  DebugLib\r
  BaseMemoryLib\r
\r
[Pcd]\r
  gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength      ## SOMETIMES_CONSUMES\r
  gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength     ## SOMETIMES_CONSUMES\r
  gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength   ## SOMETIMES_CONSUMES\r
  gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask   ## SOMETIMES_CONSUMES\r
  gEfiMdePkgTokenSpaceGuid.PcdSpeculationBarrierType       ## SOMETIMES_CONSUMES\r
\r
[FeaturePcd]\r
  gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList  ## CONSUMES\r