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1 | ## @file\r |
2 | # Base Library implementation for use with host based unit tests.\r | |
3 | #\r | |
4 | # Copyright (c) 2007 - 2020, Intel Corporation. All rights reserved.<BR>\r | |
5 | # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
6 | # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r | |
7 | # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r | |
8 | #\r | |
9 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
10 | #\r | |
11 | #\r | |
12 | ##\r | |
13 | \r | |
14 | [Defines]\r | |
15 | INF_VERSION = 0x00010005\r | |
16 | BASE_NAME = UnitTestHostBaseLib\r | |
17 | MODULE_UNI_FILE = UnitTestHostBaseLib.uni\r | |
18 | FILE_GUID = 9555A0D3-09BA-46C4-A51A-45198E3C765E\r | |
19 | MODULE_TYPE = BASE\r | |
20 | VERSION_STRING = 1.1\r | |
21 | LIBRARY_CLASS = BaseLib|HOST_APPLICATION\r | |
22 | LIBRARY_CLASS = UnitTestHostBaseLib|HOST_APPLICATION\r | |
23 | \r | |
24 | #\r | |
25 | # VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64\r | |
26 | #\r | |
27 | \r | |
28 | [Sources]\r | |
29 | CheckSum.c\r | |
30 | SwitchStack.c\r | |
31 | SwapBytes64.c\r | |
32 | SwapBytes32.c\r | |
33 | SwapBytes16.c\r | |
34 | LongJump.c\r | |
35 | SetJump.c\r | |
36 | RShiftU64.c\r | |
37 | RRotU64.c\r | |
38 | RRotU32.c\r | |
39 | MultU64x64.c\r | |
40 | MultU64x32.c\r | |
41 | MultS64x64.c\r | |
42 | ModU64x32.c\r | |
43 | LShiftU64.c\r | |
44 | LRotU64.c\r | |
45 | LRotU32.c\r | |
46 | LowBitSet64.c\r | |
47 | LowBitSet32.c\r | |
48 | HighBitSet64.c\r | |
49 | HighBitSet32.c\r | |
50 | GetPowerOfTwo64.c\r | |
51 | GetPowerOfTwo32.c\r | |
52 | DivU64x64Remainder.c\r | |
53 | DivU64x32Remainder.c\r | |
54 | DivU64x32.c\r | |
55 | DivS64x64Remainder.c\r | |
56 | ARShiftU64.c\r | |
57 | BitField.c\r | |
58 | CpuDeadLoop.c\r | |
59 | Cpu.c\r | |
60 | LinkedList.c\r | |
61 | SafeString.c\r | |
62 | String.c\r | |
63 | FilePaths.c\r | |
64 | BaseLibInternals.h\r | |
65 | UnitTestHost.c\r | |
66 | UnitTestHost.h\r | |
67 | \r | |
68 | [Sources.Ia32]\r | |
69 | Ia32/SwapBytes64.c | MSFT\r | |
70 | Ia32/RRotU64.c | MSFT\r | |
71 | Ia32/RShiftU64.c | MSFT\r | |
72 | Ia32/ReadTsc.c | MSFT\r | |
73 | Ia32/ReadEflags.c | MSFT\r | |
74 | Ia32/ModU64x32.c | MSFT\r | |
75 | Ia32/MultU64x64.c | MSFT\r | |
76 | Ia32/MultU64x32.c | MSFT\r | |
77 | Ia32/LShiftU64.c | MSFT\r | |
78 | Ia32/LRotU64.c | MSFT\r | |
79 | Ia32/FxRestore.c | MSFT\r | |
80 | Ia32/FxSave.c | MSFT\r | |
81 | Ia32/DivU64x32Remainder.c | MSFT\r | |
82 | Ia32/DivU64x32.c | MSFT\r | |
83 | Ia32/CpuPause.c | MSFT\r | |
84 | Ia32/CpuBreakpoint.c | MSFT\r | |
85 | Ia32/ARShiftU64.c | MSFT\r | |
86 | Ia32/GccInline.c | GCC\r | |
87 | Ia32/LongJump.nasm\r | |
88 | Ia32/SetJump.nasm\r | |
89 | Ia32/SwapBytes64.nasm| GCC\r | |
90 | Ia32/DivU64x64Remainder.nasm\r | |
91 | Ia32/DivU64x32Remainder.nasm| GCC\r | |
92 | Ia32/ModU64x32.nasm| GCC\r | |
93 | Ia32/DivU64x32.nasm| GCC\r | |
94 | Ia32/MultU64x64.nasm| GCC\r | |
95 | Ia32/MultU64x32.nasm| GCC\r | |
96 | Ia32/RRotU64.nasm| GCC\r | |
97 | Ia32/LRotU64.nasm| GCC\r | |
98 | Ia32/ARShiftU64.nasm| GCC\r | |
99 | Ia32/RShiftU64.nasm| GCC\r | |
100 | Ia32/LShiftU64.nasm| GCC\r | |
101 | Ia32/RdRand.nasm\r | |
102 | Ia32/DivS64x64Remainder.c\r | |
103 | Ia32/InternalSwitchStack.c | MSFT\r | |
104 | Ia32/InternalSwitchStack.nasm | GCC\r | |
105 | Ia32/Non-existing.c\r | |
106 | Unaligned.c\r | |
107 | X86FxSave.c\r | |
108 | X86FxRestore.c\r | |
109 | X86Msr.c\r | |
110 | X86RdRand.c\r | |
111 | X86SpeculationBarrier.c\r | |
112 | X86UnitTestHost.c\r | |
113 | \r | |
114 | [Sources.X64]\r | |
115 | X64/LongJump.nasm\r | |
116 | X64/SetJump.nasm\r | |
117 | X64/SwitchStack.nasm\r | |
118 | X64/CpuBreakpoint.c | MSFT\r | |
119 | X64/CpuPause.nasm| MSFT\r | |
120 | X64/ReadTsc.nasm| MSFT\r | |
121 | X64/FxRestore.nasm| MSFT\r | |
122 | X64/FxSave.nasm| MSFT\r | |
123 | X64/ReadEflags.nasm| MSFT\r | |
124 | X64/Non-existing.c\r | |
125 | Math64.c\r | |
126 | Unaligned.c\r | |
127 | X86FxSave.c\r | |
128 | X86FxRestore.c\r | |
129 | X86Msr.c\r | |
130 | X86RdRand.c\r | |
131 | X86SpeculationBarrier.c\r | |
132 | X64/GccInline.c | GCC\r | |
133 | X64/RdRand.nasm\r | |
134 | ChkStkGcc.c | GCC\r | |
135 | X86UnitTestHost.c\r | |
136 | \r | |
137 | [Sources.EBC]\r | |
138 | Ebc/CpuBreakpoint.c\r | |
139 | Ebc/SetJumpLongJump.c\r | |
140 | Ebc/SwitchStack.c\r | |
141 | Ebc/SpeculationBarrier.c\r | |
142 | Unaligned.c\r | |
143 | Math64.c\r | |
144 | \r | |
145 | [Sources.ARM]\r | |
146 | Arm/InternalSwitchStack.c\r | |
147 | Arm/Unaligned.c\r | |
148 | Math64.c | RVCT\r | |
149 | Math64.c | MSFT\r | |
150 | \r | |
151 | Arm/SwitchStack.asm | RVCT\r | |
152 | Arm/SetJumpLongJump.asm | RVCT\r | |
153 | Arm/CpuPause.asm | RVCT\r | |
154 | Arm/CpuBreakpoint.asm | RVCT\r | |
155 | Arm/MemoryFence.asm | RVCT\r | |
156 | Arm/SpeculationBarrier.S | RVCT\r | |
157 | \r | |
158 | Arm/SwitchStack.asm | MSFT\r | |
159 | Arm/SetJumpLongJump.asm | MSFT\r | |
160 | Arm/CpuPause.asm | MSFT\r | |
161 | Arm/CpuBreakpoint.asm | MSFT\r | |
162 | Arm/MemoryFence.asm | MSFT\r | |
163 | Arm/SpeculationBarrier.asm | MSFT\r | |
164 | \r | |
165 | Arm/Math64.S | GCC\r | |
166 | Arm/SwitchStack.S | GCC\r | |
167 | Arm/SetJumpLongJump.S | GCC\r | |
168 | Arm/CpuBreakpoint.S | GCC\r | |
169 | Arm/MemoryFence.S | GCC\r | |
170 | Arm/SpeculationBarrier.S | GCC\r | |
171 | \r | |
172 | [Sources.AARCH64]\r | |
173 | Arm/InternalSwitchStack.c\r | |
174 | Arm/Unaligned.c\r | |
175 | Math64.c\r | |
176 | \r | |
177 | AArch64/MemoryFence.S | GCC\r | |
178 | AArch64/SwitchStack.S | GCC\r | |
179 | AArch64/SetJumpLongJump.S | GCC\r | |
180 | AArch64/CpuBreakpoint.S | GCC\r | |
181 | AArch64/SpeculationBarrier.S | GCC\r | |
182 | \r | |
183 | AArch64/MemoryFence.asm | MSFT\r | |
184 | AArch64/SwitchStack.asm | MSFT\r | |
185 | AArch64/SetJumpLongJump.asm | MSFT\r | |
186 | AArch64/CpuBreakpoint.asm | MSFT\r | |
187 | AArch64/SpeculationBarrier.asm | MSFT\r | |
188 | \r | |
189 | [Sources.RISCV64]\r | |
190 | Math64.c\r | |
191 | Unaligned.c\r | |
192 | RiscV64/InternalSwitchStack.c\r | |
193 | RiscV64/CpuBreakpoint.c\r | |
194 | RiscV64/CpuPause.c\r | |
195 | RiscV64/RiscVSetJumpLongJump.S | GCC\r | |
196 | RiscV64/RiscVCpuBreakpoint.S | GCC\r | |
197 | RiscV64/RiscVCpuPause.S | GCC\r | |
198 | RiscV64/RiscVInterrupt.S | GCC\r | |
199 | RiscV64/FlushCache.S | GCC\r | |
200 | \r | |
201 | [Packages]\r | |
202 | MdePkg/MdePkg.dec\r | |
203 | \r | |
204 | [LibraryClasses]\r | |
205 | PcdLib\r | |
206 | DebugLib\r | |
207 | BaseMemoryLib\r | |
208 | \r | |
209 | [Pcd]\r | |
210 | gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength ## SOMETIMES_CONSUMES\r | |
211 | gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength ## SOMETIMES_CONSUMES\r | |
212 | gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength ## SOMETIMES_CONSUMES\r | |
213 | gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask ## SOMETIMES_CONSUMES\r | |
214 | gEfiMdePkgTokenSpaceGuid.PcdSpeculationBarrierType ## SOMETIMES_CONSUMES\r | |
215 | \r | |
216 | [FeaturePcd]\r | |
217 | gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList ## CONSUMES\r |