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f1baef62 | 1 | ;------------------------------------------------------------------------------\r |
2 | ;\r | |
bb817c56 HT |
3 | ; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r |
4 | ; This program and the accompanying materials\r | |
f1baef62 | 5 | ; are licensed and made available under the terms and conditions of the BSD License\r |
6 | ; which accompanies this distribution. The full text of the license may be found at\r | |
2fc59a00 | 7 | ; http://opensource.org/licenses/bsd-license.php.\r |
f1baef62 | 8 | ;\r |
9 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | ;\r | |
12 | ; Module Name:\r | |
13 | ;\r | |
14 | ; DisablePaging64.Asm\r | |
15 | ;\r | |
16 | ; Abstract:\r | |
17 | ;\r | |
18 | ; AsmDisablePaging64 function\r | |
19 | ;\r | |
20 | ; Notes:\r | |
21 | ;\r | |
22 | ;------------------------------------------------------------------------------\r | |
23 | \r | |
24 | .code\r | |
25 | \r | |
26 | ;------------------------------------------------------------------------------\r | |
27 | ; VOID\r | |
28 | ; EFIAPI\r | |
29 | ; InternalX86DisablePaging64 (\r | |
30 | ; IN UINT16 Cs,\r | |
31 | ; IN UINT32 EntryPoint,\r | |
32 | ; IN UINT32 Context1, OPTIONAL\r | |
33 | ; IN UINT32 Context2, OPTIONAL\r | |
34 | ; IN UINT32 NewStack\r | |
35 | ; );\r | |
36 | ;------------------------------------------------------------------------------\r | |
37 | InternalX86DisablePaging64 PROC\r | |
38 | cli\r | |
ce4c0e31 | 39 | lea rsi, @F ; rsi <- The start address of transition code\r |
5a762061 | 40 | mov edi, [rsp + 28h] ; rdi <- New stack\r |
ce4c0e31 | 41 | lea rax, mTransitionEnd ; rax <- end of transition code\r |
42 | sub rax, rsi ; rax <- The size of transition piece code \r | |
be04587c | 43 | add rax, 4 ; Round RAX up to the next 4 byte boundary\r |
bc810c89 | 44 | and al, 0fch\r |
be04587c | 45 | sub rdi, rax ; rdi <- Use stack to hold transition code\r |
46 | mov r10d, edi ; r10 <- The start address of transicition code below 4G\r | |
ce4c0e31 | 47 | push rcx ; save rcx to stack\r |
48 | mov rcx, rax ; rcx <- The size of transition piece code\r | |
be04587c | 49 | rep movsb ; copy transition code to top of new stack which must be below 4GB\r |
ce4c0e31 | 50 | pop rcx ; restore rcx\r |
51 | \r | |
f1baef62 | 52 | mov esi, r8d\r |
f1baef62 | 53 | mov edi, r9d\r |
be04587c | 54 | mov eax, r10d ; eax <- start of the transition code on the stack\r |
55 | sub eax, 4 ; eax <- One slot below transition code on the stack\r | |
1a76fbef | 56 | push rcx ; push Cs to stack\r |
be04587c | 57 | push r10 ; push address of tansition code on stack\r |
1a76fbef | 58 | DB 48h ; prefix to composite "retq" with next "retf"\r |
59 | retf ; Use far return to load CS register from stack\r | |
ce4c0e31 | 60 | \r |
61 | ; Start of transition code\r | |
f1baef62 | 62 | @@:\r |
63 | mov esp, eax ; set up new stack\r | |
64 | mov rax, cr0\r | |
be04587c | 65 | btr eax, 31 ; Clear CR0.PG\r |
66 | mov cr0, rax ; disable paging and caches\r | |
67 | \r | |
68 | mov ebx, edx ; save EntryPoint to rbx, for rdmsr will overwrite rdx\r | |
f1baef62 | 69 | mov ecx, 0c0000080h\r |
70 | rdmsr\r | |
71 | and ah, NOT 1 ; clear LME\r | |
72 | wrmsr\r | |
73 | mov rax, cr4\r | |
74 | and al, NOT (1 SHL 5) ; clear PAE\r | |
75 | mov cr4, rax\r | |
76 | push rdi ; push Context2\r | |
77 | push rsi ; push Context1\r | |
63d7211e | 78 | call rbx ; transfer control to EntryPoint\r |
f1baef62 | 79 | hlt ; no one should get here\r |
80 | InternalX86DisablePaging64 ENDP\r | |
81 | \r | |
ce4c0e31 | 82 | mTransitionEnd LABEL BYTE\r |
83 | \r | |
f1baef62 | 84 | END\r |