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e1f414b6 | 1 | /** @file\r |
2 | IA-32/x64 MSR functions.\r | |
3 | \r | |
9095d37b | 4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
e1f414b6 | 6 | \r |
e1f414b6 | 7 | **/\r |
8 | \r | |
1efcc4ae | 9 | \r |
47fc17d8 | 10 | #include "BaseLibInternals.h"\r |
f734a10a | 11 | \r |
e1f414b6 | 12 | \r |
13 | /**\r | |
14 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
15 | \r | |
16 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
17 | No parameter checking is performed on Index, and some Index values may cause\r | |
18 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
19 | caller must set up exception handlers to catch the exceptions. This function\r | |
030cd1a2 | 20 | is only available on IA-32 and x64.\r |
e1f414b6 | 21 | \r |
22 | @param Index The 32-bit MSR index to read.\r | |
23 | \r | |
24 | @return The lower 32 bits of the MSR identified by Index.\r | |
25 | \r | |
26 | **/\r | |
27 | UINT32\r | |
28 | EFIAPI\r | |
29 | AsmReadMsr32 (\r | |
30 | IN UINT32 Index\r | |
31 | )\r | |
32 | {\r | |
33 | return (UINT32)AsmReadMsr64 (Index);\r | |
34 | }\r | |
35 | \r | |
36 | /**\r | |
2fc60b70 | 37 | Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r |
38 | The upper 32-bits of the MSR are set to zero.\r | |
e1f414b6 | 39 | \r |
40 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
41 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
42 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
43 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
44 | that Index and Value are valid, or the caller must establish proper exception\r | |
030cd1a2 | 45 | handlers. This function is only available on IA-32 and x64.\r |
e1f414b6 | 46 | \r |
47 | @param Index The 32-bit MSR index to write.\r | |
48 | @param Value The 32-bit value to write to the MSR.\r | |
49 | \r | |
50 | @return Value\r | |
51 | \r | |
52 | **/\r | |
53 | UINT32\r | |
54 | EFIAPI\r | |
55 | AsmWriteMsr32 (\r | |
56 | IN UINT32 Index,\r | |
57 | IN UINT32 Value\r | |
58 | )\r | |
59 | {\r | |
60 | return (UINT32)AsmWriteMsr64 (Index, Value);\r | |
61 | }\r | |
62 | \r | |
63 | /**\r | |
62991af2 | 64 | Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r |
e1f414b6 | 65 | writes the result back to the 64-bit MSR.\r |
66 | \r | |
62991af2 | 67 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
e1f414b6 | 68 | between the lower 32-bits of the read result and the value specified by\r |
69 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
70 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
71 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
72 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
73 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 74 | IA-32 and x64.\r |
e1f414b6 | 75 | \r |
76 | @param Index The 32-bit MSR index to write.\r | |
77 | @param OrData The value to OR with the read value from the MSR.\r | |
78 | \r | |
79 | @return The lower 32-bit value written to the MSR.\r | |
80 | \r | |
81 | **/\r | |
82 | UINT32\r | |
83 | EFIAPI\r | |
84 | AsmMsrOr32 (\r | |
85 | IN UINT32 Index,\r | |
86 | IN UINT32 OrData\r | |
87 | )\r | |
88 | {\r | |
89 | return (UINT32)AsmMsrOr64 (Index, OrData);\r | |
90 | }\r | |
91 | \r | |
92 | /**\r | |
93 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
94 | the result back to the 64-bit MSR.\r | |
95 | \r | |
96 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
97 | lower 32-bits of the read result and the value specified by AndData, and\r | |
98 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
99 | the value written to the MSR is returned. No parameter checking is performed\r | |
100 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
101 | must either guarantee that Index and AndData are valid, or the caller must\r | |
102 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 103 | and x64.\r |
e1f414b6 | 104 | \r |
105 | @param Index The 32-bit MSR index to write.\r | |
106 | @param AndData The value to AND with the read value from the MSR.\r | |
107 | \r | |
108 | @return The lower 32-bit value written to the MSR.\r | |
109 | \r | |
110 | **/\r | |
111 | UINT32\r | |
112 | EFIAPI\r | |
113 | AsmMsrAnd32 (\r | |
114 | IN UINT32 Index,\r | |
115 | IN UINT32 AndData\r | |
116 | )\r | |
117 | {\r | |
118 | return (UINT32)AsmMsrAnd64 (Index, AndData);\r | |
119 | }\r | |
120 | \r | |
121 | /**\r | |
62991af2 | 122 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r |
e1f414b6 | 123 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
124 | \r | |
125 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
126 | lower 32-bits of the read result and the value specified by AndData\r | |
62991af2 | 127 | preserving the upper 32-bits, performs a bitwise OR between the\r |
e1f414b6 | 128 | result of the AND operation and the value specified by OrData, and writes the\r |
129 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
130 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
131 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
132 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
133 | caller must establish proper exception handlers. This function is only\r | |
030cd1a2 | 134 | available on IA-32 and x64.\r |
e1f414b6 | 135 | \r |
136 | @param Index The 32-bit MSR index to write.\r | |
137 | @param AndData The value to AND with the read value from the MSR.\r | |
138 | @param OrData The value to OR with the result of the AND operation.\r | |
139 | \r | |
140 | @return The lower 32-bit value written to the MSR.\r | |
141 | \r | |
142 | **/\r | |
143 | UINT32\r | |
144 | EFIAPI\r | |
145 | AsmMsrAndThenOr32 (\r | |
146 | IN UINT32 Index,\r | |
147 | IN UINT32 AndData,\r | |
148 | IN UINT32 OrData\r | |
149 | )\r | |
150 | {\r | |
151 | return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);\r | |
152 | }\r | |
153 | \r | |
154 | /**\r | |
155 | Reads a bit field of an MSR.\r | |
156 | \r | |
157 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
158 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
159 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
160 | must set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 161 | available on IA-32 and x64.\r |
e1f414b6 | 162 | \r |
163 | If StartBit is greater than 31, then ASSERT().\r | |
164 | If EndBit is greater than 31, then ASSERT().\r | |
165 | If EndBit is less than StartBit, then ASSERT().\r | |
166 | \r | |
167 | @param Index The 32-bit MSR index to read.\r | |
168 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
169 | Range 0..31.\r | |
170 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
171 | Range 0..31.\r | |
172 | \r | |
173 | @return The bit field read from the MSR.\r | |
174 | \r | |
175 | **/\r | |
176 | UINT32\r | |
177 | EFIAPI\r | |
178 | AsmMsrBitFieldRead32 (\r | |
179 | IN UINT32 Index,\r | |
180 | IN UINTN StartBit,\r | |
181 | IN UINTN EndBit\r | |
182 | )\r | |
183 | {\r | |
184 | return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);\r | |
185 | }\r | |
186 | \r | |
187 | /**\r | |
188 | Writes a bit field to an MSR.\r | |
189 | \r | |
2fc60b70 | 190 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
e1f414b6 | 191 | field is specified by the StartBit and the EndBit. All other bits in the\r |
192 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
9095d37b LG |
193 | returned. The caller must either guarantee that Index and the data written\r |
194 | is valid, or the caller must set up exception handlers to catch the exceptions.\r | |
62991af2 | 195 | This function is only available on IA-32 and x64.\r |
e1f414b6 | 196 | \r |
197 | If StartBit is greater than 31, then ASSERT().\r | |
198 | If EndBit is greater than 31, then ASSERT().\r | |
199 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 200 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
e1f414b6 | 201 | \r |
202 | @param Index The 32-bit MSR index to write.\r | |
203 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
204 | Range 0..31.\r | |
205 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
206 | Range 0..31.\r | |
2fc59a00 | 207 | @param Value The new value of the bit field.\r |
e1f414b6 | 208 | \r |
209 | @return The lower 32-bit of the value written to the MSR.\r | |
210 | \r | |
211 | **/\r | |
212 | UINT32\r | |
213 | EFIAPI\r | |
214 | AsmMsrBitFieldWrite32 (\r | |
215 | IN UINT32 Index,\r | |
216 | IN UINTN StartBit,\r | |
217 | IN UINTN EndBit,\r | |
218 | IN UINT32 Value\r | |
219 | )\r | |
220 | {\r | |
221 | ASSERT (EndBit < sizeof (Value) * 8);\r | |
222 | ASSERT (StartBit <= EndBit);\r | |
223 | return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);\r | |
224 | }\r | |
225 | \r | |
226 | /**\r | |
227 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
228 | result back to the bit field in the 64-bit MSR.\r | |
229 | \r | |
62991af2 | 230 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
e1f414b6 | 231 | between the read result and the value specified by OrData, and writes the\r |
232 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
233 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
234 | caller must either guarantee that Index and the data written is valid, or\r | |
235 | the caller must set up exception handlers to catch the exceptions. This\r | |
030cd1a2 | 236 | function is only available on IA-32 and x64.\r |
e1f414b6 | 237 | \r |
238 | If StartBit is greater than 31, then ASSERT().\r | |
239 | If EndBit is greater than 31, then ASSERT().\r | |
240 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 241 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
e1f414b6 | 242 | \r |
243 | @param Index The 32-bit MSR index to write.\r | |
244 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
245 | Range 0..31.\r | |
246 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
247 | Range 0..31.\r | |
248 | @param OrData The value to OR with the read value from the MSR.\r | |
249 | \r | |
250 | @return The lower 32-bit of the value written to the MSR.\r | |
251 | \r | |
252 | **/\r | |
253 | UINT32\r | |
254 | EFIAPI\r | |
255 | AsmMsrBitFieldOr32 (\r | |
256 | IN UINT32 Index,\r | |
257 | IN UINTN StartBit,\r | |
258 | IN UINTN EndBit,\r | |
259 | IN UINT32 OrData\r | |
260 | )\r | |
261 | {\r | |
262 | ASSERT (EndBit < sizeof (OrData) * 8);\r | |
263 | ASSERT (StartBit <= EndBit);\r | |
264 | return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);\r | |
265 | }\r | |
266 | \r | |
267 | /**\r | |
268 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
269 | result back to the bit field in the 64-bit MSR.\r | |
270 | \r | |
271 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
272 | read result and the value specified by AndData, and writes the result to the\r | |
273 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
274 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
275 | either guarantee that Index and the data written is valid, or the caller must\r | |
276 | set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 277 | available on IA-32 and x64.\r |
e1f414b6 | 278 | \r |
279 | If StartBit is greater than 31, then ASSERT().\r | |
280 | If EndBit is greater than 31, then ASSERT().\r | |
281 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 282 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
e1f414b6 | 283 | \r |
284 | @param Index The 32-bit MSR index to write.\r | |
285 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
286 | Range 0..31.\r | |
287 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
288 | Range 0..31.\r | |
289 | @param AndData The value to AND with the read value from the MSR.\r | |
290 | \r | |
291 | @return The lower 32-bit of the value written to the MSR.\r | |
292 | \r | |
293 | **/\r | |
294 | UINT32\r | |
295 | EFIAPI\r | |
296 | AsmMsrBitFieldAnd32 (\r | |
297 | IN UINT32 Index,\r | |
298 | IN UINTN StartBit,\r | |
299 | IN UINTN EndBit,\r | |
300 | IN UINT32 AndData\r | |
301 | )\r | |
302 | {\r | |
303 | ASSERT (EndBit < sizeof (AndData) * 8);\r | |
304 | ASSERT (StartBit <= EndBit);\r | |
305 | return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);\r | |
306 | }\r | |
307 | \r | |
308 | /**\r | |
309 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 310 | bitwise OR, and writes the result back to the bit field in the\r |
e1f414b6 | 311 | 64-bit MSR.\r |
312 | \r | |
313 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
62991af2 | 314 | bitwise OR between the read result and the value specified by\r |
e1f414b6 | 315 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
316 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
317 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
318 | that Index and the data written is valid, or the caller must set up exception\r | |
319 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 320 | and x64.\r |
e1f414b6 | 321 | \r |
322 | If StartBit is greater than 31, then ASSERT().\r | |
323 | If EndBit is greater than 31, then ASSERT().\r | |
324 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
325 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
326 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
e1f414b6 | 327 | \r |
328 | @param Index The 32-bit MSR index to write.\r | |
329 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
330 | Range 0..31.\r | |
331 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
332 | Range 0..31.\r | |
333 | @param AndData The value to AND with the read value from the MSR.\r | |
334 | @param OrData The value to OR with the result of the AND operation.\r | |
335 | \r | |
336 | @return The lower 32-bit of the value written to the MSR.\r | |
337 | \r | |
338 | **/\r | |
339 | UINT32\r | |
340 | EFIAPI\r | |
341 | AsmMsrBitFieldAndThenOr32 (\r | |
342 | IN UINT32 Index,\r | |
343 | IN UINTN StartBit,\r | |
344 | IN UINTN EndBit,\r | |
345 | IN UINT32 AndData,\r | |
346 | IN UINT32 OrData\r | |
347 | )\r | |
348 | {\r | |
349 | ASSERT (EndBit < sizeof (AndData) * 8);\r | |
350 | ASSERT (StartBit <= EndBit);\r | |
351 | return (UINT32)AsmMsrBitFieldAndThenOr64 (\r | |
352 | Index,\r | |
353 | StartBit,\r | |
354 | EndBit,\r | |
355 | AndData,\r | |
356 | OrData\r | |
357 | );\r | |
358 | }\r | |
359 | \r | |
360 | /**\r | |
62991af2 | 361 | Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r |
e1f414b6 | 362 | back to the 64-bit MSR.\r |
363 | \r | |
62991af2 | 364 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
e1f414b6 | 365 | between the read result and the value specified by OrData, and writes the\r |
366 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
367 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
368 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
369 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
030cd1a2 | 370 | This function is only available on IA-32 and x64.\r |
e1f414b6 | 371 | \r |
372 | @param Index The 32-bit MSR index to write.\r | |
373 | @param OrData The value to OR with the read value from the MSR.\r | |
374 | \r | |
375 | @return The value written back to the MSR.\r | |
376 | \r | |
377 | **/\r | |
378 | UINT64\r | |
379 | EFIAPI\r | |
380 | AsmMsrOr64 (\r | |
381 | IN UINT32 Index,\r | |
382 | IN UINT64 OrData\r | |
383 | )\r | |
384 | {\r | |
385 | return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);\r | |
386 | }\r | |
387 | \r | |
388 | /**\r | |
389 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
390 | 64-bit MSR.\r | |
391 | \r | |
392 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
393 | read result and the value specified by OrData, and writes the result to the\r | |
394 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
395 | parameter checking is performed on Index or OrData, and some of these may\r | |
396 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
397 | are valid, or the caller must establish proper exception handlers. This\r | |
030cd1a2 | 398 | function is only available on IA-32 and x64.\r |
e1f414b6 | 399 | \r |
400 | @param Index The 32-bit MSR index to write.\r | |
401 | @param AndData The value to AND with the read value from the MSR.\r | |
402 | \r | |
403 | @return The value written back to the MSR.\r | |
404 | \r | |
405 | **/\r | |
406 | UINT64\r | |
407 | EFIAPI\r | |
408 | AsmMsrAnd64 (\r | |
409 | IN UINT32 Index,\r | |
410 | IN UINT64 AndData\r | |
411 | )\r | |
412 | {\r | |
413 | return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);\r | |
414 | }\r | |
415 | \r | |
416 | /**\r | |
9095d37b | 417 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise\r |
e1f414b6 | 418 | OR, and writes the result back to the 64-bit MSR.\r |
419 | \r | |
420 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
62991af2 | 421 | result and the value specified by AndData, performs a bitwise OR\r |
e1f414b6 | 422 | between the result of the AND operation and the value specified by OrData,\r |
423 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
424 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
425 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
426 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
427 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 428 | and x64.\r |
e1f414b6 | 429 | \r |
430 | @param Index The 32-bit MSR index to write.\r | |
431 | @param AndData The value to AND with the read value from the MSR.\r | |
432 | @param OrData The value to OR with the result of the AND operation.\r | |
433 | \r | |
434 | @return The value written back to the MSR.\r | |
435 | \r | |
436 | **/\r | |
437 | UINT64\r | |
438 | EFIAPI\r | |
439 | AsmMsrAndThenOr64 (\r | |
440 | IN UINT32 Index,\r | |
441 | IN UINT64 AndData,\r | |
442 | IN UINT64 OrData\r | |
443 | )\r | |
444 | {\r | |
445 | return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);\r | |
446 | }\r | |
447 | \r | |
448 | /**\r | |
449 | Reads a bit field of an MSR.\r | |
450 | \r | |
451 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
452 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
453 | must either guarantee that Index is valid, or the caller must set up\r | |
454 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 455 | on IA-32 and x64.\r |
e1f414b6 | 456 | \r |
457 | If StartBit is greater than 63, then ASSERT().\r | |
458 | If EndBit is greater than 63, then ASSERT().\r | |
459 | If EndBit is less than StartBit, then ASSERT().\r | |
460 | \r | |
461 | @param Index The 32-bit MSR index to read.\r | |
462 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
463 | Range 0..63.\r | |
464 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
465 | Range 0..63.\r | |
466 | \r | |
2fc60b70 | 467 | @return The value read from the MSR.\r |
e1f414b6 | 468 | \r |
469 | **/\r | |
470 | UINT64\r | |
471 | EFIAPI\r | |
472 | AsmMsrBitFieldRead64 (\r | |
473 | IN UINT32 Index,\r | |
474 | IN UINTN StartBit,\r | |
475 | IN UINTN EndBit\r | |
476 | )\r | |
477 | {\r | |
478 | return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);\r | |
479 | }\r | |
480 | \r | |
481 | /**\r | |
482 | Writes a bit field to an MSR.\r | |
483 | \r | |
484 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
485 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
9095d37b LG |
486 | preserved. The MSR written is returned. The caller must either guarantee\r |
487 | that Index and the data written is valid, or the caller must set up exception\r | |
62991af2 | 488 | handlers to catch the exceptions. This function is only available on IA-32 and x64.\r |
e1f414b6 | 489 | \r |
490 | If StartBit is greater than 63, then ASSERT().\r | |
491 | If EndBit is greater than 63, then ASSERT().\r | |
492 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 493 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
e1f414b6 | 494 | \r |
495 | @param Index The 32-bit MSR index to write.\r | |
496 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
497 | Range 0..63.\r | |
498 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
499 | Range 0..63.\r | |
2fc59a00 | 500 | @param Value The new value of the bit field.\r |
e1f414b6 | 501 | \r |
502 | @return The value written back to the MSR.\r | |
503 | \r | |
504 | **/\r | |
505 | UINT64\r | |
506 | EFIAPI\r | |
507 | AsmMsrBitFieldWrite64 (\r | |
508 | IN UINT32 Index,\r | |
509 | IN UINTN StartBit,\r | |
510 | IN UINTN EndBit,\r | |
511 | IN UINT64 Value\r | |
512 | )\r | |
513 | {\r | |
514 | return AsmWriteMsr64 (\r | |
515 | Index,\r | |
516 | BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)\r | |
517 | );\r | |
518 | }\r | |
519 | \r | |
520 | /**\r | |
62991af2 | 521 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r |
e1f414b6 | 522 | writes the result back to the bit field in the 64-bit MSR.\r |
523 | \r | |
62991af2 | 524 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
e1f414b6 | 525 | between the read result and the value specified by OrData, and writes the\r |
526 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
527 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
528 | guarantee that Index and the data written is valid, or the caller must set up\r | |
529 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 530 | on IA-32 and x64.\r |
e1f414b6 | 531 | \r |
532 | If StartBit is greater than 63, then ASSERT().\r | |
533 | If EndBit is greater than 63, then ASSERT().\r | |
534 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 535 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
e1f414b6 | 536 | \r |
537 | @param Index The 32-bit MSR index to write.\r | |
538 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
539 | Range 0..63.\r | |
540 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
541 | Range 0..63.\r | |
542 | @param OrData The value to OR with the read value from the bit field.\r | |
543 | \r | |
544 | @return The value written back to the MSR.\r | |
545 | \r | |
546 | **/\r | |
547 | UINT64\r | |
548 | EFIAPI\r | |
549 | AsmMsrBitFieldOr64 (\r | |
550 | IN UINT32 Index,\r | |
551 | IN UINTN StartBit,\r | |
552 | IN UINTN EndBit,\r | |
553 | IN UINT64 OrData\r | |
554 | )\r | |
555 | {\r | |
556 | return AsmWriteMsr64 (\r | |
557 | Index,\r | |
558 | BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)\r | |
559 | );\r | |
560 | }\r | |
561 | \r | |
562 | /**\r | |
563 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
564 | result back to the bit field in the 64-bit MSR.\r | |
565 | \r | |
566 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
567 | read result and the value specified by AndData, and writes the result to the\r | |
568 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
569 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
570 | that Index and the data written is valid, or the caller must set up exception\r | |
571 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 572 | and x64.\r |
e1f414b6 | 573 | \r |
574 | If StartBit is greater than 63, then ASSERT().\r | |
575 | If EndBit is greater than 63, then ASSERT().\r | |
576 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 577 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
e1f414b6 | 578 | \r |
579 | @param Index The 32-bit MSR index to write.\r | |
580 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
581 | Range 0..63.\r | |
582 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
583 | Range 0..63.\r | |
584 | @param AndData The value to AND with the read value from the bit field.\r | |
585 | \r | |
586 | @return The value written back to the MSR.\r | |
587 | \r | |
588 | **/\r | |
589 | UINT64\r | |
590 | EFIAPI\r | |
591 | AsmMsrBitFieldAnd64 (\r | |
592 | IN UINT32 Index,\r | |
593 | IN UINTN StartBit,\r | |
594 | IN UINTN EndBit,\r | |
595 | IN UINT64 AndData\r | |
596 | )\r | |
597 | {\r | |
598 | return AsmWriteMsr64 (\r | |
599 | Index,\r | |
600 | BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)\r | |
601 | );\r | |
602 | }\r | |
603 | \r | |
604 | /**\r | |
605 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 606 | bitwise OR, and writes the result back to the bit field in the\r |
e1f414b6 | 607 | 64-bit MSR.\r |
608 | \r | |
609 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
62991af2 | 610 | a bitwise OR between the read result and the value specified by\r |
e1f414b6 | 611 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
612 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
613 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
614 | written is valid, or the caller must set up exception handlers to catch the\r | |
030cd1a2 | 615 | exceptions. This function is only available on IA-32 and x64.\r |
e1f414b6 | 616 | \r |
617 | If StartBit is greater than 63, then ASSERT().\r | |
618 | If EndBit is greater than 63, then ASSERT().\r | |
619 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
620 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
621 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
e1f414b6 | 622 | \r |
623 | @param Index The 32-bit MSR index to write.\r | |
624 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
625 | Range 0..63.\r | |
626 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
627 | Range 0..63.\r | |
628 | @param AndData The value to AND with the read value from the bit field.\r | |
629 | @param OrData The value to OR with the result of the AND operation.\r | |
630 | \r | |
631 | @return The value written back to the MSR.\r | |
632 | \r | |
633 | **/\r | |
634 | UINT64\r | |
635 | EFIAPI\r | |
636 | AsmMsrBitFieldAndThenOr64 (\r | |
637 | IN UINT32 Index,\r | |
638 | IN UINTN StartBit,\r | |
639 | IN UINTN EndBit,\r | |
640 | IN UINT64 AndData,\r | |
641 | IN UINT64 OrData\r | |
642 | )\r | |
643 | {\r | |
644 | return AsmWriteMsr64 (\r | |
645 | Index,\r | |
646 | BitFieldAndThenOr64 (\r | |
647 | AsmReadMsr64 (Index),\r | |
648 | StartBit,\r | |
649 | EndBit,\r | |
650 | AndData,\r | |
651 | OrData\r | |
652 | )\r | |
653 | );\r | |
654 | }\r |