MdePkg/BaseMemoryLibOptDxe: Apply BSD-2-Clause-Patent

[mirror_edk2.git] / MdePkg / Library / BaseMemoryLibOptDxe / AArch64 / CompareMem.S

//\r
// Copyright (c) 2013, Linaro Limited\r
// All rights reserved.\r
// SPDX-License-Identifier: BSD-2-Clause-Patent\r
//\r
\r
// Assumptions:\r
//\r
// ARMv8-a, AArch64\r
//\r
\r
\r
// Parameters and result.\r
#define src1      x0\r
#define src2      x1\r
#define limit     x2\r
#define result    x0\r
\r
// Internal variables.\r
#define data1     x3\r
#define data1w    w3\r
#define data2     x4\r
#define data2w    w4\r
#define diff      x6\r
#define endloop   x7\r
#define tmp1      x8\r
#define tmp2      x9\r
#define pos       x11\r
#define limit_wd  x12\r
#define mask      x13\r
\r
    .p2align 6\r
ASM_GLOBAL ASM_PFX(InternalMemCompareMem)\r
ASM_PFX(InternalMemCompareMem):\r
    eor     tmp1, src1, src2\r
    tst     tmp1, #7\r
    b.ne    .Lmisaligned8\r
    ands    tmp1, src1, #7\r
    b.ne    .Lmutual_align\r
    add     limit_wd, limit, #7\r
    lsr     limit_wd, limit_wd, #3\r
\r
    // Start of performance-critical section  -- one 64B cache line.\r
.Lloop_aligned:\r
    ldr     data1, [src1], #8\r
    ldr     data2, [src2], #8\r
.Lstart_realigned:\r
    subs    limit_wd, limit_wd, #1\r
    eor     diff, data1, data2        // Non-zero if differences found.\r
    csinv   endloop, diff, xzr, ne    // Last Dword or differences.\r
    cbz     endloop, .Lloop_aligned\r
    // End of performance-critical section  -- one 64B cache line.\r
\r
    // Not reached the limit, must have found a diff.\r
    cbnz    limit_wd, .Lnot_limit\r
\r
    // Limit % 8 == 0 => all bytes significant.\r
    ands    limit, limit, #7\r
    b.eq    .Lnot_limit\r
\r
    lsl     limit, limit, #3              // Bits -> bytes.\r
    mov     mask, #~0\r
    lsl     mask, mask, limit\r
    bic     data1, data1, mask\r
    bic     data2, data2, mask\r
\r
    orr     diff, diff, mask\r
\r
.Lnot_limit:\r
    rev     diff, diff\r
    rev     data1, data1\r
    rev     data2, data2\r
\r
    // The MS-non-zero bit of DIFF marks either the first bit\r
    // that is different, or the end of the significant data.\r
    // Shifting left now will bring the critical information into the\r
    // top bits.\r
    clz     pos, diff\r
    lsl     data1, data1, pos\r
    lsl     data2, data2, pos\r
\r
    // But we need to zero-extend (char is unsigned) the value and then\r
    // perform a signed 32-bit subtraction.\r
    lsr     data1, data1, #56\r
    sub     result, data1, data2, lsr #56\r
    ret\r
\r
.Lmutual_align:\r
    // Sources are mutually aligned, but are not currently at an\r
    // alignment boundary.  Round down the addresses and then mask off\r
    // the bytes that precede the start point.\r
    bic     src1, src1, #7\r
    bic     src2, src2, #7\r
    add     limit, limit, tmp1          // Adjust the limit for the extra.\r
    lsl     tmp1, tmp1, #3              // Bytes beyond alignment -> bits.\r
    ldr     data1, [src1], #8\r
    neg     tmp1, tmp1                  // Bits to alignment -64.\r
    ldr     data2, [src2], #8\r
    mov     tmp2, #~0\r
\r
    // Little-endian.  Early bytes are at LSB.\r
    lsr     tmp2, tmp2, tmp1            // Shift (tmp1 & 63).\r
    add     limit_wd, limit, #7\r
    orr     data1, data1, tmp2\r
    orr     data2, data2, tmp2\r
    lsr     limit_wd, limit_wd, #3\r
    b       .Lstart_realigned\r
\r
    .p2align 6\r
.Lmisaligned8:\r
    sub     limit, limit, #1\r
1:\r
    // Perhaps we can do better than this.\r
    ldrb    data1w, [src1], #1\r
    ldrb    data2w, [src2], #1\r
    subs    limit, limit, #1\r
    ccmp    data1w, data2w, #0, cs      // NZCV = 0b0000.\r
    b.eq    1b\r
    sub     result, data1, data2\r
    ret\r